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  1.  
  2. //#define ATOM_BIOS        1
  3. //#define ATOM_BIOS_PARSER 1
  4.  
  5. #define OS_BASE   0x80000000
  6.  
  7. #include "xmd.h"
  8.  
  9. #define NULL (void*)(0)
  10.  
  11. #define FALSE   0
  12. #define TRUE    1
  13.  
  14. typedef void *pointer;
  15.  
  16. typedef unsigned int   Bool;
  17.  
  18. typedef unsigned char  u8_t;
  19. typedef unsigned short u16_t;
  20. typedef unsigned int   u32_t;
  21.  
  22. typedef unsigned int memType;
  23. typedef unsigned int size_t;
  24.  
  25. #define MAX_HSYNC 8
  26. #define MAX_VREFRESH 8
  27. #define INTERLACE_REFRESH_WEIGHT  1.5
  28. #define SYNC_TOLERANCE          0.01    /* 1 percent */
  29. #define CLOCK_TOLERANCE         2000    /* Clock matching tolerance (2MHz) */
  30.  
  31. typedef struct { float hi, lo; } range;
  32.  
  33.  
  34. #define STDCALL __attribute__ ((stdcall)) __attribute__ ((dllimport))
  35. #define IMPORT __attribute__ ((dllimport))
  36.  
  37.  
  38. CARD32 STDCALL AllocKernelSpace(unsigned size)__asm__("AllocKernelSpace");
  39. void*  STDCALL KernelAlloc(unsigned size)__asm__("KernelAlloc");
  40. int KernelFree(void *);
  41.  
  42. CARD32 STDCALL MapIoMem(CARD32 Base,CARD32 size,CARD32 flags)__asm__("MapIoMem");
  43.  
  44. u8_t  STDCALL PciRead8 (u32_t bus, u32_t devfn, u32_t reg)__asm__("PciRead8");
  45. u16_t STDCALL PciRead16(u32_t bus, u32_t devfn, u32_t reg)__asm__("PciRead16");
  46. u32_t STDCALL PciRead32(u32_t bus, u32_t devfn, u32_t reg)__asm__("PciRead32");
  47.  
  48. #define pciReadLong(tag, reg) \
  49.         PciRead32(PCI_BUS_FROM_TAG(tag),PCI_DFN_FROM_TAG(tag),(reg))
  50.  
  51. u32_t STDCALL PciWrite8 (u32_t bus, u32_t devfn, u32_t reg,u8_t val) __asm__("PciWrite8");
  52. u32_t STDCALL PciWrite16(u32_t bus, u32_t devfn, u32_t reg,u16_t val)__asm__("PciWrite16");
  53. u32_t STDCALL PciWrite32(u32_t bus, u32_t devfn, u32_t reg,u32_t val)__asm__("PciWrite32");
  54.  
  55. #define pciWriteLong(tag, reg, val) \
  56.         PciWrite32(PCI_BUS_FROM_TAG(tag),PCI_DFN_FROM_TAG(tag),(reg),(val))
  57.  
  58. void usleep(u32_t delay);
  59.  
  60. ///////////////////////////////////////////////////////////////////////////////
  61.  
  62. void *malloc(size_t);
  63. void *calloc( size_t num, size_t size );
  64. void *realloc(void*, size_t);
  65. void free(void*);
  66.  
  67.  
  68. #define xalloc    malloc
  69. #define xnfalloc  malloc
  70.  
  71. #define xcalloc   calloc
  72. #define xnfcalloc calloc
  73.  
  74. #define xrealloc  realloc
  75.  
  76. #define xfree     free
  77.  
  78. ///////////////////////////////////////////////////////////////////////////////
  79.  
  80. void* memset(void *s, int c, size_t n);
  81. void* memcpy(void * dest, const void *src, size_t n);
  82. int   memcmp(const void *s1, const void *s2, size_t n);
  83.  
  84. size_t strlen(const char *str);
  85. char*  strcpy(char *to, const char *from);
  86. char*  strcat(char *s, const char *append);
  87. char*  strdup(const char *s);
  88. char*  strchr(const char *s, int c);
  89. int    strcmp(const char *s1, const char *s2);
  90.  
  91. #define xstrdup  strdup
  92.  
  93. ///////////////////////////////////////////////////////////////////////////////
  94.  
  95. int snprintf(char *s, size_t n, const char *format, ...);
  96. int printf(const char* format, ...);
  97. int dbg_open(char *path);
  98. int dbgprintf(const char* format, ...);
  99.  
  100. ///////////////////////////////////////////////////////////////////////////////
  101.  
  102. /* These are possible return values for xf86CheckMode() and ValidMode() */
  103. typedef enum {
  104.     MODE_OK     = 0,    /* Mode OK */
  105.     MODE_HSYNC,         /* hsync out of range */
  106.     MODE_VSYNC,         /* vsync out of range */
  107.     MODE_H_ILLEGAL,     /* mode has illegal horizontal timings */
  108.     MODE_V_ILLEGAL,     /* mode has illegal horizontal timings */
  109.     MODE_BAD_WIDTH,     /* requires an unsupported linepitch */
  110.     MODE_NOMODE,        /* no mode with a maching name */
  111.     MODE_NO_INTERLACE,  /* interlaced mode not supported */
  112.     MODE_NO_DBLESCAN,   /* doublescan mode not supported */
  113.     MODE_NO_VSCAN,      /* multiscan mode not supported */
  114.     MODE_MEM,           /* insufficient video memory */
  115.     MODE_VIRTUAL_X,     /* mode width too large for specified virtual size */
  116.     MODE_VIRTUAL_Y,     /* mode height too large for specified virtual size */
  117.     MODE_MEM_VIRT,      /* insufficient video memory given virtual size */
  118.     MODE_NOCLOCK,       /* no fixed clock available */
  119.     MODE_CLOCK_HIGH,    /* clock required is too high */
  120.     MODE_CLOCK_LOW,     /* clock required is too low */
  121.     MODE_CLOCK_RANGE,   /* clock/mode isn't in a ClockRange */
  122.     MODE_BAD_HVALUE,    /* horizontal timing was out of range */
  123.     MODE_BAD_VVALUE,    /* vertical timing was out of range */
  124.     MODE_BAD_VSCAN,     /* VScan value out of range */
  125.     MODE_HSYNC_NARROW,  /* horizontal sync too narrow */
  126.     MODE_HSYNC_WIDE,    /* horizontal sync too wide */
  127.     MODE_HBLANK_NARROW, /* horizontal blanking too narrow */
  128.     MODE_HBLANK_WIDE,   /* horizontal blanking too wide */
  129.     MODE_VSYNC_NARROW,  /* vertical sync too narrow */
  130.     MODE_VSYNC_WIDE,    /* vertical sync too wide */
  131.     MODE_VBLANK_NARROW, /* vertical blanking too narrow */
  132.     MODE_VBLANK_WIDE,   /* vertical blanking too wide */
  133.     MODE_PANEL,         /* exceeds panel dimensions */
  134.     MODE_INTERLACE_WIDTH, /* width too large for interlaced mode */
  135.     MODE_ONE_WIDTH,     /* only one width is supported */
  136.     MODE_ONE_HEIGHT,    /* only one height is supported */
  137.     MODE_ONE_SIZE,      /* only one resolution is supported */
  138.     MODE_BAD = -2,      /* unspecified reason */
  139.     MODE_ERROR  = -1    /* error condition */
  140. } ModeStatus;
  141.  
  142. typedef enum {
  143.     V_PHSYNC    = 0x0001,
  144.     V_NHSYNC    = 0x0002,
  145.     V_PVSYNC    = 0x0004,
  146.     V_NVSYNC    = 0x0008,
  147.     V_INTERLACE = 0x0010,
  148.     V_DBLSCAN   = 0x0020,
  149.     V_CSYNC     = 0x0040,
  150.     V_PCSYNC    = 0x0080,
  151.     V_NCSYNC    = 0x0100,
  152.     V_HSKEW     = 0x0200,       /* hskew provided */
  153.     V_BCAST     = 0x0400,
  154.     V_PIXMUX    = 0x1000,
  155.     V_DBLCLK    = 0x2000,
  156.     V_CLKDIV2   = 0x4000
  157. } ModeFlags;
  158.  
  159. # define M_T_DEFAULT 0x10 /* (VESA) default modes */
  160. # define M_T_USERDEF 0x20       /* One of the modes from the config file */
  161.  
  162.  
  163. /* Video mode */
  164. typedef struct _DisplayModeRec {
  165.     struct _DisplayModeRec *    prev;
  166.     struct _DisplayModeRec *    next;
  167.     char *      name;         /* identifier for the mode */
  168.     ModeStatus                  status;
  169.     int                         type;
  170.  
  171.     /* These are the values that the user sees/provides */
  172.     int       Clock;          /* pixel clock freq */
  173.     int       HDisplay;       /* horizontal timing */
  174.     int                         HSyncStart;
  175.     int                         HSyncEnd;
  176.     int                         HTotal;
  177.     int                         HSkew;
  178.     int       VDisplay;       /* vertical timing */
  179.     int                         VSyncStart;
  180.     int                         VSyncEnd;
  181.     int                         VTotal;
  182.     int                         VScan;
  183.     int                         Flags;
  184.  
  185.   /* These are the values the hardware uses */
  186.     int                         ClockIndex;
  187.     int       SynthClock;     /* Actual clock freq to
  188.                                                  * be programmed */
  189.     int                         CrtcHDisplay;
  190.     int                         CrtcHBlankStart;
  191.     int                         CrtcHSyncStart;
  192.     int                         CrtcHSyncEnd;
  193.     int                         CrtcHBlankEnd;
  194.     int                         CrtcHTotal;
  195.     int                         CrtcHSkew;
  196.     int                         CrtcVDisplay;
  197.     int                         CrtcVBlankStart;
  198.     int                         CrtcVSyncStart;
  199.     int                         CrtcVSyncEnd;
  200.     int                         CrtcVBlankEnd;
  201.     int                         CrtcVTotal;
  202.     Bool                        CrtcHAdjusted;
  203.     Bool                        CrtcVAdjusted;
  204.     int                         PrivSize;
  205.     CARD32*   Private;
  206.     int                         PrivFlags;
  207.  
  208.     float                       HSync, VRefresh;
  209. } DisplayModeRec, *DisplayModePtr;
  210.  
  211. typedef struct
  212. {
  213.     unsigned short      red, green, blue;
  214. } LOCO;
  215.  
  216.  
  217. static void __attribute__ ((always_inline))
  218. __clear (void * dst, unsigned len)
  219. { u32_t tmp;
  220.   asm __volatile__
  221.   (
  222.     "xor eax, eax \n\t"
  223.     "cld \n\t"
  224.     "rep stosb"
  225.     :"=c"(tmp),"=D"(tmp)
  226.     :"c"(len),"D"(dst)
  227.     :"memory","eax","cc"
  228.   );
  229. };
  230.  
  231. static int __attribute__ ((always_inline))
  232. abs (int i)
  233. {
  234.   return i < 0 ? -i : i;
  235. };
  236.  
  237. #define DPMSModeOn  0
  238. #define DPMSModeStandby 1
  239. #define DPMSModeSuspend 2
  240. #define DPMSModeOff     3
  241.  
  242.  
  243.  
  244. #define max(x,y)  (((y)>(x))?(y):(x))
  245. #define min(x,y)  (((y)<(x))?(y):(x))
  246.  
  247.  
  248. #define M_T_BUILTIN 0x01        /* built-in mode */
  249.  
  250.