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  1. /**********************************************************
  2.  * Copyright 2007-2015 VMware, Inc.  All rights reserved.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person
  5.  * obtaining a copy of this software and associated documentation
  6.  * files (the "Software"), to deal in the Software without
  7.  * restriction, including without limitation the rights to use, copy,
  8.  * modify, merge, publish, distribute, sublicense, and/or sell copies
  9.  * of the Software, and to permit persons to whom the Software is
  10.  * furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice shall be
  13.  * included in all copies or substantial portions of the Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18.  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19.  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20.  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21.  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22.  * SOFTWARE.
  23.  *
  24.  **********************************************************/
  25.  
  26. /*
  27.  * svga3d_caps.h --
  28.  *
  29.  *       Definitions for SVGA3D hardware capabilities.  Capabilities
  30.  *       are used to query for optional rendering features during
  31.  *       driver initialization. The capability data is stored as very
  32.  *       basic key/value dictionary within the "FIFO register" memory
  33.  *       area at the beginning of BAR2.
  34.  *
  35.  *       Note that these definitions are only for 3D capabilities.
  36.  *       The SVGA device also has "device capabilities" and "FIFO
  37.  *       capabilities", which are non-3D-specific and are stored as
  38.  *       bitfields rather than key/value pairs.
  39.  */
  40.  
  41. #ifndef _SVGA3D_CAPS_H_
  42. #define _SVGA3D_CAPS_H_
  43.  
  44. #define INCLUDE_ALLOW_MODULE
  45. #define INCLUDE_ALLOW_USERLEVEL
  46.  
  47. #include "includeCheck.h"
  48.  
  49. #include "svga_reg.h"
  50.  
  51. #define SVGA_FIFO_3D_CAPS_SIZE   (SVGA_FIFO_3D_CAPS_LAST - \
  52.                                   SVGA_FIFO_3D_CAPS + 1)
  53.  
  54.  
  55. /*
  56.  * SVGA3dCapsRecordType
  57.  *
  58.  *    Record types that can be found in the caps block.
  59.  *    Related record types are grouped together numerically so that
  60.  *    SVGA3dCaps_FindRecord() can be applied on a range of record
  61.  *    types.
  62.  */
  63.  
  64. typedef enum {
  65.    SVGA3DCAPS_RECORD_UNKNOWN        = 0,
  66.    SVGA3DCAPS_RECORD_DEVCAPS_MIN    = 0x100,
  67.    SVGA3DCAPS_RECORD_DEVCAPS        = 0x100,
  68.    SVGA3DCAPS_RECORD_DEVCAPS_MAX    = 0x1ff,
  69. } SVGA3dCapsRecordType;
  70.  
  71.  
  72. /*
  73.  * SVGA3dCapsRecordHeader
  74.  *
  75.  *    Header field leading each caps block record. Contains the offset (in
  76.  *    register words, NOT bytes) to the next caps block record (or the end
  77.  *    of caps block records which will be a zero word) and the record type
  78.  *    as defined above.
  79.  */
  80.  
  81. typedef
  82. #include "vmware_pack_begin.h"
  83. struct SVGA3dCapsRecordHeader {
  84.    uint32 length;
  85.    SVGA3dCapsRecordType type;
  86. }
  87. #include "vmware_pack_end.h"
  88. SVGA3dCapsRecordHeader;
  89.  
  90.  
  91. /*
  92.  * SVGA3dCapsRecord
  93.  *
  94.  *    Caps block record; "data" is a placeholder for the actual data structure
  95.  *    contained within the record;
  96.  */
  97.  
  98. typedef
  99. #include "vmware_pack_begin.h"
  100. struct SVGA3dCapsRecord {
  101.    SVGA3dCapsRecordHeader header;
  102.    uint32 data[1];
  103. }
  104. #include "vmware_pack_end.h"
  105. SVGA3dCapsRecord;
  106.  
  107.  
  108. typedef uint32 SVGA3dCapPair[2];
  109.  
  110. #endif
  111.