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  1. /*
  2.  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3.  *                VA Linux Systems Inc., Fremont, California.
  4.  * Copyright 2008 Red Hat Inc.
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice shall be included in
  14.  * all copies or substantial portions of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20.  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21.  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22.  * OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Original Authors:
  25.  *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26.  *
  27.  * Kernel port Author: Dave Airlie
  28.  */
  29.  
  30. #ifndef RADEON_MODE_H
  31. #define RADEON_MODE_H
  32.  
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include <drm/drm_dp_helper.h>
  36. #include <drm/drm_fixed.h>
  37. #include <drm/drm_crtc_helper.h>
  38. #include <linux/i2c.h>
  39. #include <linux/i2c-algo-bit.h>
  40.  
  41. struct radeon_bo;
  42. struct radeon_device;
  43.  
  44. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  45. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  46. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  47. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  48.  
  49. enum radeon_rmx_type {
  50.         RMX_OFF,
  51.         RMX_FULL,
  52.         RMX_CENTER,
  53.         RMX_ASPECT
  54. };
  55.  
  56. enum radeon_tv_std {
  57.         TV_STD_NTSC,
  58.         TV_STD_PAL,
  59.         TV_STD_PAL_M,
  60.         TV_STD_PAL_60,
  61.         TV_STD_NTSC_J,
  62.         TV_STD_SCART_PAL,
  63.         TV_STD_SECAM,
  64.         TV_STD_PAL_CN,
  65.         TV_STD_PAL_N,
  66. };
  67.  
  68. enum radeon_underscan_type {
  69.         UNDERSCAN_OFF,
  70.         UNDERSCAN_ON,
  71.         UNDERSCAN_AUTO,
  72. };
  73.  
  74. enum radeon_hpd_id {
  75.         RADEON_HPD_1 = 0,
  76.         RADEON_HPD_2,
  77.         RADEON_HPD_3,
  78.         RADEON_HPD_4,
  79.         RADEON_HPD_5,
  80.         RADEON_HPD_6,
  81.         RADEON_HPD_NONE = 0xff,
  82. };
  83.  
  84. #define RADEON_MAX_I2C_BUS 16
  85.  
  86. /* radeon gpio-based i2c
  87.  * 1. "mask" reg and bits
  88.  *    grabs the gpio pins for software use
  89.  *    0=not held  1=held
  90.  * 2. "a" reg and bits
  91.  *    output pin value
  92.  *    0=low 1=high
  93.  * 3. "en" reg and bits
  94.  *    sets the pin direction
  95.  *    0=input 1=output
  96.  * 4. "y" reg and bits
  97.  *    input pin value
  98.  *    0=low 1=high
  99.  */
  100. struct radeon_i2c_bus_rec {
  101.         bool valid;
  102.         /* id used by atom */
  103.         uint8_t i2c_id;
  104.         /* id used by atom */
  105.         enum radeon_hpd_id hpd;
  106.         /* can be used with hw i2c engine */
  107.         bool hw_capable;
  108.         /* uses multi-media i2c engine */
  109.         bool mm_i2c;
  110.         /* regs and bits */
  111.         uint32_t mask_clk_reg;
  112.         uint32_t mask_data_reg;
  113.         uint32_t a_clk_reg;
  114.         uint32_t a_data_reg;
  115.         uint32_t en_clk_reg;
  116.         uint32_t en_data_reg;
  117.         uint32_t y_clk_reg;
  118.         uint32_t y_data_reg;
  119.         uint32_t mask_clk_mask;
  120.         uint32_t mask_data_mask;
  121.         uint32_t a_clk_mask;
  122.         uint32_t a_data_mask;
  123.         uint32_t en_clk_mask;
  124.         uint32_t en_data_mask;
  125.         uint32_t y_clk_mask;
  126.         uint32_t y_data_mask;
  127. };
  128.  
  129. struct radeon_tmds_pll {
  130.     uint32_t freq;
  131.     uint32_t value;
  132. };
  133.  
  134. #define RADEON_MAX_BIOS_CONNECTOR 16
  135.  
  136. /* pll flags */
  137. #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
  138. #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
  139. #define RADEON_PLL_USE_REF_DIV          (1 << 2)
  140. #define RADEON_PLL_LEGACY               (1 << 3)
  141. #define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
  142. #define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
  143. #define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
  144. #define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
  145. #define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
  146. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  147. #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
  148. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  149. #define RADEON_PLL_USE_POST_DIV         (1 << 12)
  150. #define RADEON_PLL_IS_LCD               (1 << 13)
  151. #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
  152.  
  153. struct radeon_pll {
  154.         /* reference frequency */
  155.         uint32_t reference_freq;
  156.  
  157.         /* fixed dividers */
  158.         uint32_t reference_div;
  159.         uint32_t post_div;
  160.  
  161.         /* pll in/out limits */
  162.         uint32_t pll_in_min;
  163.         uint32_t pll_in_max;
  164.         uint32_t pll_out_min;
  165.         uint32_t pll_out_max;
  166.         uint32_t lcd_pll_out_min;
  167.         uint32_t lcd_pll_out_max;
  168.         uint32_t best_vco;
  169.  
  170.         /* divider limits */
  171.         uint32_t min_ref_div;
  172.         uint32_t max_ref_div;
  173.         uint32_t min_post_div;
  174.         uint32_t max_post_div;
  175.         uint32_t min_feedback_div;
  176.         uint32_t max_feedback_div;
  177.         uint32_t min_frac_feedback_div;
  178.         uint32_t max_frac_feedback_div;
  179.  
  180.         /* flags for the current clock */
  181.         uint32_t flags;
  182.  
  183.         /* pll id */
  184.         uint32_t id;
  185. };
  186.  
  187. struct radeon_i2c_chan {
  188.         struct i2c_adapter adapter;
  189.         struct drm_device *dev;
  190.         union {
  191.                 struct i2c_algo_bit_data bit;
  192.                 struct i2c_algo_dp_aux_data dp;
  193.         } algo;
  194.         struct radeon_i2c_bus_rec rec;
  195. };
  196.  
  197. /* mostly for macs, but really any system without connector tables */
  198. enum radeon_connector_table {
  199.         CT_NONE = 0,
  200.         CT_GENERIC,
  201.         CT_IBOOK,
  202.         CT_POWERBOOK_EXTERNAL,
  203.         CT_POWERBOOK_INTERNAL,
  204.         CT_POWERBOOK_VGA,
  205.         CT_MINI_EXTERNAL,
  206.         CT_MINI_INTERNAL,
  207.         CT_IMAC_G5_ISIGHT,
  208.         CT_EMAC,
  209.         CT_RN50_POWER,
  210.         CT_MAC_X800,
  211.         CT_MAC_G5_9600,
  212.         CT_SAM440EP,
  213.         CT_MAC_G4_SILVER
  214. };
  215.  
  216. enum radeon_dvo_chip {
  217.         DVO_SIL164,
  218.         DVO_SIL1178,
  219. };
  220.  
  221. struct radeon_fbdev;
  222.  
  223. struct radeon_afmt {
  224.         bool enabled;
  225.         int offset;
  226.         bool last_buffer_filled_status;
  227.         int id;
  228. };
  229.  
  230. struct radeon_mode_info {
  231.         struct atom_context *atom_context;
  232.         struct card_info *atom_card_info;
  233.         enum radeon_connector_table connector_table;
  234.         bool mode_config_initialized;
  235.         struct radeon_crtc *crtcs[6];
  236.         struct radeon_afmt *afmt[6];
  237.         /* DVI-I properties */
  238.         struct drm_property *coherent_mode_property;
  239.         /* DAC enable load detect */
  240.         struct drm_property *load_detect_property;
  241.         /* TV standard */
  242.         struct drm_property *tv_std_property;
  243.         /* legacy TMDS PLL detect */
  244.         struct drm_property *tmds_pll_property;
  245.         /* underscan */
  246.         struct drm_property *underscan_property;
  247.         struct drm_property *underscan_hborder_property;
  248.         struct drm_property *underscan_vborder_property;
  249.         /* hardcoded DFP edid from BIOS */
  250.         struct edid *bios_hardcoded_edid;
  251.         int bios_hardcoded_edid_size;
  252.  
  253.         /* pointer to fbdev info structure */
  254.         struct radeon_fbdev *rfbdev;
  255.         /* firmware flags */
  256.         u16 firmware_flags;
  257.         /* pointer to backlight encoder */
  258.         struct radeon_encoder *bl_encoder;
  259. };
  260.  
  261. #define RADEON_MAX_BL_LEVEL 0xFF
  262.  
  263. #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
  264.  
  265. struct radeon_backlight_privdata {
  266.         struct radeon_encoder *encoder;
  267.         uint8_t negative;
  268. };
  269.  
  270. #endif
  271.  
  272. #define MAX_H_CODE_TIMING_LEN 32
  273. #define MAX_V_CODE_TIMING_LEN 32
  274.  
  275. /* need to store these as reading
  276.    back code tables is excessive */
  277. struct radeon_tv_regs {
  278.         uint32_t tv_uv_adr;
  279.         uint32_t timing_cntl;
  280.         uint32_t hrestart;
  281.         uint32_t vrestart;
  282.         uint32_t frestart;
  283.         uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  284.         uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  285. };
  286.  
  287. struct radeon_atom_ss {
  288.         uint16_t percentage;
  289.         uint8_t type;
  290.         uint16_t step;
  291.         uint8_t delay;
  292.         uint8_t range;
  293.         uint8_t refdiv;
  294.         /* asic_ss */
  295.         uint16_t rate;
  296.         uint16_t amount;
  297. };
  298.  
  299. struct radeon_crtc {
  300.         struct drm_crtc base;
  301.         int crtc_id;
  302.         u16 lut_r[256], lut_g[256], lut_b[256];
  303.         bool enabled;
  304.         bool can_tile;
  305.         bool in_mode_set;
  306.         uint32_t crtc_offset;
  307.         struct drm_gem_object *cursor_bo;
  308.         uint64_t cursor_addr;
  309.         int cursor_width;
  310.         int cursor_height;
  311.         uint32_t legacy_display_base_addr;
  312.         uint32_t legacy_cursor_offset;
  313.         enum radeon_rmx_type rmx_type;
  314.         u8 h_border;
  315.         u8 v_border;
  316.         fixed20_12 vsc;
  317.         fixed20_12 hsc;
  318.         struct drm_display_mode native_mode;
  319.         int pll_id;
  320.         int deferred_flip_completion;
  321.         /* pll sharing */
  322.         struct radeon_atom_ss ss;
  323.         bool ss_enabled;
  324.         u32 adjusted_clock;
  325.         int bpc;
  326.         u32 pll_reference_div;
  327.         u32 pll_post_div;
  328.         u32 pll_flags;
  329.         struct drm_encoder *encoder;
  330.         struct drm_connector *connector;
  331. };
  332.  
  333. struct radeon_encoder_primary_dac {
  334.         /* legacy primary dac */
  335.         uint32_t ps2_pdac_adj;
  336. };
  337.  
  338. struct radeon_encoder_lvds {
  339.         /* legacy lvds */
  340.         uint16_t panel_vcc_delay;
  341.         uint8_t  panel_pwr_delay;
  342.         uint8_t  panel_digon_delay;
  343.         uint8_t  panel_blon_delay;
  344.         uint16_t panel_ref_divider;
  345.         uint8_t  panel_post_divider;
  346.         uint16_t panel_fb_divider;
  347.         bool     use_bios_dividers;
  348.         uint32_t lvds_gen_cntl;
  349.         /* panel mode */
  350.         struct drm_display_mode native_mode;
  351.         struct backlight_device *bl_dev;
  352.         int      dpms_mode;
  353.         uint8_t  backlight_level;
  354. };
  355.  
  356. struct radeon_encoder_tv_dac {
  357.         /* legacy tv dac */
  358.         uint32_t ps2_tvdac_adj;
  359.         uint32_t ntsc_tvdac_adj;
  360.         uint32_t pal_tvdac_adj;
  361.  
  362.         int               h_pos;
  363.         int               v_pos;
  364.         int               h_size;
  365.         int               supported_tv_stds;
  366.         bool              tv_on;
  367.         enum radeon_tv_std tv_std;
  368.         struct radeon_tv_regs tv;
  369. };
  370.  
  371. struct radeon_encoder_int_tmds {
  372.         /* legacy int tmds */
  373.         struct radeon_tmds_pll tmds_pll[4];
  374. };
  375.  
  376. struct radeon_encoder_ext_tmds {
  377.         /* tmds over dvo */
  378.         struct radeon_i2c_chan *i2c_bus;
  379.         uint8_t slave_addr;
  380.         enum radeon_dvo_chip dvo_chip;
  381. };
  382.  
  383. /* spread spectrum */
  384. struct radeon_encoder_atom_dig {
  385.         bool linkb;
  386.         /* atom dig */
  387.         bool coherent_mode;
  388.         int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
  389.         /* atom lvds/edp */
  390.         uint32_t lcd_misc;
  391.         uint16_t panel_pwr_delay;
  392.         uint32_t lcd_ss_id;
  393.         /* panel mode */
  394.         struct drm_display_mode native_mode;
  395.         struct backlight_device *bl_dev;
  396.         int dpms_mode;
  397.         uint8_t backlight_level;
  398.         int panel_mode;
  399.         struct radeon_afmt *afmt;
  400. };
  401.  
  402. struct radeon_encoder_atom_dac {
  403.         enum radeon_tv_std tv_std;
  404. };
  405.  
  406. struct radeon_encoder {
  407.     struct drm_encoder base;
  408.         uint32_t encoder_enum;
  409.         uint32_t encoder_id;
  410.         uint32_t devices;
  411.         uint32_t active_device;
  412.         uint32_t flags;
  413.         uint32_t pixel_clock;
  414.         enum radeon_rmx_type rmx_type;
  415.         enum radeon_underscan_type underscan_type;
  416.         uint32_t underscan_hborder;
  417.         uint32_t underscan_vborder;
  418.         struct drm_display_mode native_mode;
  419.         void *enc_priv;
  420.         int audio_polling_active;
  421.         bool is_ext_encoder;
  422.         u16 caps;
  423. };
  424.  
  425. struct radeon_connector_atom_dig {
  426.         uint32_t igp_lane_info;
  427.         /* displayport */
  428.         struct radeon_i2c_chan *dp_i2c_bus;
  429.         u8 dpcd[DP_RECEIVER_CAP_SIZE];
  430.         u8 dp_sink_type;
  431.         int dp_clock;
  432.         int dp_lane_count;
  433.         bool edp_on;
  434. };
  435.  
  436. struct radeon_gpio_rec {
  437.         bool valid;
  438.         u8 id;
  439.         u32 reg;
  440.         u32 mask;
  441. };
  442.  
  443. struct radeon_hpd {
  444.         enum radeon_hpd_id hpd;
  445.         u8 plugged_state;
  446.         struct radeon_gpio_rec gpio;
  447. };
  448.  
  449. struct radeon_router {
  450.         u32 router_id;
  451.         struct radeon_i2c_bus_rec i2c_info;
  452.         u8 i2c_addr;
  453.         /* i2c mux */
  454.         bool ddc_valid;
  455.         u8 ddc_mux_type;
  456.         u8 ddc_mux_control_pin;
  457.         u8 ddc_mux_state;
  458.         /* clock/data mux */
  459.         bool cd_valid;
  460.         u8 cd_mux_type;
  461.         u8 cd_mux_control_pin;
  462.         u8 cd_mux_state;
  463. };
  464.  
  465. struct radeon_connector {
  466.     struct drm_connector base;
  467.         uint32_t connector_id;
  468.         uint32_t devices;
  469.         struct radeon_i2c_chan *ddc_bus;
  470.         /* some systems have an hdmi and vga port with a shared ddc line */
  471.         bool shared_ddc;
  472.         bool use_digital;
  473.         /* we need to mind the EDID between detect
  474.            and get modes due to analog/digital/tvencoder */
  475.         struct edid *edid;
  476.         void *con_priv;
  477.         bool dac_load_detect;
  478.         bool detected_by_load; /* if the connection status was determined by load */
  479.         uint16_t connector_object_id;
  480.         struct radeon_hpd hpd;
  481.         struct radeon_router router;
  482.         struct radeon_i2c_chan *router_bus;
  483. };
  484.  
  485. struct radeon_framebuffer {
  486.    struct drm_framebuffer base;
  487.    struct drm_gem_object *obj;
  488. };
  489.  
  490. #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
  491.                                 ((em) == ATOM_ENCODER_MODE_DP_MST))
  492.  
  493. extern enum radeon_tv_std
  494. radeon_combios_get_tv_info(struct radeon_device *rdev);
  495. extern enum radeon_tv_std
  496. radeon_atombios_get_tv_info(struct radeon_device *rdev);
  497.  
  498. extern struct drm_connector *
  499. radeon_get_connector_for_encoder(struct drm_encoder *encoder);
  500. extern struct drm_connector *
  501. radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
  502. extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
  503.                                     u32 pixel_clock);
  504.  
  505. extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
  506. extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
  507. extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
  508. extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
  509. extern int radeon_get_monitor_bpc(struct drm_connector *connector);
  510.  
  511. extern void radeon_connector_hotplug(struct drm_connector *connector);
  512. extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
  513.                                        struct drm_display_mode *mode);
  514. extern void radeon_dp_set_link_config(struct drm_connector *connector,
  515.                                       const struct drm_display_mode *mode);
  516. extern void radeon_dp_link_train(struct drm_encoder *encoder,
  517.                           struct drm_connector *connector);
  518. extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
  519. extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
  520. extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
  521. extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
  522.                                     struct drm_connector *connector);
  523. extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
  524. extern void radeon_atom_encoder_init(struct radeon_device *rdev);
  525. extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
  526. extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
  527.                                            int action, uint8_t lane_num,
  528.                                            uint8_t lane_set);
  529. extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
  530. extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
  531. extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
  532.                                 u8 write_byte, u8 *read_byte);
  533.  
  534. extern void radeon_i2c_init(struct radeon_device *rdev);
  535. extern void radeon_i2c_fini(struct radeon_device *rdev);
  536. extern void radeon_combios_i2c_init(struct radeon_device *rdev);
  537. extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
  538. extern void radeon_i2c_add(struct radeon_device *rdev,
  539.                            struct radeon_i2c_bus_rec *rec,
  540.                            const char *name);
  541. extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
  542.                                                  struct radeon_i2c_bus_rec *i2c_bus);
  543. extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
  544.                                                     struct radeon_i2c_bus_rec *rec,
  545.                                                     const char *name);
  546. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  547.                                                  struct radeon_i2c_bus_rec *rec,
  548.                                                  const char *name);
  549. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  550. extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
  551.                                    u8 slave_addr,
  552.                                    u8 addr,
  553.                                    u8 *val);
  554. extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
  555.                                    u8 slave_addr,
  556.                                    u8 addr,
  557.                                    u8 val);
  558. extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
  559. extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
  560. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
  561. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  562.  
  563. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  564.  
  565. extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
  566.                                              struct radeon_atom_ss *ss,
  567.                                              int id);
  568. extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
  569.                                              struct radeon_atom_ss *ss,
  570.                                              int id, u32 clock);
  571.  
  572. extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
  573.                                uint64_t freq,
  574.                                uint32_t *dot_clock_p,
  575.                                uint32_t *fb_div_p,
  576.                                uint32_t *frac_fb_div_p,
  577.                                uint32_t *ref_div_p,
  578.                                uint32_t *post_div_p);
  579.  
  580. extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
  581.                                      u32 freq,
  582.                                      u32 *dot_clock_p,
  583.                                      u32 *fb_div_p,
  584.                                      u32 *frac_fb_div_p,
  585.                                      u32 *ref_div_p,
  586.                                      u32 *post_div_p);
  587.  
  588. extern void radeon_setup_encoder_clones(struct drm_device *dev);
  589.  
  590. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  591. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  592. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  593. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  594. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  595. extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
  596. extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
  597. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  598. extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
  599. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  600.  
  601. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  602. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  603.                   struct drm_framebuffer *old_fb);
  604. extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
  605.                                          struct drm_framebuffer *fb,
  606.                                          int x, int y,
  607.                                          enum mode_set_atomic state);
  608. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  609.                                    struct drm_display_mode *mode,
  610.                                    struct drm_display_mode *adjusted_mode,
  611.                                    int x, int y,
  612.                                    struct drm_framebuffer *old_fb);
  613. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  614.  
  615. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  616.                                  struct drm_framebuffer *old_fb);
  617. extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
  618.                                        struct drm_framebuffer *fb,
  619.                                        int x, int y,
  620.                                        enum mode_set_atomic state);
  621. extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
  622.                                    struct drm_framebuffer *fb,
  623.                                    int x, int y, int atomic);
  624. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  625.                                   struct drm_file *file_priv,
  626.                                   uint32_t handle,
  627.                                   uint32_t width,
  628.                                   uint32_t height);
  629. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  630.                                    int x, int y);
  631.  
  632. extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
  633.                                       int *vpos, int *hpos);
  634.  
  635. extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
  636. extern struct edid *
  637. radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
  638. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  639. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  640. extern struct radeon_encoder_atom_dig *
  641. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  642. extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  643.                                    struct radeon_encoder_int_tmds *tmds);
  644. extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  645.                                            struct radeon_encoder_int_tmds *tmds);
  646. extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  647.                                             struct radeon_encoder_int_tmds *tmds);
  648. extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
  649.                                                          struct radeon_encoder_ext_tmds *tmds);
  650. extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
  651.                                                        struct radeon_encoder_ext_tmds *tmds);
  652. extern struct radeon_encoder_primary_dac *
  653. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  654. extern struct radeon_encoder_tv_dac *
  655. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  656. extern struct radeon_encoder_lvds *
  657. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  658. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  659. extern struct radeon_encoder_tv_dac *
  660. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  661. extern struct radeon_encoder_primary_dac *
  662. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  663. extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
  664. extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
  665. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  666. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  667. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  668. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  669. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  670. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  671. extern void
  672. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  673. extern void
  674. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  675. extern void
  676. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  677. extern void
  678. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  679. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  680.                                      u16 blue, int regno);
  681. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  682.                                      u16 *blue, int regno);
  683. int radeon_framebuffer_init(struct drm_device *dev,
  684.                              struct radeon_framebuffer *rfb,
  685.                              struct drm_mode_fb_cmd2 *mode_cmd,
  686.                                                   struct drm_gem_object *obj);
  687.  
  688. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  689. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  690. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  691. void radeon_atombios_init_crtc(struct drm_device *dev,
  692.                                struct radeon_crtc *radeon_crtc);
  693. void radeon_legacy_init_crtc(struct drm_device *dev,
  694.                              struct radeon_crtc *radeon_crtc);
  695.  
  696. void radeon_get_clock_info(struct drm_device *dev);
  697.  
  698. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  699. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  700.  
  701. void radeon_enc_destroy(struct drm_encoder *encoder);
  702. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  703. void radeon_combios_asic_init(struct drm_device *dev);
  704. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  705.                                         const struct drm_display_mode *mode,
  706.                                         struct drm_display_mode *adjusted_mode);
  707. void radeon_panel_mode_fixup(struct drm_encoder *encoder,
  708.                              struct drm_display_mode *adjusted_mode);
  709. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  710.  
  711. /* legacy tv */
  712. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  713.                                       uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  714.                                       uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  715. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  716.                                   uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  717.                                   uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  718. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  719.                                   uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  720.                                   uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  721. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  722.                                struct drm_display_mode *mode,
  723.                                struct drm_display_mode *adjusted_mode);
  724.  
  725. /* fbdev layer */
  726. int radeon_fbdev_init(struct radeon_device *rdev);
  727. void radeon_fbdev_fini(struct radeon_device *rdev);
  728. void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
  729. int radeon_fbdev_total_size(struct radeon_device *rdev);
  730. bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
  731.  
  732. void radeon_fb_output_poll_changed(struct radeon_device *rdev);
  733.  
  734. void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
  735.  
  736. int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
  737. #endif
  738.