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  1. /*
  2.  * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3.  * Copyright © 2006-2007 Intel Corporation
  4.  *   Jesse Barnes <jesse.barnes@intel.com>
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the next
  14.  * paragraph) shall be included in all copies or substantial portions of the
  15.  * Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23.  * DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * Authors:
  26.  *      Eric Anholt <eric@anholt.net>
  27.  */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_atomic_helper.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include "intel_sdvo_regs.h"
  40.  
  41. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42. #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44. #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45.  
  46. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47.                         SDVO_TV_MASK)
  48.  
  49. #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50. #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51. #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54.  
  55.  
  56. static const char * const tv_format_names[] = {
  57.         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58.         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59.         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60.         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61.         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62.         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63.         "SECAM_60"
  64. };
  65.  
  66. #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67.  
  68. struct intel_sdvo {
  69.         struct intel_encoder base;
  70.  
  71.         struct i2c_adapter *i2c;
  72.         u8 slave_addr;
  73.  
  74.         struct i2c_adapter ddc;
  75.  
  76.         /* Register for the SDVO device: SDVOB or SDVOC */
  77.         i915_reg_t sdvo_reg;
  78.  
  79.         /* Active outputs controlled by this SDVO output */
  80.         uint16_t controlled_output;
  81.  
  82.         /*
  83.          * Capabilities of the SDVO device returned by
  84.          * intel_sdvo_get_capabilities()
  85.          */
  86.         struct intel_sdvo_caps caps;
  87.  
  88.         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89.         int pixel_clock_min, pixel_clock_max;
  90.  
  91.         /*
  92.         * For multiple function SDVO device,
  93.         * this is for current attached outputs.
  94.         */
  95.         uint16_t attached_output;
  96.  
  97.         /*
  98.          * Hotplug activation bits for this device
  99.          */
  100.         uint16_t hotplug_active;
  101.  
  102.         /**
  103.          * This is used to select the color range of RBG outputs in HDMI mode.
  104.          * It is only valid when using TMDS encoding and 8 bit per color mode.
  105.          */
  106.         uint32_t color_range;
  107.         bool color_range_auto;
  108.  
  109.         /**
  110.          * HDMI user specified aspect ratio
  111.          */
  112.         enum hdmi_picture_aspect aspect_ratio;
  113.  
  114.         /**
  115.          * This is set if we're going to treat the device as TV-out.
  116.          *
  117.          * While we have these nice friendly flags for output types that ought
  118.          * to decide this for us, the S-Video output on our HDMI+S-Video card
  119.          * shows up as RGB1 (VGA).
  120.          */
  121.         bool is_tv;
  122.  
  123.         enum port port;
  124.  
  125.         /* This is for current tv format name */
  126.         int tv_format_index;
  127.  
  128.         /**
  129.          * This is set if we treat the device as HDMI, instead of DVI.
  130.          */
  131.         bool is_hdmi;
  132.         bool has_hdmi_monitor;
  133.         bool has_hdmi_audio;
  134.         bool rgb_quant_range_selectable;
  135.  
  136.         /**
  137.          * This is set if we detect output of sdvo device as LVDS and
  138.          * have a valid fixed mode to use with the panel.
  139.          */
  140.         bool is_lvds;
  141.  
  142.         /**
  143.          * This is sdvo fixed pannel mode pointer
  144.          */
  145.         struct drm_display_mode *sdvo_lvds_fixed_mode;
  146.  
  147.         /* DDC bus used by this SDVO encoder */
  148.         uint8_t ddc_bus;
  149.  
  150.         /*
  151.          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
  152.          */
  153.         uint8_t dtd_sdvo_flags;
  154. };
  155.  
  156. struct intel_sdvo_connector {
  157.         struct intel_connector base;
  158.  
  159.         /* Mark the type of connector */
  160.         uint16_t output_flag;
  161.  
  162.         enum hdmi_force_audio force_audio;
  163.  
  164.         /* This contains all current supported TV format */
  165.         u8 tv_format_supported[TV_FORMAT_NUM];
  166.         int   format_supported_num;
  167.         struct drm_property *tv_format;
  168.  
  169.         /* add the property for the SDVO-TV */
  170.         struct drm_property *left;
  171.         struct drm_property *right;
  172.         struct drm_property *top;
  173.         struct drm_property *bottom;
  174.         struct drm_property *hpos;
  175.         struct drm_property *vpos;
  176.         struct drm_property *contrast;
  177.         struct drm_property *saturation;
  178.         struct drm_property *hue;
  179.         struct drm_property *sharpness;
  180.         struct drm_property *flicker_filter;
  181.         struct drm_property *flicker_filter_adaptive;
  182.         struct drm_property *flicker_filter_2d;
  183.         struct drm_property *tv_chroma_filter;
  184.         struct drm_property *tv_luma_filter;
  185.         struct drm_property *dot_crawl;
  186.  
  187.         /* add the property for the SDVO-TV/LVDS */
  188.         struct drm_property *brightness;
  189.  
  190.         /* Add variable to record current setting for the above property */
  191.         u32     left_margin, right_margin, top_margin, bottom_margin;
  192.  
  193.         /* this is to get the range of margin.*/
  194.         u32     max_hscan,  max_vscan;
  195.         u32     max_hpos, cur_hpos;
  196.         u32     max_vpos, cur_vpos;
  197.         u32     cur_brightness, max_brightness;
  198.         u32     cur_contrast,   max_contrast;
  199.         u32     cur_saturation, max_saturation;
  200.         u32     cur_hue,        max_hue;
  201.         u32     cur_sharpness,  max_sharpness;
  202.         u32     cur_flicker_filter,             max_flicker_filter;
  203.         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
  204.         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
  205.         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
  206.         u32     cur_tv_luma_filter,     max_tv_luma_filter;
  207.         u32     cur_dot_crawl,  max_dot_crawl;
  208. };
  209.  
  210. static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
  211. {
  212.         return container_of(encoder, struct intel_sdvo, base);
  213. }
  214.  
  215. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  216. {
  217.         return to_sdvo(intel_attached_encoder(connector));
  218. }
  219.  
  220. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  221. {
  222.         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  223. }
  224.  
  225. static bool
  226. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  227. static bool
  228. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  229.                               struct intel_sdvo_connector *intel_sdvo_connector,
  230.                               int type);
  231. static bool
  232. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  233.                                    struct intel_sdvo_connector *intel_sdvo_connector);
  234.  
  235. /**
  236.  * Writes the SDVOB or SDVOC with the given value, but always writes both
  237.  * SDVOB and SDVOC to work around apparent hardware issues (according to
  238.  * comments in the BIOS).
  239.  */
  240. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  241. {
  242.         struct drm_device *dev = intel_sdvo->base.base.dev;
  243.         struct drm_i915_private *dev_priv = dev->dev_private;
  244.         u32 bval = val, cval = val;
  245.         int i;
  246.  
  247.         if (HAS_PCH_SPLIT(dev_priv)) {
  248.                 I915_WRITE(intel_sdvo->sdvo_reg, val);
  249.                 POSTING_READ(intel_sdvo->sdvo_reg);
  250.                 /*
  251.                  * HW workaround, need to write this twice for issue
  252.                  * that may result in first write getting masked.
  253.                  */
  254.                 if (HAS_PCH_IBX(dev)) {
  255.                         I915_WRITE(intel_sdvo->sdvo_reg, val);
  256.                         POSTING_READ(intel_sdvo->sdvo_reg);
  257.                 }
  258.                 return;
  259.         }
  260.  
  261.         if (intel_sdvo->port == PORT_B)
  262.                 cval = I915_READ(GEN3_SDVOC);
  263.         else
  264.                 bval = I915_READ(GEN3_SDVOB);
  265.  
  266.         /*
  267.          * Write the registers twice for luck. Sometimes,
  268.          * writing them only once doesn't appear to 'stick'.
  269.          * The BIOS does this too. Yay, magic
  270.          */
  271.         for (i = 0; i < 2; i++)
  272.         {
  273.                 I915_WRITE(GEN3_SDVOB, bval);
  274.                 POSTING_READ(GEN3_SDVOB);
  275.                 I915_WRITE(GEN3_SDVOC, cval);
  276.                 POSTING_READ(GEN3_SDVOC);
  277.         }
  278. }
  279.  
  280. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  281. {
  282.         struct i2c_msg msgs[] = {
  283.                 {
  284.                         .addr = intel_sdvo->slave_addr,
  285.                         .flags = 0,
  286.                         .len = 1,
  287.                         .buf = &addr,
  288.                 },
  289.                 {
  290.                         .addr = intel_sdvo->slave_addr,
  291.                         .flags = I2C_M_RD,
  292.                         .len = 1,
  293.                         .buf = ch,
  294.                 }
  295.         };
  296.         int ret;
  297.  
  298.         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  299.                 return true;
  300.  
  301.         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  302.         return false;
  303. }
  304.  
  305. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  306. /** Mapping of command numbers to names, for debug output */
  307. static const struct _sdvo_cmd_name {
  308.         u8 cmd;
  309.         const char *name;
  310. } sdvo_cmd_names[] = {
  311.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  312.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  313.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  314.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  315.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  316.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  317.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  318.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  319.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  320.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  321.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  322.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  323.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  324.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  325.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  326.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  327.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  328.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  329.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  330.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  331.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  332.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  333.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  334.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  335.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  336.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  337.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  338.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  339.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  340.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  341.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  342.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  343.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  344.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  345.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  346.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  347.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  348.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  349.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  350.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  351.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  352.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  353.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  354.  
  355.         /* Add the op code for SDVO enhancements */
  356.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  357.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  358.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  359.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  360.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  361.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  362.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  363.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  364.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  365.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  366.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  367.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  368.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  369.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  370.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  371.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  372.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  373.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  374.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  375.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  376.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  377.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  378.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  379.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  380.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  381.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  382.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  383.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  384.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  385.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  386.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  387.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  388.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  389.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  390.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  391.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  392.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  393.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  394.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  395.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  396.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  397.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  398.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  399.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  400.  
  401.         /* HDMI op code */
  402.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  403.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  404.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  405.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  406.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  407.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  408.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  409.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  410.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  411.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  412.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  413.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  414.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  415.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  416.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  417.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  418.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  419.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  420.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  421.         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  422. };
  423.  
  424. #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
  425.  
  426. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  427.                                    const void *args, int args_len)
  428. {
  429.         int i, pos = 0;
  430. #define BUF_LEN 256
  431.         char buffer[BUF_LEN];
  432.  
  433. #define BUF_PRINT(args...) \
  434.         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
  435.  
  436.  
  437.         for (i = 0; i < args_len; i++) {
  438.                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
  439.         }
  440.         for (; i < 8; i++) {
  441.                 BUF_PRINT("   ");
  442.         }
  443.         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  444.                 if (cmd == sdvo_cmd_names[i].cmd) {
  445.                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
  446.                         break;
  447.                 }
  448.         }
  449.         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
  450.                 BUF_PRINT("(%02X)", cmd);
  451.         }
  452.         BUG_ON(pos >= BUF_LEN - 1);
  453. #undef BUF_PRINT
  454. #undef BUF_LEN
  455.  
  456.         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
  457. }
  458.  
  459. static const char * const cmd_status_names[] = {
  460.         "Power on",
  461.         "Success",
  462.         "Not supported",
  463.         "Invalid arg",
  464.         "Pending",
  465.         "Target not specified",
  466.         "Scaling not supported"
  467. };
  468.  
  469. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  470.                                  const void *args, int args_len)
  471. {
  472.         u8 *buf, status;
  473.         struct i2c_msg *msgs;
  474.         int i, ret = true;
  475.  
  476.         /* Would be simpler to allocate both in one go ? */        
  477.         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
  478.         if (!buf)
  479.                 return false;
  480.  
  481.         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  482.         if (!msgs) {
  483.                 kfree(buf);
  484.                 return false;
  485.         }
  486.  
  487.         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  488.  
  489.         for (i = 0; i < args_len; i++) {
  490.                 msgs[i].addr = intel_sdvo->slave_addr;
  491.                 msgs[i].flags = 0;
  492.                 msgs[i].len = 2;
  493.                 msgs[i].buf = buf + 2 *i;
  494.                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  495.                 buf[2*i + 1] = ((u8*)args)[i];
  496.         }
  497.         msgs[i].addr = intel_sdvo->slave_addr;
  498.         msgs[i].flags = 0;
  499.         msgs[i].len = 2;
  500.         msgs[i].buf = buf + 2*i;
  501.         buf[2*i + 0] = SDVO_I2C_OPCODE;
  502.         buf[2*i + 1] = cmd;
  503.  
  504.         /* the following two are to read the response */
  505.         status = SDVO_I2C_CMD_STATUS;
  506.         msgs[i+1].addr = intel_sdvo->slave_addr;
  507.         msgs[i+1].flags = 0;
  508.         msgs[i+1].len = 1;
  509.         msgs[i+1].buf = &status;
  510.  
  511.         msgs[i+2].addr = intel_sdvo->slave_addr;
  512.         msgs[i+2].flags = I2C_M_RD;
  513.         msgs[i+2].len = 1;
  514.         msgs[i+2].buf = &status;
  515.  
  516.         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  517.         if (ret < 0) {
  518.                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  519.                 ret = false;
  520.                 goto out;
  521.         }
  522.         if (ret != i+3) {
  523.                 /* failure in I2C transfer */
  524.                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  525.                 ret = false;
  526.         }
  527.  
  528. out:
  529.         kfree(msgs);
  530.         kfree(buf);
  531.         return ret;
  532. }
  533.  
  534. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  535.                                      void *response, int response_len)
  536. {
  537.         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
  538.         u8 status;
  539.         int i, pos = 0;
  540. #define BUF_LEN 256
  541.         char buffer[BUF_LEN];
  542.  
  543.  
  544.         /*
  545.          * The documentation states that all commands will be
  546.          * processed within 15µs, and that we need only poll
  547.          * the status byte a maximum of 3 times in order for the
  548.          * command to be complete.
  549.          *
  550.          * Check 5 times in case the hardware failed to read the docs.
  551.          *
  552.          * Also beware that the first response by many devices is to
  553.          * reply PENDING and stall for time. TVs are notorious for
  554.          * requiring longer than specified to complete their replies.
  555.          * Originally (in the DDX long ago), the delay was only ever 15ms
  556.          * with an additional delay of 30ms applied for TVs added later after
  557.          * many experiments. To accommodate both sets of delays, we do a
  558.          * sequence of slow checks if the device is falling behind and fails
  559.          * to reply within 5*15µs.
  560.          */
  561.         if (!intel_sdvo_read_byte(intel_sdvo,
  562.                                   SDVO_I2C_CMD_STATUS,
  563.                                   &status))
  564.                 goto log_fail;
  565.  
  566.         while ((status == SDVO_CMD_STATUS_PENDING ||
  567.                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
  568.                 if (retry < 10)
  569.                         msleep(15);
  570.                 else
  571.                         udelay(15);
  572.  
  573.                 if (!intel_sdvo_read_byte(intel_sdvo,
  574.                                           SDVO_I2C_CMD_STATUS,
  575.                                           &status))
  576.                         goto log_fail;
  577.         }
  578.  
  579. #define BUF_PRINT(args...) \
  580.         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
  581.  
  582.         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  583.                 BUF_PRINT("(%s)", cmd_status_names[status]);
  584.         else
  585.                 BUF_PRINT("(??? %d)", status);
  586.  
  587.         if (status != SDVO_CMD_STATUS_SUCCESS)
  588.                 goto log_fail;
  589.  
  590.         /* Read the command response */
  591.         for (i = 0; i < response_len; i++) {
  592.                 if (!intel_sdvo_read_byte(intel_sdvo,
  593.                                           SDVO_I2C_RETURN_0 + i,
  594.                                           &((u8 *)response)[i]))
  595.                         goto log_fail;
  596.                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
  597.         }
  598.         BUG_ON(pos >= BUF_LEN - 1);
  599. #undef BUF_PRINT
  600. #undef BUF_LEN
  601.  
  602.         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
  603.         return true;
  604.  
  605. log_fail:
  606.         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
  607.         return false;
  608. }
  609.  
  610. static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
  611. {
  612.         if (adjusted_mode->crtc_clock >= 100000)
  613.                 return 1;
  614.         else if (adjusted_mode->crtc_clock >= 50000)
  615.                 return 2;
  616.         else
  617.                 return 4;
  618. }
  619.  
  620. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  621.                                               u8 ddc_bus)
  622. {
  623.         /* This must be the immediately preceding write before the i2c xfer */
  624.         return intel_sdvo_write_cmd(intel_sdvo,
  625.                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  626.                                     &ddc_bus, 1);
  627. }
  628.  
  629. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  630. {
  631.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  632.                 return false;
  633.  
  634.         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  635. }
  636.  
  637. static bool
  638. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  639. {
  640.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  641.                 return false;
  642.  
  643.         return intel_sdvo_read_response(intel_sdvo, value, len);
  644. }
  645.  
  646. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  647. {
  648.         struct intel_sdvo_set_target_input_args targets = {0};
  649.         return intel_sdvo_set_value(intel_sdvo,
  650.                                     SDVO_CMD_SET_TARGET_INPUT,
  651.                                     &targets, sizeof(targets));
  652. }
  653.  
  654. /**
  655.  * Return whether each input is trained.
  656.  *
  657.  * This function is making an assumption about the layout of the response,
  658.  * which should be checked against the docs.
  659.  */
  660. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  661. {
  662.         struct intel_sdvo_get_trained_inputs_response response;
  663.  
  664.         BUILD_BUG_ON(sizeof(response) != 1);
  665.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  666.                                   &response, sizeof(response)))
  667.                 return false;
  668.  
  669.         *input_1 = response.input0_trained;
  670.         *input_2 = response.input1_trained;
  671.         return true;
  672. }
  673.  
  674. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  675.                                           u16 outputs)
  676. {
  677.         return intel_sdvo_set_value(intel_sdvo,
  678.                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
  679.                                     &outputs, sizeof(outputs));
  680. }
  681.  
  682. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  683.                                           u16 *outputs)
  684. {
  685.         return intel_sdvo_get_value(intel_sdvo,
  686.                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
  687.                                     outputs, sizeof(*outputs));
  688. }
  689.  
  690. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  691.                                                int mode)
  692. {
  693.         u8 state = SDVO_ENCODER_STATE_ON;
  694.  
  695.         switch (mode) {
  696.         case DRM_MODE_DPMS_ON:
  697.                 state = SDVO_ENCODER_STATE_ON;
  698.                 break;
  699.         case DRM_MODE_DPMS_STANDBY:
  700.                 state = SDVO_ENCODER_STATE_STANDBY;
  701.                 break;
  702.         case DRM_MODE_DPMS_SUSPEND:
  703.                 state = SDVO_ENCODER_STATE_SUSPEND;
  704.                 break;
  705.         case DRM_MODE_DPMS_OFF:
  706.                 state = SDVO_ENCODER_STATE_OFF;
  707.                 break;
  708.         }
  709.  
  710.         return intel_sdvo_set_value(intel_sdvo,
  711.                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  712. }
  713.  
  714. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  715.                                                    int *clock_min,
  716.                                                    int *clock_max)
  717. {
  718.         struct intel_sdvo_pixel_clock_range clocks;
  719.  
  720.         BUILD_BUG_ON(sizeof(clocks) != 4);
  721.         if (!intel_sdvo_get_value(intel_sdvo,
  722.                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  723.                                   &clocks, sizeof(clocks)))
  724.                 return false;
  725.  
  726.         /* Convert the values from units of 10 kHz to kHz. */
  727.         *clock_min = clocks.min * 10;
  728.         *clock_max = clocks.max * 10;
  729.         return true;
  730. }
  731.  
  732. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  733.                                          u16 outputs)
  734. {
  735.         return intel_sdvo_set_value(intel_sdvo,
  736.                                     SDVO_CMD_SET_TARGET_OUTPUT,
  737.                                     &outputs, sizeof(outputs));
  738. }
  739.  
  740. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  741.                                   struct intel_sdvo_dtd *dtd)
  742. {
  743.         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  744.                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  745. }
  746.  
  747. static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  748.                                   struct intel_sdvo_dtd *dtd)
  749. {
  750.         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  751.                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  752. }
  753.  
  754. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  755.                                          struct intel_sdvo_dtd *dtd)
  756. {
  757.         return intel_sdvo_set_timing(intel_sdvo,
  758.                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  759. }
  760.  
  761. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  762.                                          struct intel_sdvo_dtd *dtd)
  763. {
  764.         return intel_sdvo_set_timing(intel_sdvo,
  765.                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  766. }
  767.  
  768. static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
  769.                                         struct intel_sdvo_dtd *dtd)
  770. {
  771.         return intel_sdvo_get_timing(intel_sdvo,
  772.                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
  773. }
  774.  
  775. static bool
  776. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  777.                                          uint16_t clock,
  778.                                          uint16_t width,
  779.                                          uint16_t height)
  780. {
  781.         struct intel_sdvo_preferred_input_timing_args args;
  782.  
  783.         memset(&args, 0, sizeof(args));
  784.         args.clock = clock;
  785.         args.width = width;
  786.         args.height = height;
  787.         args.interlace = 0;
  788.  
  789.         if (intel_sdvo->is_lvds &&
  790.            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  791.             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  792.                 args.scaled = 1;
  793.  
  794.         return intel_sdvo_set_value(intel_sdvo,
  795.                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  796.                                     &args, sizeof(args));
  797. }
  798.  
  799. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  800.                                                   struct intel_sdvo_dtd *dtd)
  801. {
  802.         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  803.         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  804.         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  805.                                     &dtd->part1, sizeof(dtd->part1)) &&
  806.                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  807.                                      &dtd->part2, sizeof(dtd->part2));
  808. }
  809.  
  810. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  811. {
  812.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  813. }
  814.  
  815. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  816.                                          const struct drm_display_mode *mode)
  817. {
  818.         uint16_t width, height;
  819.         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  820.         uint16_t h_sync_offset, v_sync_offset;
  821.         int mode_clock;
  822.  
  823.         memset(dtd, 0, sizeof(*dtd));
  824.  
  825.         width = mode->hdisplay;
  826.         height = mode->vdisplay;
  827.  
  828.         /* do some mode translations */
  829.         h_blank_len = mode->htotal - mode->hdisplay;
  830.         h_sync_len = mode->hsync_end - mode->hsync_start;
  831.  
  832.         v_blank_len = mode->vtotal - mode->vdisplay;
  833.         v_sync_len = mode->vsync_end - mode->vsync_start;
  834.  
  835.         h_sync_offset = mode->hsync_start - mode->hdisplay;
  836.         v_sync_offset = mode->vsync_start - mode->vdisplay;
  837.  
  838.         mode_clock = mode->clock;
  839.         mode_clock /= 10;
  840.         dtd->part1.clock = mode_clock;
  841.  
  842.         dtd->part1.h_active = width & 0xff;
  843.         dtd->part1.h_blank = h_blank_len & 0xff;
  844.         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  845.                 ((h_blank_len >> 8) & 0xf);
  846.         dtd->part1.v_active = height & 0xff;
  847.         dtd->part1.v_blank = v_blank_len & 0xff;
  848.         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  849.                 ((v_blank_len >> 8) & 0xf);
  850.  
  851.         dtd->part2.h_sync_off = h_sync_offset & 0xff;
  852.         dtd->part2.h_sync_width = h_sync_len & 0xff;
  853.         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  854.                 (v_sync_len & 0xf);
  855.         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  856.                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  857.                 ((v_sync_len & 0x30) >> 4);
  858.  
  859.         dtd->part2.dtd_flags = 0x18;
  860.         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  861.                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  862.         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  863.                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  864.         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  865.                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  866.  
  867.         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  868. }
  869.  
  870. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
  871.                                          const struct intel_sdvo_dtd *dtd)
  872. {
  873.         struct drm_display_mode mode = {};
  874.  
  875.         mode.hdisplay = dtd->part1.h_active;
  876.         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  877.         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
  878.         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  879.         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
  880.         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  881.         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
  882.         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
  883.  
  884.         mode.vdisplay = dtd->part1.v_active;
  885.         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  886.         mode.vsync_start = mode.vdisplay;
  887.         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  888.         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  889.         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  890.         mode.vsync_end = mode.vsync_start +
  891.                 (dtd->part2.v_sync_off_width & 0xf);
  892.         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  893.         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
  894.         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
  895.  
  896.         mode.clock = dtd->part1.clock * 10;
  897.  
  898.         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  899.                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
  900.         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  901.                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
  902.         else
  903.                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
  904.         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  905.                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
  906.         else
  907.                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
  908.  
  909.         drm_mode_set_crtcinfo(&mode, 0);
  910.  
  911.         drm_mode_copy(pmode, &mode);
  912. }
  913.  
  914. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  915. {
  916.         struct intel_sdvo_encode encode;
  917.  
  918.         BUILD_BUG_ON(sizeof(encode) != 2);
  919.         return intel_sdvo_get_value(intel_sdvo,
  920.                                   SDVO_CMD_GET_SUPP_ENCODE,
  921.                                   &encode, sizeof(encode));
  922. }
  923.  
  924. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  925.                                   uint8_t mode)
  926. {
  927.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  928. }
  929.  
  930. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  931.                                        uint8_t mode)
  932. {
  933.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  934. }
  935.  
  936. #if 0
  937. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  938. {
  939.         int i, j;
  940.         uint8_t set_buf_index[2];
  941.         uint8_t av_split;
  942.         uint8_t buf_size;
  943.         uint8_t buf[48];
  944.         uint8_t *pos;
  945.  
  946.         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  947.  
  948.         for (i = 0; i <= av_split; i++) {
  949.                 set_buf_index[0] = i; set_buf_index[1] = 0;
  950.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  951.                                      set_buf_index, 2);
  952.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  953.                 intel_sdvo_read_response(encoder, &buf_size, 1);
  954.  
  955.                 pos = buf;
  956.                 for (j = 0; j <= buf_size; j += 8) {
  957.                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  958.                                              NULL, 0);
  959.                         intel_sdvo_read_response(encoder, pos, 8);
  960.                         pos += 8;
  961.                 }
  962.         }
  963. }
  964. #endif
  965.  
  966. static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
  967.                                        unsigned if_index, uint8_t tx_rate,
  968.                                        const uint8_t *data, unsigned length)
  969. {
  970.         uint8_t set_buf_index[2] = { if_index, 0 };
  971.         uint8_t hbuf_size, tmp[8];
  972.         int i;
  973.  
  974.         if (!intel_sdvo_set_value(intel_sdvo,
  975.                                   SDVO_CMD_SET_HBUF_INDEX,
  976.                                   set_buf_index, 2))
  977.                 return false;
  978.  
  979.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
  980.                                   &hbuf_size, 1))
  981.                 return false;
  982.  
  983.         /* Buffer size is 0 based, hooray! */
  984.         hbuf_size++;
  985.  
  986.         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
  987.                       if_index, length, hbuf_size);
  988.  
  989.         for (i = 0; i < hbuf_size; i += 8) {
  990.                 memset(tmp, 0, 8);
  991.                 if (i < length)
  992.                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
  993.  
  994.                 if (!intel_sdvo_set_value(intel_sdvo,
  995.                                           SDVO_CMD_SET_HBUF_DATA,
  996.                                           tmp, 8))
  997.                         return false;
  998.         }
  999.  
  1000.         return intel_sdvo_set_value(intel_sdvo,
  1001.                                     SDVO_CMD_SET_HBUF_TXRATE,
  1002.                                     &tx_rate, 1);
  1003. }
  1004.  
  1005. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
  1006.                                          const struct drm_display_mode *adjusted_mode)
  1007. {
  1008.         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
  1009.         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1010.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  1011.         union hdmi_infoframe frame;
  1012.         int ret;
  1013.         ssize_t len;
  1014.  
  1015.         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
  1016.                                                        adjusted_mode);
  1017.         if (ret < 0) {
  1018.                 DRM_ERROR("couldn't fill AVI infoframe\n");
  1019.                 return false;
  1020.         }
  1021.  
  1022.         if (intel_sdvo->rgb_quant_range_selectable) {
  1023.                 if (intel_crtc->config->limited_color_range)
  1024.                         frame.avi.quantization_range =
  1025.                                 HDMI_QUANTIZATION_RANGE_LIMITED;
  1026.                 else
  1027.                         frame.avi.quantization_range =
  1028.                                 HDMI_QUANTIZATION_RANGE_FULL;
  1029.         }
  1030.  
  1031.         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
  1032.         if (len < 0)
  1033.                 return false;
  1034.  
  1035.         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
  1036.                                           SDVO_HBUF_TX_VSYNC,
  1037.                                           sdvo_data, sizeof(sdvo_data));
  1038. }
  1039.  
  1040. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  1041. {
  1042.         struct intel_sdvo_tv_format format;
  1043.         uint32_t format_map;
  1044.  
  1045.         format_map = 1 << intel_sdvo->tv_format_index;
  1046.         memset(&format, 0, sizeof(format));
  1047.         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  1048.  
  1049.         BUILD_BUG_ON(sizeof(format) != 6);
  1050.         return intel_sdvo_set_value(intel_sdvo,
  1051.                                     SDVO_CMD_SET_TV_FORMAT,
  1052.                                     &format, sizeof(format));
  1053. }
  1054.  
  1055. static bool
  1056. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  1057.                                         const struct drm_display_mode *mode)
  1058. {
  1059.         struct intel_sdvo_dtd output_dtd;
  1060.  
  1061.         if (!intel_sdvo_set_target_output(intel_sdvo,
  1062.                                           intel_sdvo->attached_output))
  1063.                 return false;
  1064.  
  1065.         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  1066.         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  1067.                 return false;
  1068.  
  1069.         return true;
  1070. }
  1071.  
  1072. /* Asks the sdvo controller for the preferred input mode given the output mode.
  1073.  * Unfortunately we have to set up the full output mode to do that. */
  1074. static bool
  1075. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  1076.                                     const struct drm_display_mode *mode,
  1077.                                     struct drm_display_mode *adjusted_mode)
  1078. {
  1079.         struct intel_sdvo_dtd input_dtd;
  1080.  
  1081.         /* Reset the input timing to the screen. Assume always input 0. */
  1082.         if (!intel_sdvo_set_target_input(intel_sdvo))
  1083.                 return false;
  1084.  
  1085.         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  1086.                                                       mode->clock / 10,
  1087.                                                       mode->hdisplay,
  1088.                                                       mode->vdisplay))
  1089.                 return false;
  1090.  
  1091.         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  1092.                                                    &input_dtd))
  1093.                 return false;
  1094.  
  1095.         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  1096.         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
  1097.  
  1098.         return true;
  1099. }
  1100.  
  1101. static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
  1102. {
  1103.         unsigned dotclock = pipe_config->port_clock;
  1104.         struct dpll *clock = &pipe_config->dpll;
  1105.  
  1106.         /* SDVO TV has fixed PLL values depend on its clock range,
  1107.            this mirrors vbios setting. */
  1108.         if (dotclock >= 100000 && dotclock < 140500) {
  1109.                 clock->p1 = 2;
  1110.                 clock->p2 = 10;
  1111.                 clock->n = 3;
  1112.                 clock->m1 = 16;
  1113.                 clock->m2 = 8;
  1114.         } else if (dotclock >= 140500 && dotclock <= 200000) {
  1115.                 clock->p1 = 1;
  1116.                 clock->p2 = 10;
  1117.                 clock->n = 6;
  1118.                 clock->m1 = 12;
  1119.                 clock->m2 = 8;
  1120.         } else {
  1121.                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
  1122.         }
  1123.  
  1124.         pipe_config->clock_set = true;
  1125. }
  1126.  
  1127. static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
  1128.                                       struct intel_crtc_state *pipe_config)
  1129. {
  1130.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1131.         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  1132.         struct drm_display_mode *mode = &pipe_config->base.mode;
  1133.  
  1134.         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
  1135.         pipe_config->pipe_bpp = 8*3;
  1136.  
  1137.         if (HAS_PCH_SPLIT(encoder->base.dev))
  1138.                 pipe_config->has_pch_encoder = true;
  1139.  
  1140.         /* We need to construct preferred input timings based on our
  1141.          * output timings.  To do that, we have to set the output
  1142.          * timings, even though this isn't really the right place in
  1143.          * the sequence to do it. Oh well.
  1144.          */
  1145.         if (intel_sdvo->is_tv) {
  1146.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  1147.                         return false;
  1148.  
  1149.                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  1150.                                                            mode,
  1151.                                                            adjusted_mode);
  1152.                 pipe_config->sdvo_tv_clock = true;
  1153.         } else if (intel_sdvo->is_lvds) {
  1154.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  1155.                                                              intel_sdvo->sdvo_lvds_fixed_mode))
  1156.                         return false;
  1157.  
  1158.                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  1159.                                                            mode,
  1160.                                                            adjusted_mode);
  1161.         }
  1162.  
  1163.         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
  1164.          * SDVO device will factor out the multiplier during mode_set.
  1165.          */
  1166.         pipe_config->pixel_multiplier =
  1167.                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
  1168.  
  1169.         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
  1170.  
  1171.         if (intel_sdvo->color_range_auto) {
  1172.                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
  1173.                 /* FIXME: This bit is only valid when using TMDS encoding and 8
  1174.                  * bit per color mode. */
  1175.                 if (pipe_config->has_hdmi_sink &&
  1176.                     drm_match_cea_mode(adjusted_mode) > 1)
  1177.                         pipe_config->limited_color_range = true;
  1178.         } else {
  1179.                 if (pipe_config->has_hdmi_sink &&
  1180.                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
  1181.                         pipe_config->limited_color_range = true;
  1182.         }
  1183.  
  1184.         /* Clock computation needs to happen after pixel multiplier. */
  1185.         if (intel_sdvo->is_tv)
  1186.                 i9xx_adjust_sdvo_tv_clock(pipe_config);
  1187.  
  1188.         /* Set user selected PAR to incoming mode's member */
  1189.         if (intel_sdvo->is_hdmi)
  1190.                 adjusted_mode->picture_aspect_ratio = intel_sdvo->aspect_ratio;
  1191.  
  1192.         return true;
  1193. }
  1194.  
  1195. static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
  1196. {
  1197.         struct drm_device *dev = intel_encoder->base.dev;
  1198.         struct drm_i915_private *dev_priv = dev->dev_private;
  1199.         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
  1200.         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
  1201.         struct drm_display_mode *mode = &crtc->config->base.mode;
  1202.         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
  1203.         u32 sdvox;
  1204.         struct intel_sdvo_in_out_map in_out;
  1205.         struct intel_sdvo_dtd input_dtd, output_dtd;
  1206.         int rate;
  1207.  
  1208.         if (!mode)
  1209.                 return;
  1210.  
  1211.         /* First, set the input mapping for the first input to our controlled
  1212.          * output. This is only correct if we're a single-input device, in
  1213.          * which case the first input is the output from the appropriate SDVO
  1214.          * channel on the motherboard.  In a two-input device, the first input
  1215.          * will be SDVOB and the second SDVOC.
  1216.          */
  1217.         in_out.in0 = intel_sdvo->attached_output;
  1218.         in_out.in1 = 0;
  1219.  
  1220.         intel_sdvo_set_value(intel_sdvo,
  1221.                              SDVO_CMD_SET_IN_OUT_MAP,
  1222.                              &in_out, sizeof(in_out));
  1223.  
  1224.         /* Set the output timings to the screen */
  1225.         if (!intel_sdvo_set_target_output(intel_sdvo,
  1226.                                           intel_sdvo->attached_output))
  1227.                 return;
  1228.  
  1229.         /* lvds has a special fixed output timing. */
  1230.         if (intel_sdvo->is_lvds)
  1231.                 intel_sdvo_get_dtd_from_mode(&output_dtd,
  1232.                                              intel_sdvo->sdvo_lvds_fixed_mode);
  1233.         else
  1234.                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  1235.         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  1236.                 DRM_INFO("Setting output timings on %s failed\n",
  1237.                          SDVO_NAME(intel_sdvo));
  1238.  
  1239.         /* Set the input timing to the screen. Assume always input 0. */
  1240.         if (!intel_sdvo_set_target_input(intel_sdvo))
  1241.                 return;
  1242.  
  1243.         if (crtc->config->has_hdmi_sink) {
  1244.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  1245.                 intel_sdvo_set_colorimetry(intel_sdvo,
  1246.                                            SDVO_COLORIMETRY_RGB256);
  1247.                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
  1248.         } else
  1249.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  1250.  
  1251.         if (intel_sdvo->is_tv &&
  1252.             !intel_sdvo_set_tv_format(intel_sdvo))
  1253.                 return;
  1254.  
  1255.         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  1256.  
  1257.         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
  1258.                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
  1259.         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  1260.                 DRM_INFO("Setting input timings on %s failed\n",
  1261.                          SDVO_NAME(intel_sdvo));
  1262.  
  1263.         switch (crtc->config->pixel_multiplier) {
  1264.         default:
  1265.                 WARN(1, "unknown pixel multiplier specified\n");
  1266.         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  1267.         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  1268.         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  1269.         }
  1270.         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  1271.                 return;
  1272.  
  1273.         /* Set the SDVO control regs. */
  1274.         if (INTEL_INFO(dev)->gen >= 4) {
  1275.                 /* The real mode polarity is set by the SDVO commands, using
  1276.                  * struct intel_sdvo_dtd. */
  1277.                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  1278.                 if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range)
  1279.                         sdvox |= HDMI_COLOR_RANGE_16_235;
  1280.                 if (INTEL_INFO(dev)->gen < 5)
  1281.                         sdvox |= SDVO_BORDER_ENABLE;
  1282.         } else {
  1283.                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
  1284.                 if (intel_sdvo->port == PORT_B)
  1285.                         sdvox &= SDVOB_PRESERVE_MASK;
  1286.                 else
  1287.                         sdvox &= SDVOC_PRESERVE_MASK;
  1288.                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  1289.         }
  1290.  
  1291.         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  1292.                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
  1293.         else
  1294.                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
  1295.  
  1296.         if (intel_sdvo->has_hdmi_audio)
  1297.                 sdvox |= SDVO_AUDIO_ENABLE;
  1298.  
  1299.         if (INTEL_INFO(dev)->gen >= 4) {
  1300.                 /* done in crtc_mode_set as the dpll_md reg must be written early */
  1301.         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  1302.                 /* done in crtc_mode_set as it lives inside the dpll register */
  1303.         } else {
  1304.                 sdvox |= (crtc->config->pixel_multiplier - 1)
  1305.                         << SDVO_PORT_MULTIPLY_SHIFT;
  1306.         }
  1307.  
  1308.         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  1309.             INTEL_INFO(dev)->gen < 5)
  1310.                 sdvox |= SDVO_STALL_SELECT;
  1311.         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1312. }
  1313.  
  1314. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  1315. {
  1316.         struct intel_sdvo_connector *intel_sdvo_connector =
  1317.                 to_intel_sdvo_connector(&connector->base);
  1318.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1319.         u16 active_outputs = 0;
  1320.  
  1321.         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1322.  
  1323.         if (active_outputs & intel_sdvo_connector->output_flag)
  1324.                 return true;
  1325.         else
  1326.                 return false;
  1327. }
  1328.  
  1329. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1330.                                     enum pipe *pipe)
  1331. {
  1332.         struct drm_device *dev = encoder->base.dev;
  1333.         struct drm_i915_private *dev_priv = dev->dev_private;
  1334.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1335.         u16 active_outputs = 0;
  1336.         u32 tmp;
  1337.  
  1338.         tmp = I915_READ(intel_sdvo->sdvo_reg);
  1339.         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1340.  
  1341.         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
  1342.                 return false;
  1343.  
  1344.         if (HAS_PCH_CPT(dev))
  1345.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  1346.         else
  1347.                 *pipe = PORT_TO_PIPE(tmp);
  1348.  
  1349.         return true;
  1350. }
  1351.  
  1352. static void intel_sdvo_get_config(struct intel_encoder *encoder,
  1353.                                   struct intel_crtc_state *pipe_config)
  1354. {
  1355.         struct drm_device *dev = encoder->base.dev;
  1356.         struct drm_i915_private *dev_priv = dev->dev_private;
  1357.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1358.         struct intel_sdvo_dtd dtd;
  1359.         int encoder_pixel_multiplier = 0;
  1360.         int dotclock;
  1361.         u32 flags = 0, sdvox;
  1362.         u8 val;
  1363.         bool ret;
  1364.  
  1365.         sdvox = I915_READ(intel_sdvo->sdvo_reg);
  1366.  
  1367.         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
  1368.         if (!ret) {
  1369.                 /* Some sdvo encoders are not spec compliant and don't
  1370.                  * implement the mandatory get_timings function. */
  1371.                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
  1372.                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
  1373.         } else {
  1374.                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  1375.                         flags |= DRM_MODE_FLAG_PHSYNC;
  1376.                 else
  1377.                         flags |= DRM_MODE_FLAG_NHSYNC;
  1378.  
  1379.                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  1380.                         flags |= DRM_MODE_FLAG_PVSYNC;
  1381.                 else
  1382.                         flags |= DRM_MODE_FLAG_NVSYNC;
  1383.         }
  1384.  
  1385.         pipe_config->base.adjusted_mode.flags |= flags;
  1386.  
  1387.         /*
  1388.          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
  1389.          * the sdvo port register, on all other platforms it is part of the dpll
  1390.          * state. Since the general pipe state readout happens before the
  1391.          * encoder->get_config we so already have a valid pixel multplier on all
  1392.          * other platfroms.
  1393.          */
  1394.         if (IS_I915G(dev) || IS_I915GM(dev)) {
  1395.                 pipe_config->pixel_multiplier =
  1396.                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
  1397.                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
  1398.         }
  1399.  
  1400.         dotclock = pipe_config->port_clock;
  1401.         if (pipe_config->pixel_multiplier)
  1402.                 dotclock /= pipe_config->pixel_multiplier;
  1403.  
  1404.         if (HAS_PCH_SPLIT(dev))
  1405.                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
  1406.  
  1407.         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
  1408.  
  1409.         /* Cross check the port pixel multiplier with the sdvo encoder state. */
  1410.         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
  1411.                                  &val, 1)) {
  1412.                 switch (val) {
  1413.                 case SDVO_CLOCK_RATE_MULT_1X:
  1414.                         encoder_pixel_multiplier = 1;
  1415.                         break;
  1416.                 case SDVO_CLOCK_RATE_MULT_2X:
  1417.                         encoder_pixel_multiplier = 2;
  1418.                         break;
  1419.                 case SDVO_CLOCK_RATE_MULT_4X:
  1420.                         encoder_pixel_multiplier = 4;
  1421.                         break;
  1422.                 }
  1423.         }
  1424.  
  1425.         if (sdvox & HDMI_COLOR_RANGE_16_235)
  1426.                 pipe_config->limited_color_range = true;
  1427.  
  1428.         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
  1429.                                  &val, 1)) {
  1430.                 if (val == SDVO_ENCODE_HDMI)
  1431.                         pipe_config->has_hdmi_sink = true;
  1432.         }
  1433.  
  1434.         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
  1435.              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
  1436.              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
  1437. }
  1438.  
  1439. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1440. {
  1441.         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1442.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1443.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  1444.         u32 temp;
  1445.  
  1446.         intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1447.         if (0)
  1448.                 intel_sdvo_set_encoder_power_state(intel_sdvo,
  1449.                                                    DRM_MODE_DPMS_OFF);
  1450.  
  1451.         temp = I915_READ(intel_sdvo->sdvo_reg);
  1452.  
  1453.         temp &= ~SDVO_ENABLE;
  1454.         intel_sdvo_write_sdvox(intel_sdvo, temp);
  1455.  
  1456.         /*
  1457.          * HW workaround for IBX, we need to move the port
  1458.          * to transcoder A after disabling it to allow the
  1459.          * matching DP port to be enabled on transcoder A.
  1460.          */
  1461.         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
  1462.                 /*
  1463.                  * We get CPU/PCH FIFO underruns on the other pipe when
  1464.                  * doing the workaround. Sweep them under the rug.
  1465.                  */
  1466.                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
  1467.                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
  1468.  
  1469.                 temp &= ~SDVO_PIPE_B_SELECT;
  1470.                 temp |= SDVO_ENABLE;
  1471.                 intel_sdvo_write_sdvox(intel_sdvo, temp);
  1472.  
  1473.                 temp &= ~SDVO_ENABLE;
  1474.                 intel_sdvo_write_sdvox(intel_sdvo, temp);
  1475.  
  1476.                 intel_wait_for_vblank_if_active(dev_priv->dev, PIPE_A);
  1477.                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
  1478.                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
  1479.         }
  1480. }
  1481.  
  1482. static void pch_disable_sdvo(struct intel_encoder *encoder)
  1483. {
  1484. }
  1485.  
  1486. static void pch_post_disable_sdvo(struct intel_encoder *encoder)
  1487. {
  1488.         intel_disable_sdvo(encoder);
  1489. }
  1490.  
  1491. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1492. {
  1493.         struct drm_device *dev = encoder->base.dev;
  1494.         struct drm_i915_private *dev_priv = dev->dev_private;
  1495.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1496.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1497.         u32 temp;
  1498.         bool input1, input2;
  1499.         int i;
  1500.         bool success;
  1501.  
  1502.         temp = I915_READ(intel_sdvo->sdvo_reg);
  1503.         temp |= SDVO_ENABLE;
  1504.         intel_sdvo_write_sdvox(intel_sdvo, temp);
  1505.  
  1506.         for (i = 0; i < 2; i++)
  1507.                 intel_wait_for_vblank(dev, intel_crtc->pipe);
  1508.  
  1509.         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1510.         /* Warn if the device reported failure to sync.
  1511.          * A lot of SDVO devices fail to notify of sync, but it's
  1512.          * a given it the status is a success, we succeeded.
  1513.          */
  1514.         if (success && !input1) {
  1515.                 DRM_DEBUG_KMS("First %s output reported failure to "
  1516.                                 "sync\n", SDVO_NAME(intel_sdvo));
  1517.         }
  1518.  
  1519.         if (0)
  1520.                 intel_sdvo_set_encoder_power_state(intel_sdvo,
  1521.                                                    DRM_MODE_DPMS_ON);
  1522.         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1523. }
  1524.  
  1525. static enum drm_mode_status
  1526. intel_sdvo_mode_valid(struct drm_connector *connector,
  1527.                       struct drm_display_mode *mode)
  1528. {
  1529.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1530.         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  1531.  
  1532.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1533.                 return MODE_NO_DBLESCAN;
  1534.  
  1535.         if (intel_sdvo->pixel_clock_min > mode->clock)
  1536.                 return MODE_CLOCK_LOW;
  1537.  
  1538.         if (intel_sdvo->pixel_clock_max < mode->clock)
  1539.                 return MODE_CLOCK_HIGH;
  1540.  
  1541.         if (mode->clock > max_dotclk)
  1542.                 return MODE_CLOCK_HIGH;
  1543.  
  1544.         if (intel_sdvo->is_lvds) {
  1545.                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1546.                         return MODE_PANEL;
  1547.  
  1548.                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1549.                         return MODE_PANEL;
  1550.         }
  1551.  
  1552.         return MODE_OK;
  1553. }
  1554.  
  1555. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1556. {
  1557.         BUILD_BUG_ON(sizeof(*caps) != 8);
  1558.         if (!intel_sdvo_get_value(intel_sdvo,
  1559.                                   SDVO_CMD_GET_DEVICE_CAPS,
  1560.                                   caps, sizeof(*caps)))
  1561.                 return false;
  1562.  
  1563.         DRM_DEBUG_KMS("SDVO capabilities:\n"
  1564.                       "  vendor_id: %d\n"
  1565.                       "  device_id: %d\n"
  1566.                       "  device_rev_id: %d\n"
  1567.                       "  sdvo_version_major: %d\n"
  1568.                       "  sdvo_version_minor: %d\n"
  1569.                       "  sdvo_inputs_mask: %d\n"
  1570.                       "  smooth_scaling: %d\n"
  1571.                       "  sharp_scaling: %d\n"
  1572.                       "  up_scaling: %d\n"
  1573.                       "  down_scaling: %d\n"
  1574.                       "  stall_support: %d\n"
  1575.                       "  output_flags: %d\n",
  1576.                       caps->vendor_id,
  1577.                       caps->device_id,
  1578.                       caps->device_rev_id,
  1579.                       caps->sdvo_version_major,
  1580.                       caps->sdvo_version_minor,
  1581.                       caps->sdvo_inputs_mask,
  1582.                       caps->smooth_scaling,
  1583.                       caps->sharp_scaling,
  1584.                       caps->up_scaling,
  1585.                       caps->down_scaling,
  1586.                       caps->stall_support,
  1587.                       caps->output_flags);
  1588.  
  1589.         return true;
  1590. }
  1591.  
  1592. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1593. {
  1594.         struct drm_device *dev = intel_sdvo->base.base.dev;
  1595.         uint16_t hotplug;
  1596.  
  1597.         if (!I915_HAS_HOTPLUG(dev))
  1598.                 return 0;
  1599.  
  1600.         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1601.          * on the line. */
  1602.         if (IS_I945G(dev) || IS_I945GM(dev))
  1603.                 return 0;
  1604.  
  1605.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1606.                                         &hotplug, sizeof(hotplug)))
  1607.                 return 0;
  1608.  
  1609.         return hotplug;
  1610. }
  1611.  
  1612. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1613. {
  1614.         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
  1615.  
  1616.         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1617.                         &intel_sdvo->hotplug_active, 2);
  1618. }
  1619.  
  1620. static bool
  1621. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1622. {
  1623.         /* Is there more than one type of output? */
  1624.         return hweight16(intel_sdvo->caps.output_flags) > 1;
  1625. }
  1626.  
  1627. static struct edid *
  1628. intel_sdvo_get_edid(struct drm_connector *connector)
  1629. {
  1630.         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1631.         return drm_get_edid(connector, &sdvo->ddc);
  1632. }
  1633.  
  1634. /* Mac mini hack -- use the same DDC as the analog connector */
  1635. static struct edid *
  1636. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1637. {
  1638.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1639.  
  1640.         return drm_get_edid(connector,
  1641.                             intel_gmbus_get_adapter(dev_priv,
  1642.                                                     dev_priv->vbt.crt_ddc_pin));
  1643. }
  1644.  
  1645. static enum drm_connector_status
  1646. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1647. {
  1648.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1649.         enum drm_connector_status status;
  1650.         struct edid *edid;
  1651.  
  1652.         edid = intel_sdvo_get_edid(connector);
  1653.  
  1654.         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1655.                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1656.  
  1657.                 /*
  1658.                  * Don't use the 1 as the argument of DDC bus switch to get
  1659.                  * the EDID. It is used for SDVO SPD ROM.
  1660.                  */
  1661.                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1662.                         intel_sdvo->ddc_bus = ddc;
  1663.                         edid = intel_sdvo_get_edid(connector);
  1664.                         if (edid)
  1665.                                 break;
  1666.                 }
  1667.                 /*
  1668.                  * If we found the EDID on the other bus,
  1669.                  * assume that is the correct DDC bus.
  1670.                  */
  1671.                 if (edid == NULL)
  1672.                         intel_sdvo->ddc_bus = saved_ddc;
  1673.         }
  1674.  
  1675.         /*
  1676.          * When there is no edid and no monitor is connected with VGA
  1677.          * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1678.          */
  1679.         if (edid == NULL)
  1680.                 edid = intel_sdvo_get_analog_edid(connector);
  1681.  
  1682.         status = connector_status_unknown;
  1683.         if (edid != NULL) {
  1684.                 /* DDC bus is shared, match EDID to connector type */
  1685.                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1686.                         status = connector_status_connected;
  1687.                         if (intel_sdvo->is_hdmi) {
  1688.                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1689.                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1690.                                 intel_sdvo->rgb_quant_range_selectable =
  1691.                                         drm_rgb_quant_range_selectable(edid);
  1692.                         }
  1693.                 } else
  1694.                         status = connector_status_disconnected;
  1695.                 kfree(edid);
  1696.         }
  1697.  
  1698.         if (status == connector_status_connected) {
  1699.                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1700.                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1701.                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1702.         }
  1703.  
  1704.         return status;
  1705. }
  1706.  
  1707. static bool
  1708. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1709.                                   struct edid *edid)
  1710. {
  1711.         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1712.         bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1713.  
  1714.         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1715.                       connector_is_digital, monitor_is_digital);
  1716.         return connector_is_digital == monitor_is_digital;
  1717. }
  1718.  
  1719. static enum drm_connector_status
  1720. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1721. {
  1722.         uint16_t response;
  1723.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1724.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1725.         enum drm_connector_status ret;
  1726.  
  1727.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  1728.                       connector->base.id, connector->name);
  1729.  
  1730.         if (!intel_sdvo_get_value(intel_sdvo,
  1731.                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
  1732.                                   &response, 2))
  1733.                 return connector_status_unknown;
  1734.  
  1735.         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1736.                       response & 0xff, response >> 8,
  1737.                       intel_sdvo_connector->output_flag);
  1738.  
  1739.         if (response == 0)
  1740.                 return connector_status_disconnected;
  1741.  
  1742.         intel_sdvo->attached_output = response;
  1743.  
  1744.         intel_sdvo->has_hdmi_monitor = false;
  1745.         intel_sdvo->has_hdmi_audio = false;
  1746.         intel_sdvo->rgb_quant_range_selectable = false;
  1747.  
  1748.         if ((intel_sdvo_connector->output_flag & response) == 0)
  1749.                 ret = connector_status_disconnected;
  1750.         else if (IS_TMDS(intel_sdvo_connector))
  1751.                 ret = intel_sdvo_tmds_sink_detect(connector);
  1752.         else {
  1753.                 struct edid *edid;
  1754.  
  1755.                 /* if we have an edid check it matches the connection */
  1756.                 edid = intel_sdvo_get_edid(connector);
  1757.                 if (edid == NULL)
  1758.                         edid = intel_sdvo_get_analog_edid(connector);
  1759.                 if (edid != NULL) {
  1760.                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1761.                                                               edid))
  1762.                                 ret = connector_status_connected;
  1763.                         else
  1764.                                 ret = connector_status_disconnected;
  1765.  
  1766.                         kfree(edid);
  1767.                 } else
  1768.                         ret = connector_status_connected;
  1769.         }
  1770.  
  1771.         /* May update encoder flag for like clock for SDVO TV, etc.*/
  1772.         if (ret == connector_status_connected) {
  1773.                 intel_sdvo->is_tv = false;
  1774.                 intel_sdvo->is_lvds = false;
  1775.  
  1776.                 if (response & SDVO_TV_MASK)
  1777.                         intel_sdvo->is_tv = true;
  1778.                 if (response & SDVO_LVDS_MASK)
  1779.                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1780.         }
  1781.  
  1782.         return ret;
  1783. }
  1784.  
  1785. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1786. {
  1787.         struct edid *edid;
  1788.  
  1789.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  1790.                       connector->base.id, connector->name);
  1791.  
  1792.         /* set the bus switch and get the modes */
  1793.         edid = intel_sdvo_get_edid(connector);
  1794.  
  1795.         /*
  1796.          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
  1797.          * link between analog and digital outputs. So, if the regular SDVO
  1798.          * DDC fails, check to see if the analog output is disconnected, in
  1799.          * which case we'll look there for the digital DDC data.
  1800.          */
  1801.         if (edid == NULL)
  1802.                 edid = intel_sdvo_get_analog_edid(connector);
  1803.  
  1804.         if (edid != NULL) {
  1805.                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1806.                                                       edid)) {
  1807.                         drm_mode_connector_update_edid_property(connector, edid);
  1808.                         drm_add_edid_modes(connector, edid);
  1809.                 }
  1810.  
  1811.                 kfree(edid);
  1812.         }
  1813. }
  1814.  
  1815. /*
  1816.  * Set of SDVO TV modes.
  1817.  * Note!  This is in reply order (see loop in get_tv_modes).
  1818.  * XXX: all 60Hz refresh?
  1819.  */
  1820. static const struct drm_display_mode sdvo_tv_modes[] = {
  1821.         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1822.                    416, 0, 200, 201, 232, 233, 0,
  1823.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1824.         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1825.                    416, 0, 240, 241, 272, 273, 0,
  1826.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1827.         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1828.                    496, 0, 300, 301, 332, 333, 0,
  1829.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1830.         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1831.                    736, 0, 350, 351, 382, 383, 0,
  1832.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1833.         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1834.                    736, 0, 400, 401, 432, 433, 0,
  1835.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1836.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1837.                    736, 0, 480, 481, 512, 513, 0,
  1838.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1839.         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1840.                    800, 0, 480, 481, 512, 513, 0,
  1841.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1842.         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1843.                    800, 0, 576, 577, 608, 609, 0,
  1844.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1845.         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1846.                    816, 0, 350, 351, 382, 383, 0,
  1847.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1848.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1849.                    816, 0, 400, 401, 432, 433, 0,
  1850.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1851.         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1852.                    816, 0, 480, 481, 512, 513, 0,
  1853.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1854.         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1855.                    816, 0, 540, 541, 572, 573, 0,
  1856.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1857.         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1858.                    816, 0, 576, 577, 608, 609, 0,
  1859.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1860.         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1861.                    864, 0, 576, 577, 608, 609, 0,
  1862.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1863.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1864.                    896, 0, 600, 601, 632, 633, 0,
  1865.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1866.         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1867.                    928, 0, 624, 625, 656, 657, 0,
  1868.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1869.         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1870.                    1016, 0, 766, 767, 798, 799, 0,
  1871.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1872.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1873.                    1120, 0, 768, 769, 800, 801, 0,
  1874.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1875.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1876.                    1376, 0, 1024, 1025, 1056, 1057, 0,
  1877.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1878. };
  1879.  
  1880. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1881. {
  1882.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1883.         struct intel_sdvo_sdtv_resolution_request tv_res;
  1884.         uint32_t reply = 0, format_map = 0;
  1885.         int i;
  1886.  
  1887.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  1888.                       connector->base.id, connector->name);
  1889.  
  1890.         /* Read the list of supported input resolutions for the selected TV
  1891.          * format.
  1892.          */
  1893.         format_map = 1 << intel_sdvo->tv_format_index;
  1894.         memcpy(&tv_res, &format_map,
  1895.                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1896.  
  1897.         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1898.                 return;
  1899.  
  1900.         BUILD_BUG_ON(sizeof(tv_res) != 3);
  1901.         if (!intel_sdvo_write_cmd(intel_sdvo,
  1902.                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1903.                                   &tv_res, sizeof(tv_res)))
  1904.                 return;
  1905.         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1906.                 return;
  1907.  
  1908.         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1909.                 if (reply & (1 << i)) {
  1910.                         struct drm_display_mode *nmode;
  1911.                         nmode = drm_mode_duplicate(connector->dev,
  1912.                                                    &sdvo_tv_modes[i]);
  1913.                         if (nmode)
  1914.                                 drm_mode_probed_add(connector, nmode);
  1915.                 }
  1916. }
  1917.  
  1918. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1919. {
  1920.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1921.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1922.         struct drm_display_mode *newmode;
  1923.  
  1924.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  1925.                       connector->base.id, connector->name);
  1926.  
  1927.         /*
  1928.          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
  1929.          * SDVO->LVDS transcoders can't cope with the EDID mode.
  1930.          */
  1931.         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
  1932.                 newmode = drm_mode_duplicate(connector->dev,
  1933.                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
  1934.                 if (newmode != NULL) {
  1935.                         /* Guarantee the mode is preferred */
  1936.                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1937.                                          DRM_MODE_TYPE_DRIVER);
  1938.                         drm_mode_probed_add(connector, newmode);
  1939.                 }
  1940.         }
  1941.  
  1942.         /*
  1943.          * Attempt to get the mode list from DDC.
  1944.          * Assume that the preferred modes are
  1945.          * arranged in priority order.
  1946.          */
  1947.         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
  1948.  
  1949.         list_for_each_entry(newmode, &connector->probed_modes, head) {
  1950.                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1951.                         intel_sdvo->sdvo_lvds_fixed_mode =
  1952.                                 drm_mode_duplicate(connector->dev, newmode);
  1953.  
  1954.                         intel_sdvo->is_lvds = true;
  1955.                         break;
  1956.                 }
  1957.         }
  1958. }
  1959.  
  1960. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1961. {
  1962.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1963.  
  1964.         if (IS_TV(intel_sdvo_connector))
  1965.                 intel_sdvo_get_tv_modes(connector);
  1966.         else if (IS_LVDS(intel_sdvo_connector))
  1967.                 intel_sdvo_get_lvds_modes(connector);
  1968.         else
  1969.                 intel_sdvo_get_ddc_modes(connector);
  1970.  
  1971.         return !list_empty(&connector->probed_modes);
  1972. }
  1973.  
  1974. static void intel_sdvo_destroy(struct drm_connector *connector)
  1975. {
  1976.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1977.  
  1978.         drm_connector_cleanup(connector);
  1979.         kfree(intel_sdvo_connector);
  1980. }
  1981.  
  1982. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1983. {
  1984.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1985.         struct edid *edid;
  1986.         bool has_audio = false;
  1987.  
  1988.         if (!intel_sdvo->is_hdmi)
  1989.                 return false;
  1990.  
  1991.         edid = intel_sdvo_get_edid(connector);
  1992.         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1993.                 has_audio = drm_detect_monitor_audio(edid);
  1994.         kfree(edid);
  1995.  
  1996.         return has_audio;
  1997. }
  1998.  
  1999. static int
  2000. intel_sdvo_set_property(struct drm_connector *connector,
  2001.                         struct drm_property *property,
  2002.                         uint64_t val)
  2003. {
  2004.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  2005.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  2006.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  2007.         uint16_t temp_value;
  2008.         uint8_t cmd;
  2009.         int ret;
  2010.  
  2011.         ret = drm_object_property_set_value(&connector->base, property, val);
  2012.         if (ret)
  2013.                 return ret;
  2014.  
  2015.         if (property == dev_priv->force_audio_property) {
  2016.                 int i = val;
  2017.                 bool has_audio;
  2018.  
  2019.                 if (i == intel_sdvo_connector->force_audio)
  2020.                         return 0;
  2021.  
  2022.                 intel_sdvo_connector->force_audio = i;
  2023.  
  2024.                 if (i == HDMI_AUDIO_AUTO)
  2025.                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
  2026.                 else
  2027.                         has_audio = (i == HDMI_AUDIO_ON);
  2028.  
  2029.                 if (has_audio == intel_sdvo->has_hdmi_audio)
  2030.                         return 0;
  2031.  
  2032.                 intel_sdvo->has_hdmi_audio = has_audio;
  2033.                 goto done;
  2034.         }
  2035.  
  2036.         if (property == dev_priv->broadcast_rgb_property) {
  2037.                 bool old_auto = intel_sdvo->color_range_auto;
  2038.                 uint32_t old_range = intel_sdvo->color_range;
  2039.  
  2040.                 switch (val) {
  2041.                 case INTEL_BROADCAST_RGB_AUTO:
  2042.                         intel_sdvo->color_range_auto = true;
  2043.                         break;
  2044.                 case INTEL_BROADCAST_RGB_FULL:
  2045.                         intel_sdvo->color_range_auto = false;
  2046.                         intel_sdvo->color_range = 0;
  2047.                         break;
  2048.                 case INTEL_BROADCAST_RGB_LIMITED:
  2049.                         intel_sdvo->color_range_auto = false;
  2050.                         /* FIXME: this bit is only valid when using TMDS
  2051.                          * encoding and 8 bit per color mode. */
  2052.                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
  2053.                         break;
  2054.                 default:
  2055.                         return -EINVAL;
  2056.                 }
  2057.  
  2058.                 if (old_auto == intel_sdvo->color_range_auto &&
  2059.                     old_range == intel_sdvo->color_range)
  2060.                         return 0;
  2061.  
  2062.                 goto done;
  2063.         }
  2064.  
  2065.         if (property == connector->dev->mode_config.aspect_ratio_property) {
  2066.                 switch (val) {
  2067.                 case DRM_MODE_PICTURE_ASPECT_NONE:
  2068.                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
  2069.                         break;
  2070.                 case DRM_MODE_PICTURE_ASPECT_4_3:
  2071.                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_4_3;
  2072.                         break;
  2073.                 case DRM_MODE_PICTURE_ASPECT_16_9:
  2074.                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
  2075.                         break;
  2076.                 default:
  2077.                         return -EINVAL;
  2078.                 }
  2079.                 goto done;
  2080.         }
  2081.  
  2082. #define CHECK_PROPERTY(name, NAME) \
  2083.         if (intel_sdvo_connector->name == property) { \
  2084.                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  2085.                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  2086.                 cmd = SDVO_CMD_SET_##NAME; \
  2087.                 intel_sdvo_connector->cur_##name = temp_value; \
  2088.                 goto set_value; \
  2089.         }
  2090.  
  2091.         if (property == intel_sdvo_connector->tv_format) {
  2092.                 if (val >= TV_FORMAT_NUM)
  2093.                         return -EINVAL;
  2094.  
  2095.                 if (intel_sdvo->tv_format_index ==
  2096.                     intel_sdvo_connector->tv_format_supported[val])
  2097.                         return 0;
  2098.  
  2099.                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  2100.                 goto done;
  2101.         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  2102.                 temp_value = val;
  2103.                 if (intel_sdvo_connector->left == property) {
  2104.                         drm_object_property_set_value(&connector->base,
  2105.                                                          intel_sdvo_connector->right, val);
  2106.                         if (intel_sdvo_connector->left_margin == temp_value)
  2107.                                 return 0;
  2108.  
  2109.                         intel_sdvo_connector->left_margin = temp_value;
  2110.                         intel_sdvo_connector->right_margin = temp_value;
  2111.                         temp_value = intel_sdvo_connector->max_hscan -
  2112.                                 intel_sdvo_connector->left_margin;
  2113.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  2114.                         goto set_value;
  2115.                 } else if (intel_sdvo_connector->right == property) {
  2116.                         drm_object_property_set_value(&connector->base,
  2117.                                                          intel_sdvo_connector->left, val);
  2118.                         if (intel_sdvo_connector->right_margin == temp_value)
  2119.                                 return 0;
  2120.  
  2121.                         intel_sdvo_connector->left_margin = temp_value;
  2122.                         intel_sdvo_connector->right_margin = temp_value;
  2123.                         temp_value = intel_sdvo_connector->max_hscan -
  2124.                                 intel_sdvo_connector->left_margin;
  2125.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  2126.                         goto set_value;
  2127.                 } else if (intel_sdvo_connector->top == property) {
  2128.                         drm_object_property_set_value(&connector->base,
  2129.                                                          intel_sdvo_connector->bottom, val);
  2130.                         if (intel_sdvo_connector->top_margin == temp_value)
  2131.                                 return 0;
  2132.  
  2133.                         intel_sdvo_connector->top_margin = temp_value;
  2134.                         intel_sdvo_connector->bottom_margin = temp_value;
  2135.                         temp_value = intel_sdvo_connector->max_vscan -
  2136.                                 intel_sdvo_connector->top_margin;
  2137.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  2138.                         goto set_value;
  2139.                 } else if (intel_sdvo_connector->bottom == property) {
  2140.                         drm_object_property_set_value(&connector->base,
  2141.                                                          intel_sdvo_connector->top, val);
  2142.                         if (intel_sdvo_connector->bottom_margin == temp_value)
  2143.                                 return 0;
  2144.  
  2145.                         intel_sdvo_connector->top_margin = temp_value;
  2146.                         intel_sdvo_connector->bottom_margin = temp_value;
  2147.                         temp_value = intel_sdvo_connector->max_vscan -
  2148.                                 intel_sdvo_connector->top_margin;
  2149.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  2150.                         goto set_value;
  2151.                 }
  2152.                 CHECK_PROPERTY(hpos, HPOS)
  2153.                 CHECK_PROPERTY(vpos, VPOS)
  2154.                 CHECK_PROPERTY(saturation, SATURATION)
  2155.                 CHECK_PROPERTY(contrast, CONTRAST)
  2156.                 CHECK_PROPERTY(hue, HUE)
  2157.                 CHECK_PROPERTY(brightness, BRIGHTNESS)
  2158.                 CHECK_PROPERTY(sharpness, SHARPNESS)
  2159.                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  2160.                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  2161.                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  2162.                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  2163.                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  2164.                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  2165.         }
  2166.  
  2167.         return -EINVAL; /* unknown property */
  2168.  
  2169. set_value:
  2170.         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  2171.                 return -EIO;
  2172.  
  2173.  
  2174. done:
  2175.         if (intel_sdvo->base.base.crtc)
  2176.                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
  2177.  
  2178.         return 0;
  2179. #undef CHECK_PROPERTY
  2180. }
  2181.  
  2182. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  2183.         .dpms = drm_atomic_helper_connector_dpms,
  2184.         .detect = intel_sdvo_detect,
  2185.         .fill_modes = drm_helper_probe_single_connector_modes,
  2186.         .set_property = intel_sdvo_set_property,
  2187.         .atomic_get_property = intel_connector_atomic_get_property,
  2188.         .destroy = intel_sdvo_destroy,
  2189.         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  2190.         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  2191. };
  2192.  
  2193. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  2194.         .get_modes = intel_sdvo_get_modes,
  2195.         .mode_valid = intel_sdvo_mode_valid,
  2196.         .best_encoder = intel_best_encoder,
  2197. };
  2198.  
  2199. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  2200. {
  2201.         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
  2202.  
  2203.         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  2204.                 drm_mode_destroy(encoder->dev,
  2205.                                  intel_sdvo->sdvo_lvds_fixed_mode);
  2206.  
  2207.         i2c_del_adapter(&intel_sdvo->ddc);
  2208.         intel_encoder_destroy(encoder);
  2209. }
  2210.  
  2211. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  2212.         .destroy = intel_sdvo_enc_destroy,
  2213. };
  2214.  
  2215. static void
  2216. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  2217. {
  2218.         uint16_t mask = 0;
  2219.         unsigned int num_bits;
  2220.  
  2221.         /* Make a mask of outputs less than or equal to our own priority in the
  2222.          * list.
  2223.          */
  2224.         switch (sdvo->controlled_output) {
  2225.         case SDVO_OUTPUT_LVDS1:
  2226.                 mask |= SDVO_OUTPUT_LVDS1;
  2227.         case SDVO_OUTPUT_LVDS0:
  2228.                 mask |= SDVO_OUTPUT_LVDS0;
  2229.         case SDVO_OUTPUT_TMDS1:
  2230.                 mask |= SDVO_OUTPUT_TMDS1;
  2231.         case SDVO_OUTPUT_TMDS0:
  2232.                 mask |= SDVO_OUTPUT_TMDS0;
  2233.         case SDVO_OUTPUT_RGB1:
  2234.                 mask |= SDVO_OUTPUT_RGB1;
  2235.         case SDVO_OUTPUT_RGB0:
  2236.                 mask |= SDVO_OUTPUT_RGB0;
  2237.                 break;
  2238.         }
  2239.  
  2240.         /* Count bits to find what number we are in the priority list. */
  2241.         mask &= sdvo->caps.output_flags;
  2242.         num_bits = hweight16(mask);
  2243.         /* If more than 3 outputs, default to DDC bus 3 for now. */
  2244.         if (num_bits > 3)
  2245.                 num_bits = 3;
  2246.  
  2247.         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  2248.         sdvo->ddc_bus = 1 << num_bits;
  2249. }
  2250.  
  2251. /**
  2252.  * Choose the appropriate DDC bus for control bus switch command for this
  2253.  * SDVO output based on the controlled output.
  2254.  *
  2255.  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  2256.  * outputs, then LVDS outputs.
  2257.  */
  2258. static void
  2259. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  2260.                           struct intel_sdvo *sdvo)
  2261. {
  2262.         struct sdvo_device_mapping *mapping;
  2263.  
  2264.         if (sdvo->port == PORT_B)
  2265.                 mapping = &(dev_priv->sdvo_mappings[0]);
  2266.         else
  2267.                 mapping = &(dev_priv->sdvo_mappings[1]);
  2268.  
  2269.         if (mapping->initialized)
  2270.                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  2271.         else
  2272.                 intel_sdvo_guess_ddc_bus(sdvo);
  2273. }
  2274.  
  2275. static void
  2276. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  2277.                           struct intel_sdvo *sdvo)
  2278. {
  2279.         struct sdvo_device_mapping *mapping;
  2280.         u8 pin;
  2281.  
  2282.         if (sdvo->port == PORT_B)
  2283.                 mapping = &dev_priv->sdvo_mappings[0];
  2284.         else
  2285.                 mapping = &dev_priv->sdvo_mappings[1];
  2286.  
  2287.         if (mapping->initialized &&
  2288.             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
  2289.                 pin = mapping->i2c_pin;
  2290.         else
  2291.                 pin = GMBUS_PIN_DPB;
  2292.  
  2293.         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  2294.  
  2295.         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
  2296.          * our code totally fails once we start using gmbus. Hence fall back to
  2297.          * bit banging for now. */
  2298.         intel_gmbus_force_bit(sdvo->i2c, true);
  2299. }
  2300.  
  2301. /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
  2302. static void
  2303. intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
  2304. {
  2305.         intel_gmbus_force_bit(sdvo->i2c, false);
  2306. }
  2307.  
  2308. static bool
  2309. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  2310. {
  2311.         return intel_sdvo_check_supp_encode(intel_sdvo);
  2312. }
  2313.  
  2314. static u8
  2315. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  2316. {
  2317.         struct drm_i915_private *dev_priv = dev->dev_private;
  2318.         struct sdvo_device_mapping *my_mapping, *other_mapping;
  2319.  
  2320.         if (sdvo->port == PORT_B) {
  2321.                 my_mapping = &dev_priv->sdvo_mappings[0];
  2322.                 other_mapping = &dev_priv->sdvo_mappings[1];
  2323.         } else {
  2324.                 my_mapping = &dev_priv->sdvo_mappings[1];
  2325.                 other_mapping = &dev_priv->sdvo_mappings[0];
  2326.         }
  2327.  
  2328.         /* If the BIOS described our SDVO device, take advantage of it. */
  2329.         if (my_mapping->slave_addr)
  2330.                 return my_mapping->slave_addr;
  2331.  
  2332.         /* If the BIOS only described a different SDVO device, use the
  2333.          * address that it isn't using.
  2334.          */
  2335.         if (other_mapping->slave_addr) {
  2336.                 if (other_mapping->slave_addr == 0x70)
  2337.                         return 0x72;
  2338.                 else
  2339.                         return 0x70;
  2340.         }
  2341.  
  2342.         /* No SDVO device info is found for another DVO port,
  2343.          * so use mapping assumption we had before BIOS parsing.
  2344.          */
  2345.         if (sdvo->port == PORT_B)
  2346.                 return 0x70;
  2347.         else
  2348.                 return 0x72;
  2349. }
  2350.  
  2351. static void
  2352. intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
  2353. {
  2354.         struct drm_connector *drm_connector;
  2355.         struct intel_sdvo *sdvo_encoder;
  2356.  
  2357.         drm_connector = &intel_connector->base;
  2358.         sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
  2359.  
  2360.         sysfs_remove_link(&drm_connector->kdev->kobj,
  2361.                           sdvo_encoder->ddc.dev.kobj.name);
  2362.         intel_connector_unregister(intel_connector);
  2363. }
  2364.  
  2365. static int
  2366. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  2367.                           struct intel_sdvo *encoder)
  2368. {
  2369.         struct drm_connector *drm_connector;
  2370.         int ret;
  2371.  
  2372.         drm_connector = &connector->base.base;
  2373.         ret = drm_connector_init(encoder->base.base.dev,
  2374.                            drm_connector,
  2375.                            &intel_sdvo_connector_funcs,
  2376.                            connector->base.base.connector_type);
  2377.         if (ret < 0)
  2378.                 return ret;
  2379.  
  2380.         drm_connector_helper_add(drm_connector,
  2381.                                  &intel_sdvo_connector_helper_funcs);
  2382.  
  2383.         connector->base.base.interlace_allowed = 1;
  2384.         connector->base.base.doublescan_allowed = 0;
  2385.         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  2386.         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  2387.         connector->base.unregister = intel_sdvo_connector_unregister;
  2388.  
  2389.         intel_connector_attach_encoder(&connector->base, &encoder->base);
  2390.         ret = drm_connector_register(drm_connector);
  2391.         if (ret < 0)
  2392.                 goto err1;
  2393.  
  2394.         ret = sysfs_create_link(&drm_connector->kdev->kobj,
  2395.                                 &encoder->ddc.dev.kobj,
  2396.                                 encoder->ddc.dev.kobj.name);
  2397.         if (ret < 0)
  2398.                 goto err2;
  2399.  
  2400.         return 0;
  2401.  
  2402. err2:
  2403.         drm_connector_unregister(drm_connector);
  2404. err1:
  2405.         drm_connector_cleanup(drm_connector);
  2406.  
  2407.         return ret;
  2408. }
  2409.  
  2410. static void
  2411. intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
  2412.                                struct intel_sdvo_connector *connector)
  2413. {
  2414.         struct drm_device *dev = connector->base.base.dev;
  2415.  
  2416.         intel_attach_force_audio_property(&connector->base.base);
  2417.         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
  2418.                 intel_attach_broadcast_rgb_property(&connector->base.base);
  2419.                 intel_sdvo->color_range_auto = true;
  2420.         }
  2421.         intel_attach_aspect_ratio_property(&connector->base.base);
  2422.         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
  2423. }
  2424.  
  2425. static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
  2426. {
  2427.         struct intel_sdvo_connector *sdvo_connector;
  2428.  
  2429.         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
  2430.         if (!sdvo_connector)
  2431.                 return NULL;
  2432.  
  2433.         if (intel_connector_init(&sdvo_connector->base) < 0) {
  2434.                 kfree(sdvo_connector);
  2435.                 return NULL;
  2436.         }
  2437.  
  2438.         return sdvo_connector;
  2439. }
  2440.  
  2441. static bool
  2442. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  2443. {
  2444.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2445.         struct drm_connector *connector;
  2446.         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  2447.         struct intel_connector *intel_connector;
  2448.         struct intel_sdvo_connector *intel_sdvo_connector;
  2449.  
  2450.         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
  2451.  
  2452.         intel_sdvo_connector = intel_sdvo_connector_alloc();
  2453.         if (!intel_sdvo_connector)
  2454.                 return false;
  2455.  
  2456.         if (device == 0) {
  2457.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  2458.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  2459.         } else if (device == 1) {
  2460.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  2461.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  2462.         }
  2463.  
  2464.         intel_connector = &intel_sdvo_connector->base;
  2465.         connector = &intel_connector->base;
  2466.         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  2467.                 intel_sdvo_connector->output_flag) {
  2468.                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  2469.                 /* Some SDVO devices have one-shot hotplug interrupts.
  2470.                  * Ensure that they get re-enabled when an interrupt happens.
  2471.                  */
  2472.                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  2473.                 intel_sdvo_enable_hotplug(intel_encoder);
  2474.         } else {
  2475.                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  2476.         }
  2477.         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  2478.         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  2479.  
  2480.         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  2481.                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  2482.                 intel_sdvo->is_hdmi = true;
  2483.         }
  2484.  
  2485.         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
  2486.                 kfree(intel_sdvo_connector);
  2487.                 return false;
  2488.         }
  2489.  
  2490.         if (intel_sdvo->is_hdmi)
  2491.                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
  2492.  
  2493.         return true;
  2494. }
  2495.  
  2496. static bool
  2497. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  2498. {
  2499.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2500.         struct drm_connector *connector;
  2501.         struct intel_connector *intel_connector;
  2502.         struct intel_sdvo_connector *intel_sdvo_connector;
  2503.  
  2504.         DRM_DEBUG_KMS("initialising TV type %d\n", type);
  2505.  
  2506.         intel_sdvo_connector = intel_sdvo_connector_alloc();
  2507.         if (!intel_sdvo_connector)
  2508.                 return false;
  2509.  
  2510.         intel_connector = &intel_sdvo_connector->base;
  2511.         connector = &intel_connector->base;
  2512.         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  2513.         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  2514.  
  2515.         intel_sdvo->controlled_output |= type;
  2516.         intel_sdvo_connector->output_flag = type;
  2517.  
  2518.         intel_sdvo->is_tv = true;
  2519.  
  2520.         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
  2521.                 kfree(intel_sdvo_connector);
  2522.                 return false;
  2523.         }
  2524.  
  2525.         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  2526.                 goto err;
  2527.  
  2528.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2529.                 goto err;
  2530.  
  2531.         return true;
  2532.  
  2533. err:
  2534.         drm_connector_unregister(connector);
  2535.         intel_sdvo_destroy(connector);
  2536.         return false;
  2537. }
  2538.  
  2539. static bool
  2540. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  2541. {
  2542.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2543.         struct drm_connector *connector;
  2544.         struct intel_connector *intel_connector;
  2545.         struct intel_sdvo_connector *intel_sdvo_connector;
  2546.  
  2547.         DRM_DEBUG_KMS("initialising analog device %d\n", device);
  2548.  
  2549.         intel_sdvo_connector = intel_sdvo_connector_alloc();
  2550.         if (!intel_sdvo_connector)
  2551.                 return false;
  2552.  
  2553.         intel_connector = &intel_sdvo_connector->base;
  2554.         connector = &intel_connector->base;
  2555.         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  2556.         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  2557.         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  2558.  
  2559.         if (device == 0) {
  2560.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  2561.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  2562.         } else if (device == 1) {
  2563.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  2564.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  2565.         }
  2566.  
  2567.         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
  2568.                 kfree(intel_sdvo_connector);
  2569.                 return false;
  2570.         }
  2571.  
  2572.         return true;
  2573. }
  2574.  
  2575. static bool
  2576. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  2577. {
  2578.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2579.         struct drm_connector *connector;
  2580.         struct intel_connector *intel_connector;
  2581.         struct intel_sdvo_connector *intel_sdvo_connector;
  2582.  
  2583.         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
  2584.  
  2585.         intel_sdvo_connector = intel_sdvo_connector_alloc();
  2586.         if (!intel_sdvo_connector)
  2587.                 return false;
  2588.  
  2589.         intel_connector = &intel_sdvo_connector->base;
  2590.         connector = &intel_connector->base;
  2591.         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  2592.         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  2593.  
  2594.         if (device == 0) {
  2595.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  2596.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  2597.         } else if (device == 1) {
  2598.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  2599.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  2600.         }
  2601.  
  2602.         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
  2603.                 kfree(intel_sdvo_connector);
  2604.                 return false;
  2605.         }
  2606.  
  2607.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2608.                 goto err;
  2609.  
  2610.         return true;
  2611.  
  2612. err:
  2613.         drm_connector_unregister(connector);
  2614.         intel_sdvo_destroy(connector);
  2615.         return false;
  2616. }
  2617.  
  2618. static bool
  2619. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  2620. {
  2621.         intel_sdvo->is_tv = false;
  2622.         intel_sdvo->is_lvds = false;
  2623.  
  2624.         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  2625.  
  2626.         if (flags & SDVO_OUTPUT_TMDS0)
  2627.                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  2628.                         return false;
  2629.  
  2630.         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  2631.                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  2632.                         return false;
  2633.  
  2634.         /* TV has no XXX1 function block */
  2635.         if (flags & SDVO_OUTPUT_SVID0)
  2636.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  2637.                         return false;
  2638.  
  2639.         if (flags & SDVO_OUTPUT_CVBS0)
  2640.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  2641.                         return false;
  2642.  
  2643.         if (flags & SDVO_OUTPUT_YPRPB0)
  2644.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  2645.                         return false;
  2646.  
  2647.         if (flags & SDVO_OUTPUT_RGB0)
  2648.                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
  2649.                         return false;
  2650.  
  2651.         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  2652.                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
  2653.                         return false;
  2654.  
  2655.         if (flags & SDVO_OUTPUT_LVDS0)
  2656.                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  2657.                         return false;
  2658.  
  2659.         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  2660.                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  2661.                         return false;
  2662.  
  2663.         if ((flags & SDVO_OUTPUT_MASK) == 0) {
  2664.                 unsigned char bytes[2];
  2665.  
  2666.                 intel_sdvo->controlled_output = 0;
  2667.                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2668.                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2669.                               SDVO_NAME(intel_sdvo),
  2670.                               bytes[0], bytes[1]);
  2671.                 return false;
  2672.         }
  2673.         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2674.  
  2675.         return true;
  2676. }
  2677.  
  2678. static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
  2679. {
  2680.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2681.         struct drm_connector *connector, *tmp;
  2682.  
  2683.         list_for_each_entry_safe(connector, tmp,
  2684.                                  &dev->mode_config.connector_list, head) {
  2685.                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
  2686.                         drm_connector_unregister(connector);
  2687.                         intel_sdvo_destroy(connector);
  2688.                 }
  2689.         }
  2690. }
  2691.  
  2692. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2693.                                           struct intel_sdvo_connector *intel_sdvo_connector,
  2694.                                           int type)
  2695. {
  2696.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2697.         struct intel_sdvo_tv_format format;
  2698.         uint32_t format_map, i;
  2699.  
  2700.         if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2701.                 return false;
  2702.  
  2703.         BUILD_BUG_ON(sizeof(format) != 6);
  2704.         if (!intel_sdvo_get_value(intel_sdvo,
  2705.                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2706.                                   &format, sizeof(format)))
  2707.                 return false;
  2708.  
  2709.         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2710.  
  2711.         if (format_map == 0)
  2712.                 return false;
  2713.  
  2714.         intel_sdvo_connector->format_supported_num = 0;
  2715.         for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2716.                 if (format_map & (1 << i))
  2717.                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2718.  
  2719.  
  2720.         intel_sdvo_connector->tv_format =
  2721.                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2722.                                             "mode", intel_sdvo_connector->format_supported_num);
  2723.         if (!intel_sdvo_connector->tv_format)
  2724.                 return false;
  2725.  
  2726.         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2727.                 drm_property_add_enum(
  2728.                                 intel_sdvo_connector->tv_format, i,
  2729.                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2730.  
  2731.         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2732.         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
  2733.                                       intel_sdvo_connector->tv_format, 0);
  2734.         return true;
  2735.  
  2736. }
  2737.  
  2738. #define ENHANCEMENT(name, NAME) do { \
  2739.         if (enhancements.name) { \
  2740.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2741.                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2742.                         return false; \
  2743.                 intel_sdvo_connector->max_##name = data_value[0]; \
  2744.                 intel_sdvo_connector->cur_##name = response; \
  2745.                 intel_sdvo_connector->name = \
  2746.                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2747.                 if (!intel_sdvo_connector->name) return false; \
  2748.                 drm_object_attach_property(&connector->base, \
  2749.                                               intel_sdvo_connector->name, \
  2750.                                               intel_sdvo_connector->cur_##name); \
  2751.                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2752.                               data_value[0], data_value[1], response); \
  2753.         } \
  2754. } while (0)
  2755.  
  2756. static bool
  2757. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2758.                                       struct intel_sdvo_connector *intel_sdvo_connector,
  2759.                                       struct intel_sdvo_enhancements_reply enhancements)
  2760. {
  2761.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2762.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2763.         uint16_t response, data_value[2];
  2764.  
  2765.         /* when horizontal overscan is supported, Add the left/right  property */
  2766.         if (enhancements.overscan_h) {
  2767.                 if (!intel_sdvo_get_value(intel_sdvo,
  2768.                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
  2769.                                           &data_value, 4))
  2770.                         return false;
  2771.  
  2772.                 if (!intel_sdvo_get_value(intel_sdvo,
  2773.                                           SDVO_CMD_GET_OVERSCAN_H,
  2774.                                           &response, 2))
  2775.                         return false;
  2776.  
  2777.                 intel_sdvo_connector->max_hscan = data_value[0];
  2778.                 intel_sdvo_connector->left_margin = data_value[0] - response;
  2779.                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2780.                 intel_sdvo_connector->left =
  2781.                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2782.                 if (!intel_sdvo_connector->left)
  2783.                         return false;
  2784.  
  2785.                 drm_object_attach_property(&connector->base,
  2786.                                               intel_sdvo_connector->left,
  2787.                                               intel_sdvo_connector->left_margin);
  2788.  
  2789.                 intel_sdvo_connector->right =
  2790.                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2791.                 if (!intel_sdvo_connector->right)
  2792.                         return false;
  2793.  
  2794.                 drm_object_attach_property(&connector->base,
  2795.                                               intel_sdvo_connector->right,
  2796.                                               intel_sdvo_connector->right_margin);
  2797.                 DRM_DEBUG_KMS("h_overscan: max %d, "
  2798.                               "default %d, current %d\n",
  2799.                               data_value[0], data_value[1], response);
  2800.         }
  2801.  
  2802.         if (enhancements.overscan_v) {
  2803.                 if (!intel_sdvo_get_value(intel_sdvo,
  2804.                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
  2805.                                           &data_value, 4))
  2806.                         return false;
  2807.  
  2808.                 if (!intel_sdvo_get_value(intel_sdvo,
  2809.                                           SDVO_CMD_GET_OVERSCAN_V,
  2810.                                           &response, 2))
  2811.                         return false;
  2812.  
  2813.                 intel_sdvo_connector->max_vscan = data_value[0];
  2814.                 intel_sdvo_connector->top_margin = data_value[0] - response;
  2815.                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2816.                 intel_sdvo_connector->top =
  2817.                         drm_property_create_range(dev, 0,
  2818.                                             "top_margin", 0, data_value[0]);
  2819.                 if (!intel_sdvo_connector->top)
  2820.                         return false;
  2821.  
  2822.                 drm_object_attach_property(&connector->base,
  2823.                                               intel_sdvo_connector->top,
  2824.                                               intel_sdvo_connector->top_margin);
  2825.  
  2826.                 intel_sdvo_connector->bottom =
  2827.                         drm_property_create_range(dev, 0,
  2828.                                             "bottom_margin", 0, data_value[0]);
  2829.                 if (!intel_sdvo_connector->bottom)
  2830.                         return false;
  2831.  
  2832.                 drm_object_attach_property(&connector->base,
  2833.                                               intel_sdvo_connector->bottom,
  2834.                                               intel_sdvo_connector->bottom_margin);
  2835.                 DRM_DEBUG_KMS("v_overscan: max %d, "
  2836.                               "default %d, current %d\n",
  2837.                               data_value[0], data_value[1], response);
  2838.         }
  2839.  
  2840.         ENHANCEMENT(hpos, HPOS);
  2841.         ENHANCEMENT(vpos, VPOS);
  2842.         ENHANCEMENT(saturation, SATURATION);
  2843.         ENHANCEMENT(contrast, CONTRAST);
  2844.         ENHANCEMENT(hue, HUE);
  2845.         ENHANCEMENT(sharpness, SHARPNESS);
  2846.         ENHANCEMENT(brightness, BRIGHTNESS);
  2847.         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2848.         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2849.         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2850.         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2851.         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2852.  
  2853.         if (enhancements.dot_crawl) {
  2854.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2855.                         return false;
  2856.  
  2857.                 intel_sdvo_connector->max_dot_crawl = 1;
  2858.                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2859.                 intel_sdvo_connector->dot_crawl =
  2860.                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2861.                 if (!intel_sdvo_connector->dot_crawl)
  2862.                         return false;
  2863.  
  2864.                 drm_object_attach_property(&connector->base,
  2865.                                               intel_sdvo_connector->dot_crawl,
  2866.                                               intel_sdvo_connector->cur_dot_crawl);
  2867.                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2868.         }
  2869.  
  2870.         return true;
  2871. }
  2872.  
  2873. static bool
  2874. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2875.                                         struct intel_sdvo_connector *intel_sdvo_connector,
  2876.                                         struct intel_sdvo_enhancements_reply enhancements)
  2877. {
  2878.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2879.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2880.         uint16_t response, data_value[2];
  2881.  
  2882.         ENHANCEMENT(brightness, BRIGHTNESS);
  2883.  
  2884.         return true;
  2885. }
  2886. #undef ENHANCEMENT
  2887.  
  2888. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2889.                                                struct intel_sdvo_connector *intel_sdvo_connector)
  2890. {
  2891.         union {
  2892.                 struct intel_sdvo_enhancements_reply reply;
  2893.                 uint16_t response;
  2894.         } enhancements;
  2895.  
  2896.         BUILD_BUG_ON(sizeof(enhancements) != 2);
  2897.  
  2898.         enhancements.response = 0;
  2899.         intel_sdvo_get_value(intel_sdvo,
  2900.                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2901.                              &enhancements, sizeof(enhancements));
  2902.         if (enhancements.response == 0) {
  2903.                 DRM_DEBUG_KMS("No enhancement is supported\n");
  2904.                 return true;
  2905.         }
  2906.  
  2907.         if (IS_TV(intel_sdvo_connector))
  2908.                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2909.         else if (IS_LVDS(intel_sdvo_connector))
  2910.                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2911.         else
  2912.                 return true;
  2913. }
  2914.  
  2915. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2916.                                      struct i2c_msg *msgs,
  2917.                                      int num)
  2918. {
  2919.         struct intel_sdvo *sdvo = adapter->algo_data;
  2920.  
  2921.         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2922.                 return -EIO;
  2923.  
  2924.         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2925. }
  2926.  
  2927. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2928. {
  2929.         struct intel_sdvo *sdvo = adapter->algo_data;
  2930.         return sdvo->i2c->algo->functionality(sdvo->i2c);
  2931. }
  2932.  
  2933. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2934.         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
  2935.         .functionality  = intel_sdvo_ddc_proxy_func
  2936. };
  2937.  
  2938. static bool
  2939. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2940.                           struct drm_device *dev)
  2941. {
  2942.         sdvo->ddc.owner = THIS_MODULE;
  2943.         sdvo->ddc.class = I2C_CLASS_DDC;
  2944.         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2945.         sdvo->ddc.dev.parent = &dev->pdev->dev;
  2946.         sdvo->ddc.algo_data = sdvo;
  2947.         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2948.  
  2949.         return i2c_add_adapter(&sdvo->ddc) == 0;
  2950. }
  2951.  
  2952. static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
  2953.                                    enum port port)
  2954. {
  2955.         if (HAS_PCH_SPLIT(dev_priv))
  2956.                 WARN_ON(port != PORT_B);
  2957.         else
  2958.                 WARN_ON(port != PORT_B && port != PORT_C);
  2959. }
  2960.  
  2961. bool intel_sdvo_init(struct drm_device *dev,
  2962.                      i915_reg_t sdvo_reg, enum port port)
  2963. {
  2964.         struct drm_i915_private *dev_priv = dev->dev_private;
  2965.         struct intel_encoder *intel_encoder;
  2966.         struct intel_sdvo *intel_sdvo;
  2967.         int i;
  2968.  
  2969.         assert_sdvo_port_valid(dev_priv, port);
  2970.  
  2971.         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
  2972.         if (!intel_sdvo)
  2973.                 return false;
  2974.  
  2975.         intel_sdvo->sdvo_reg = sdvo_reg;
  2976.         intel_sdvo->port = port;
  2977.         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2978.         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
  2979.         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
  2980.                 goto err_i2c_bus;
  2981.  
  2982.         /* encoder type will be decided later */
  2983.         intel_encoder = &intel_sdvo->base;
  2984.         intel_encoder->type = INTEL_OUTPUT_SDVO;
  2985.         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0,
  2986.                          NULL);
  2987.  
  2988.         /* Read the regs to test if we can talk to the device */
  2989.         for (i = 0; i < 0x40; i++) {
  2990.                 u8 byte;
  2991.  
  2992.                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2993.                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2994.                                       SDVO_NAME(intel_sdvo));
  2995.                         goto err;
  2996.                 }
  2997.         }
  2998.  
  2999.         intel_encoder->compute_config = intel_sdvo_compute_config;
  3000.         if (HAS_PCH_SPLIT(dev)) {
  3001.                 intel_encoder->disable = pch_disable_sdvo;
  3002.                 intel_encoder->post_disable = pch_post_disable_sdvo;
  3003.         } else {
  3004.                 intel_encoder->disable = intel_disable_sdvo;
  3005.         }
  3006.         intel_encoder->pre_enable = intel_sdvo_pre_enable;
  3007.         intel_encoder->enable = intel_enable_sdvo;
  3008.         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  3009.         intel_encoder->get_config = intel_sdvo_get_config;
  3010.  
  3011.         /* In default case sdvo lvds is false */
  3012.         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  3013.                 goto err;
  3014.  
  3015.         if (intel_sdvo_output_setup(intel_sdvo,
  3016.                                     intel_sdvo->caps.output_flags) != true) {
  3017.                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  3018.                               SDVO_NAME(intel_sdvo));
  3019.                 /* Output_setup can leave behind connectors! */
  3020.                 goto err_output;
  3021.         }
  3022.  
  3023.         /* Only enable the hotplug irq if we need it, to work around noisy
  3024.          * hotplug lines.
  3025.          */
  3026.         if (intel_sdvo->hotplug_active) {
  3027.                 if (intel_sdvo->port == PORT_B)
  3028.                         intel_encoder->hpd_pin = HPD_SDVO_B;
  3029.                 else
  3030.                         intel_encoder->hpd_pin = HPD_SDVO_C;
  3031.         }
  3032.  
  3033.         /*
  3034.          * Cloning SDVO with anything is often impossible, since the SDVO
  3035.          * encoder can request a special input timing mode. And even if that's
  3036.          * not the case we have evidence that cloning a plain unscaled mode with
  3037.          * VGA doesn't really work. Furthermore the cloning flags are way too
  3038.          * simplistic anyway to express such constraints, so just give up on
  3039.          * cloning for SDVO encoders.
  3040.          */
  3041.         intel_sdvo->base.cloneable = 0;
  3042.  
  3043.         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
  3044.  
  3045.         /* Set the input timing to the screen. Assume always input 0. */
  3046.         if (!intel_sdvo_set_target_input(intel_sdvo))
  3047.                 goto err_output;
  3048.  
  3049.         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  3050.                                                     &intel_sdvo->pixel_clock_min,
  3051.                                                     &intel_sdvo->pixel_clock_max))
  3052.                 goto err_output;
  3053.  
  3054.         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  3055.                         "clock range %dMHz - %dMHz, "
  3056.                         "input 1: %c, input 2: %c, "
  3057.                         "output 1: %c, output 2: %c\n",
  3058.                         SDVO_NAME(intel_sdvo),
  3059.                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  3060.                         intel_sdvo->caps.device_rev_id,
  3061.                         intel_sdvo->pixel_clock_min / 1000,
  3062.                         intel_sdvo->pixel_clock_max / 1000,
  3063.                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  3064.                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  3065.                         /* check currently supported outputs */
  3066.                         intel_sdvo->caps.output_flags &
  3067.                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  3068.                         intel_sdvo->caps.output_flags &
  3069.                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  3070.         return true;
  3071.  
  3072. err_output:
  3073.         intel_sdvo_output_cleanup(intel_sdvo);
  3074.  
  3075. err:
  3076.         drm_encoder_cleanup(&intel_encoder->base);
  3077.         i2c_del_adapter(&intel_sdvo->ddc);
  3078. err_i2c_bus:
  3079.         intel_sdvo_unselect_i2c_bus(intel_sdvo);
  3080.         kfree(intel_sdvo);
  3081.  
  3082.         return false;
  3083. }
  3084.