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  1. /*
  2.  * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3.  * Copyright © 2006-2007 Intel Corporation
  4.  *   Jesse Barnes <jesse.barnes@intel.com>
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the next
  14.  * paragraph) shall be included in all copies or substantial portions of the
  15.  * Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23.  * DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * Authors:
  26.  *  Eric Anholt <eric@anholt.net>
  27.  */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. //#include <linux/delay.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39.  
  40. unsigned int hweight16(unsigned int w)
  41. {
  42.     unsigned int res = w - ((w >> 1) & 0x5555);
  43.     res = (res & 0x3333) + ((res >> 2) & 0x3333);
  44.     res = (res + (res >> 4)) & 0x0F0F;
  45.     return (res + (res >> 8)) & 0x00FF;
  46. }
  47.  
  48.  
  49. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  50. #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  51. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  52. #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  53.  
  54. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  55.                          SDVO_TV_MASK)
  56.  
  57. #define IS_TV(c)    (c->output_flag & SDVO_TV_MASK)
  58. #define IS_TMDS(c)  (c->output_flag & SDVO_TMDS_MASK)
  59. #define IS_LVDS(c)  (c->output_flag & SDVO_LVDS_MASK)
  60. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  61. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  62.  
  63.  
  64. static const char *tv_format_names[] = {
  65.     "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  66.     "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  67.     "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  68.     "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  69.     "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  70.     "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  71.     "SECAM_60"
  72. };
  73.  
  74. #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  75.  
  76. struct intel_sdvo {
  77.     struct intel_encoder base;
  78.  
  79.     struct i2c_adapter *i2c;
  80.     u8 slave_addr;
  81.  
  82.     struct i2c_adapter ddc;
  83.  
  84.     /* Register for the SDVO device: SDVOB or SDVOC */
  85.     int sdvo_reg;
  86.  
  87.     /* Active outputs controlled by this SDVO output */
  88.     uint16_t controlled_output;
  89.  
  90.     /*
  91.      * Capabilities of the SDVO device returned by
  92.      * i830_sdvo_get_capabilities()
  93.      */
  94.     struct intel_sdvo_caps caps;
  95.  
  96.     /* Pixel clock limitations reported by the SDVO device, in kHz */
  97.     int pixel_clock_min, pixel_clock_max;
  98.  
  99.     /*
  100.     * For multiple function SDVO device,
  101.     * this is for current attached outputs.
  102.     */
  103.     uint16_t attached_output;
  104.  
  105.         /*
  106.          * Hotplug activation bits for this device
  107.          */
  108.         uint8_t hotplug_active[2];
  109.  
  110.     /**
  111.      * This is used to select the color range of RBG outputs in HDMI mode.
  112.      * It is only valid when using TMDS encoding and 8 bit per color mode.
  113.      */
  114.     uint32_t color_range;
  115.  
  116.     /**
  117.      * This is set if we're going to treat the device as TV-out.
  118.      *
  119.      * While we have these nice friendly flags for output types that ought
  120.      * to decide this for us, the S-Video output on our HDMI+S-Video card
  121.      * shows up as RGB1 (VGA).
  122.      */
  123.     bool is_tv;
  124.  
  125.     /* This is for current tv format name */
  126.     int tv_format_index;
  127.  
  128.     /**
  129.      * This is set if we treat the device as HDMI, instead of DVI.
  130.      */
  131.     bool is_hdmi;
  132.     bool has_hdmi_monitor;
  133.     bool has_hdmi_audio;
  134.  
  135.     /**
  136.      * This is set if we detect output of sdvo device as LVDS and
  137.      * have a valid fixed mode to use with the panel.
  138.      */
  139.     bool is_lvds;
  140.  
  141.     /**
  142.      * This is sdvo fixed pannel mode pointer
  143.      */
  144.     struct drm_display_mode *sdvo_lvds_fixed_mode;
  145.  
  146.     /* DDC bus used by this SDVO encoder */
  147.     uint8_t ddc_bus;
  148.  
  149.     /* Input timings for adjusted_mode */
  150.     struct intel_sdvo_dtd input_dtd;
  151. };
  152.  
  153. struct intel_sdvo_connector {
  154.     struct intel_connector base;
  155.  
  156.     /* Mark the type of connector */
  157.     uint16_t output_flag;
  158.  
  159.     int force_audio;
  160.  
  161.     /* This contains all current supported TV format */
  162.     u8 tv_format_supported[TV_FORMAT_NUM];
  163.     int   format_supported_num;
  164.     struct drm_property *tv_format;
  165.  
  166.     /* add the property for the SDVO-TV */
  167.     struct drm_property *left;
  168.     struct drm_property *right;
  169.     struct drm_property *top;
  170.     struct drm_property *bottom;
  171.     struct drm_property *hpos;
  172.     struct drm_property *vpos;
  173.     struct drm_property *contrast;
  174.     struct drm_property *saturation;
  175.     struct drm_property *hue;
  176.     struct drm_property *sharpness;
  177.     struct drm_property *flicker_filter;
  178.     struct drm_property *flicker_filter_adaptive;
  179.     struct drm_property *flicker_filter_2d;
  180.     struct drm_property *tv_chroma_filter;
  181.     struct drm_property *tv_luma_filter;
  182.     struct drm_property *dot_crawl;
  183.  
  184.     /* add the property for the SDVO-TV/LVDS */
  185.     struct drm_property *brightness;
  186.  
  187.     /* Add variable to record current setting for the above property */
  188.     u32 left_margin, right_margin, top_margin, bottom_margin;
  189.  
  190.     /* this is to get the range of margin.*/
  191.     u32 max_hscan,  max_vscan;
  192.     u32 max_hpos, cur_hpos;
  193.     u32 max_vpos, cur_vpos;
  194.     u32 cur_brightness, max_brightness;
  195.     u32 cur_contrast,   max_contrast;
  196.     u32 cur_saturation, max_saturation;
  197.     u32 cur_hue,    max_hue;
  198.     u32 cur_sharpness,  max_sharpness;
  199.     u32 cur_flicker_filter,     max_flicker_filter;
  200.     u32 cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
  201.     u32 cur_flicker_filter_2d,      max_flicker_filter_2d;
  202.     u32 cur_tv_chroma_filter,   max_tv_chroma_filter;
  203.     u32 cur_tv_luma_filter, max_tv_luma_filter;
  204.     u32 cur_dot_crawl,  max_dot_crawl;
  205. };
  206.  
  207. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  208. {
  209.     return container_of(encoder, struct intel_sdvo, base.base);
  210. }
  211.  
  212. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  213. {
  214.         return container_of(intel_attached_encoder(connector),
  215.                             struct intel_sdvo, base);
  216. }
  217.  
  218. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  219. {
  220.         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  221. }
  222.  
  223. static bool
  224. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  225. static bool
  226. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  227.                               struct intel_sdvo_connector *intel_sdvo_connector,
  228.                               int type);
  229. static bool
  230. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  231.                                    struct intel_sdvo_connector *intel_sdvo_connector);
  232.  
  233. /**
  234.  * Writes the SDVOB or SDVOC with the given value, but always writes both
  235.  * SDVOB and SDVOC to work around apparent hardware issues (according to
  236.  * comments in the BIOS).
  237.  */
  238. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  239. {
  240.         struct drm_device *dev = intel_sdvo->base.base.dev;
  241.         struct drm_i915_private *dev_priv = dev->dev_private;
  242.         u32 bval = val, cval = val;
  243.         int i;
  244.  
  245.         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  246.                 I915_WRITE(intel_sdvo->sdvo_reg, val);
  247.                 I915_READ(intel_sdvo->sdvo_reg);
  248.                 return;
  249.         }
  250.  
  251.         if (intel_sdvo->sdvo_reg == SDVOB) {
  252.                 cval = I915_READ(SDVOC);
  253.         } else {
  254.                 bval = I915_READ(SDVOB);
  255.         }
  256.         /*
  257.          * Write the registers twice for luck. Sometimes,
  258.          * writing them only once doesn't appear to 'stick'.
  259.          * The BIOS does this too. Yay, magic
  260.          */
  261.         for (i = 0; i < 2; i++)
  262.         {
  263.                 I915_WRITE(SDVOB, bval);
  264.                 I915_READ(SDVOB);
  265.                 I915_WRITE(SDVOC, cval);
  266.                 I915_READ(SDVOC);
  267.         }
  268. }
  269.  
  270. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  271. {
  272.         struct i2c_msg msgs[] = {
  273.                 {
  274.                         .addr = intel_sdvo->slave_addr,
  275.                         .flags = 0,
  276.                         .len = 1,
  277.                         .buf = &addr,
  278.                 },
  279.                 {
  280.                         .addr = intel_sdvo->slave_addr,
  281.                         .flags = I2C_M_RD,
  282.                         .len = 1,
  283.                         .buf = ch,
  284.                 }
  285.         };
  286.         int ret;
  287.  
  288.         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  289.                 return true;
  290.  
  291.         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  292.         return false;
  293. }
  294.  
  295. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  296. /** Mapping of command numbers to names, for debug output */
  297. static const struct _sdvo_cmd_name {
  298.         u8 cmd;
  299.         const char *name;
  300. } sdvo_cmd_names[] = {
  301.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  302.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  303.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  304.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  305.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  306.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  307.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  308.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  309.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  310.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  311.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  312.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  313.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  314.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  315.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  316.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  317.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  318.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  319.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  320.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  321.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  322.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  323.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  324.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  325.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  326.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  327.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  328.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  329.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  330.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  331.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  332.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  333.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  334.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  335.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  336.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  337.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  338.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  339.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  340.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  341.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  342.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  343.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  344.  
  345.     /* Add the op code for SDVO enhancements */
  346.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  347.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  348.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  349.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  350.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  351.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  352.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  353.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  354.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  355.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  356.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  357.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  358.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  359.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  360.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  361.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  362.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  363.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  364.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  365.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  366.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  367.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  368.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  369.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  370.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  371.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  372.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  373.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  374.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  375.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  376.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  377.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  378.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  379.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  380.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  381.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  382.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  383.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  384.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  385.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  386.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  387.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  388.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  389.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  390.  
  391.     /* HDMI op code */
  392.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  393.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  394.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  395.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  396.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  397.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  398.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  399.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  400.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  401.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  402.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  403.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  404.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  405.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  406.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  407.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  408.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  409.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  410.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  411.     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  412. };
  413.  
  414. #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
  415. #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
  416.  
  417. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  418.                                    const void *args, int args_len)
  419. {
  420.         int i;
  421.  
  422.         DRM_DEBUG_KMS("%s: W: %02X ",
  423.                                 SDVO_NAME(intel_sdvo), cmd);
  424.         for (i = 0; i < args_len; i++)
  425.                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  426.         for (; i < 8; i++)
  427.                 DRM_LOG_KMS("   ");
  428.         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  429.                 if (cmd == sdvo_cmd_names[i].cmd) {
  430.                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  431.                         break;
  432.                 }
  433.         }
  434.         if (i == ARRAY_SIZE(sdvo_cmd_names))
  435.                 DRM_LOG_KMS("(%02X)", cmd);
  436.         DRM_LOG_KMS("\n");
  437. }
  438.  
  439. static const char *cmd_status_names[] = {
  440.         "Power on",
  441.         "Success",
  442.         "Not supported",
  443.         "Invalid arg",
  444.         "Pending",
  445.         "Target not specified",
  446.         "Scaling not supported"
  447. };
  448.  
  449. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  450.                                  const void *args, int args_len)
  451. {
  452.         u8 buf[args_len*2 + 2], status;
  453.         struct i2c_msg msgs[args_len + 3];
  454.         int i, ret;
  455.  
  456.         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  457.  
  458.         for (i = 0; i < args_len; i++) {
  459.                 msgs[i].addr = intel_sdvo->slave_addr;
  460.                 msgs[i].flags = 0;
  461.                 msgs[i].len = 2;
  462.                 msgs[i].buf = buf + 2 *i;
  463.                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  464.                 buf[2*i + 1] = ((u8*)args)[i];
  465.         }
  466.         msgs[i].addr = intel_sdvo->slave_addr;
  467.         msgs[i].flags = 0;
  468.         msgs[i].len = 2;
  469.         msgs[i].buf = buf + 2*i;
  470.         buf[2*i + 0] = SDVO_I2C_OPCODE;
  471.         buf[2*i + 1] = cmd;
  472.  
  473.         /* the following two are to read the response */
  474.         status = SDVO_I2C_CMD_STATUS;
  475.         msgs[i+1].addr = intel_sdvo->slave_addr;
  476.         msgs[i+1].flags = 0;
  477.         msgs[i+1].len = 1;
  478.         msgs[i+1].buf = &status;
  479.  
  480.         msgs[i+2].addr = intel_sdvo->slave_addr;
  481.         msgs[i+2].flags = I2C_M_RD;
  482.         msgs[i+2].len = 1;
  483.         msgs[i+2].buf = &status;
  484.  
  485.         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  486.         if (ret < 0) {
  487.                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  488.                 return false;
  489.         }
  490.         if (ret != i+3) {
  491.                 /* failure in I2C transfer */
  492.                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  493.                 return false;
  494.         }
  495.  
  496.         return true;
  497. }
  498.  
  499. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  500.                                      void *response, int response_len)
  501. {
  502.         u8 retry = 5;
  503.         u8 status;
  504.         int i;
  505.  
  506.         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  507.  
  508.         /*
  509.          * The documentation states that all commands will be
  510.          * processed within 15µs, and that we need only poll
  511.          * the status byte a maximum of 3 times in order for the
  512.          * command to be complete.
  513.          *
  514.          * Check 5 times in case the hardware failed to read the docs.
  515.          */
  516.         if (!intel_sdvo_read_byte(intel_sdvo,
  517.                                   SDVO_I2C_CMD_STATUS,
  518.                                   &status))
  519.                 goto log_fail;
  520.  
  521.         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  522.                 udelay(15);
  523.                 if (!intel_sdvo_read_byte(intel_sdvo,
  524.                                           SDVO_I2C_CMD_STATUS,
  525.                                           &status))
  526.                         goto log_fail;
  527.         }
  528.  
  529.         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  530.                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  531.         else
  532.                 DRM_LOG_KMS("(??? %d)", status);
  533.  
  534.         if (status != SDVO_CMD_STATUS_SUCCESS)
  535.                 goto log_fail;
  536.  
  537.         /* Read the command response */
  538.         for (i = 0; i < response_len; i++) {
  539.                 if (!intel_sdvo_read_byte(intel_sdvo,
  540.                                           SDVO_I2C_RETURN_0 + i,
  541.                                           &((u8 *)response)[i]))
  542.                         goto log_fail;
  543.                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  544.         }
  545.         DRM_LOG_KMS("\n");
  546.         return true;
  547.  
  548. log_fail:
  549.         DRM_LOG_KMS("... failed\n");
  550.         return false;
  551. }
  552.  
  553. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  554. {
  555.         if (mode->clock >= 100000)
  556.                 return 1;
  557.         else if (mode->clock >= 50000)
  558.                 return 2;
  559.         else
  560.                 return 4;
  561. }
  562.  
  563. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  564.                                               u8 ddc_bus)
  565. {
  566.         /* This must be the immediately preceding write before the i2c xfer */
  567.         return intel_sdvo_write_cmd(intel_sdvo,
  568.                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  569.                                     &ddc_bus, 1);
  570. }
  571.  
  572. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  573. {
  574.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  575.                 return false;
  576.  
  577.         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  578. }
  579.  
  580. static bool
  581. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  582. {
  583.         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  584.                 return false;
  585.  
  586.         return intel_sdvo_read_response(intel_sdvo, value, len);
  587. }
  588.  
  589. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  590. {
  591.         struct intel_sdvo_set_target_input_args targets = {0};
  592.         return intel_sdvo_set_value(intel_sdvo,
  593.                                     SDVO_CMD_SET_TARGET_INPUT,
  594.                                     &targets, sizeof(targets));
  595. }
  596.  
  597. /**
  598.  * Return whether each input is trained.
  599.  *
  600.  * This function is making an assumption about the layout of the response,
  601.  * which should be checked against the docs.
  602.  */
  603. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  604. {
  605.         struct intel_sdvo_get_trained_inputs_response response;
  606.  
  607.         BUILD_BUG_ON(sizeof(response) != 1);
  608.         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  609.                                   &response, sizeof(response)))
  610.                 return false;
  611.  
  612.         *input_1 = response.input0_trained;
  613.         *input_2 = response.input1_trained;
  614.         return true;
  615. }
  616.  
  617. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  618.                                           u16 outputs)
  619. {
  620.         return intel_sdvo_set_value(intel_sdvo,
  621.                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
  622.                                     &outputs, sizeof(outputs));
  623. }
  624.  
  625. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  626.                                                int mode)
  627. {
  628.         u8 state = SDVO_ENCODER_STATE_ON;
  629.  
  630.         switch (mode) {
  631.         case DRM_MODE_DPMS_ON:
  632.                 state = SDVO_ENCODER_STATE_ON;
  633.                 break;
  634.         case DRM_MODE_DPMS_STANDBY:
  635.                 state = SDVO_ENCODER_STATE_STANDBY;
  636.                 break;
  637.         case DRM_MODE_DPMS_SUSPEND:
  638.                 state = SDVO_ENCODER_STATE_SUSPEND;
  639.                 break;
  640.         case DRM_MODE_DPMS_OFF:
  641.                 state = SDVO_ENCODER_STATE_OFF;
  642.                 break;
  643.         }
  644.  
  645.         return intel_sdvo_set_value(intel_sdvo,
  646.                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  647. }
  648.  
  649. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  650.                                                    int *clock_min,
  651.                                                    int *clock_max)
  652. {
  653.         struct intel_sdvo_pixel_clock_range clocks;
  654.  
  655.         BUILD_BUG_ON(sizeof(clocks) != 4);
  656.         if (!intel_sdvo_get_value(intel_sdvo,
  657.                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  658.                                   &clocks, sizeof(clocks)))
  659.                 return false;
  660.  
  661.         /* Convert the values from units of 10 kHz to kHz. */
  662.         *clock_min = clocks.min * 10;
  663.         *clock_max = clocks.max * 10;
  664.         return true;
  665. }
  666.  
  667. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  668.                                          u16 outputs)
  669. {
  670.         return intel_sdvo_set_value(intel_sdvo,
  671.                                     SDVO_CMD_SET_TARGET_OUTPUT,
  672.                                     &outputs, sizeof(outputs));
  673. }
  674.  
  675. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  676.                                   struct intel_sdvo_dtd *dtd)
  677. {
  678.         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  679.                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  680. }
  681.  
  682. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  683.                                          struct intel_sdvo_dtd *dtd)
  684. {
  685.         return intel_sdvo_set_timing(intel_sdvo,
  686.                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  687. }
  688.  
  689. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  690.                                          struct intel_sdvo_dtd *dtd)
  691. {
  692.         return intel_sdvo_set_timing(intel_sdvo,
  693.                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  694. }
  695.  
  696. static bool
  697. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  698.                                          uint16_t clock,
  699.                                          uint16_t width,
  700.                                          uint16_t height)
  701. {
  702.         struct intel_sdvo_preferred_input_timing_args args;
  703.  
  704.         memset(&args, 0, sizeof(args));
  705.         args.clock = clock;
  706.         args.width = width;
  707.         args.height = height;
  708.         args.interlace = 0;
  709.  
  710.         if (intel_sdvo->is_lvds &&
  711.            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  712.             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  713.                 args.scaled = 1;
  714.  
  715.         return intel_sdvo_set_value(intel_sdvo,
  716.                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  717.                                     &args, sizeof(args));
  718. }
  719.  
  720. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  721.                                                   struct intel_sdvo_dtd *dtd)
  722. {
  723.         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  724.         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  725.         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  726.                                     &dtd->part1, sizeof(dtd->part1)) &&
  727.                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  728.                                      &dtd->part2, sizeof(dtd->part2));
  729. }
  730.  
  731. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  732. {
  733.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  734. }
  735.  
  736. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  737.                                          const struct drm_display_mode *mode)
  738. {
  739.         uint16_t width, height;
  740.         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  741.         uint16_t h_sync_offset, v_sync_offset;
  742.  
  743.         width = mode->crtc_hdisplay;
  744.         height = mode->crtc_vdisplay;
  745.  
  746.         /* do some mode translations */
  747.         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
  748.         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
  749.  
  750.         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
  751.         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
  752.  
  753.         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
  754.         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
  755.  
  756.         dtd->part1.clock = mode->clock / 10;
  757.         dtd->part1.h_active = width & 0xff;
  758.         dtd->part1.h_blank = h_blank_len & 0xff;
  759.         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  760.                 ((h_blank_len >> 8) & 0xf);
  761.         dtd->part1.v_active = height & 0xff;
  762.         dtd->part1.v_blank = v_blank_len & 0xff;
  763.         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  764.                 ((v_blank_len >> 8) & 0xf);
  765.  
  766.         dtd->part2.h_sync_off = h_sync_offset & 0xff;
  767.         dtd->part2.h_sync_width = h_sync_len & 0xff;
  768.         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  769.                 (v_sync_len & 0xf);
  770.         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  771.                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  772.                 ((v_sync_len & 0x30) >> 4);
  773.  
  774.         dtd->part2.dtd_flags = 0x18;
  775.         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  776.                 dtd->part2.dtd_flags |= 0x2;
  777.         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  778.                 dtd->part2.dtd_flags |= 0x4;
  779.  
  780.         dtd->part2.sdvo_flags = 0;
  781.         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  782.         dtd->part2.reserved = 0;
  783. }
  784.  
  785. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  786.                                          const struct intel_sdvo_dtd *dtd)
  787. {
  788.         mode->hdisplay = dtd->part1.h_active;
  789.         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  790.         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  791.         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  792.         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  793.         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  794.         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  795.         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  796.  
  797.         mode->vdisplay = dtd->part1.v_active;
  798.         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  799.         mode->vsync_start = mode->vdisplay;
  800.         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  801.         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  802.         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  803.         mode->vsync_end = mode->vsync_start +
  804.                 (dtd->part2.v_sync_off_width & 0xf);
  805.         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  806.         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  807.         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  808.  
  809.         mode->clock = dtd->part1.clock * 10;
  810.  
  811.         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  812.         if (dtd->part2.dtd_flags & 0x2)
  813.                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
  814.         if (dtd->part2.dtd_flags & 0x4)
  815.                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
  816. }
  817.  
  818. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  819. {
  820.         struct intel_sdvo_encode encode;
  821.  
  822.         BUILD_BUG_ON(sizeof(encode) != 2);
  823.         return intel_sdvo_get_value(intel_sdvo,
  824.                                   SDVO_CMD_GET_SUPP_ENCODE,
  825.                                   &encode, sizeof(encode));
  826. }
  827.  
  828. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  829.                                   uint8_t mode)
  830. {
  831.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  832. }
  833.  
  834. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  835.                                        uint8_t mode)
  836. {
  837.         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  838. }
  839.  
  840. #if 0
  841. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  842. {
  843.         int i, j;
  844.         uint8_t set_buf_index[2];
  845.         uint8_t av_split;
  846.         uint8_t buf_size;
  847.         uint8_t buf[48];
  848.         uint8_t *pos;
  849.  
  850.         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  851.  
  852.         for (i = 0; i <= av_split; i++) {
  853.                 set_buf_index[0] = i; set_buf_index[1] = 0;
  854.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  855.                                      set_buf_index, 2);
  856.                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  857.                 intel_sdvo_read_response(encoder, &buf_size, 1);
  858.  
  859.                 pos = buf;
  860.                 for (j = 0; j <= buf_size; j += 8) {
  861.                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  862.                                              NULL, 0);
  863.                         intel_sdvo_read_response(encoder, pos, 8);
  864.                         pos += 8;
  865.                 }
  866.         }
  867. }
  868. #endif
  869.  
  870. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  871. {
  872.         struct dip_infoframe avi_if = {
  873.                 .type = DIP_TYPE_AVI,
  874.                 .ver = DIP_VERSION_AVI,
  875.                 .len = DIP_LEN_AVI,
  876.         };
  877.         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  878.         uint8_t set_buf_index[2] = { 1, 0 };
  879.         uint64_t *data = (uint64_t *)&avi_if;
  880.         unsigned i;
  881.  
  882.         intel_dip_infoframe_csum(&avi_if);
  883.  
  884.         if (!intel_sdvo_set_value(intel_sdvo,
  885.                                   SDVO_CMD_SET_HBUF_INDEX,
  886.                                   set_buf_index, 2))
  887.                 return false;
  888.  
  889.         for (i = 0; i < sizeof(avi_if); i += 8) {
  890.                 if (!intel_sdvo_set_value(intel_sdvo,
  891.                                           SDVO_CMD_SET_HBUF_DATA,
  892.                                           data, 8))
  893.                         return false;
  894.                 data++;
  895.         }
  896.  
  897.         return intel_sdvo_set_value(intel_sdvo,
  898.                                     SDVO_CMD_SET_HBUF_TXRATE,
  899.                                     &tx_rate, 1);
  900. }
  901.  
  902. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  903. {
  904.         struct intel_sdvo_tv_format format;
  905.         uint32_t format_map;
  906.  
  907.         format_map = 1 << intel_sdvo->tv_format_index;
  908.         memset(&format, 0, sizeof(format));
  909.         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  910.  
  911.         BUILD_BUG_ON(sizeof(format) != 6);
  912.         return intel_sdvo_set_value(intel_sdvo,
  913.                                     SDVO_CMD_SET_TV_FORMAT,
  914.                                     &format, sizeof(format));
  915. }
  916.  
  917. static bool
  918. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  919.                                         struct drm_display_mode *mode)
  920. {
  921.         struct intel_sdvo_dtd output_dtd;
  922.  
  923.         if (!intel_sdvo_set_target_output(intel_sdvo,
  924.                                           intel_sdvo->attached_output))
  925.                 return false;
  926.  
  927.         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  928.         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  929.                 return false;
  930.  
  931.         return true;
  932. }
  933.  
  934. static bool
  935. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  936.                                         struct drm_display_mode *mode,
  937.                                         struct drm_display_mode *adjusted_mode)
  938. {
  939.         /* Reset the input timing to the screen. Assume always input 0. */
  940.         if (!intel_sdvo_set_target_input(intel_sdvo))
  941.                 return false;
  942.  
  943.         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  944.                                                       mode->clock / 10,
  945.                                                       mode->hdisplay,
  946.                                                       mode->vdisplay))
  947.                 return false;
  948.  
  949.         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  950.                                                    &intel_sdvo->input_dtd))
  951.                 return false;
  952.  
  953.         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  954.  
  955.         drm_mode_set_crtcinfo(adjusted_mode, 0);
  956.         return true;
  957. }
  958.  
  959. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  960.                                   struct drm_display_mode *mode,
  961.                                   struct drm_display_mode *adjusted_mode)
  962. {
  963.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  964.         int multiplier;
  965.  
  966.         /* We need to construct preferred input timings based on our
  967.          * output timings.  To do that, we have to set the output
  968.          * timings, even though this isn't really the right place in
  969.          * the sequence to do it. Oh well.
  970.          */
  971.         if (intel_sdvo->is_tv) {
  972.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  973.                         return false;
  974.  
  975.                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  976.                                                              mode,
  977.                                                              adjusted_mode);
  978.         } else if (intel_sdvo->is_lvds) {
  979.                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  980.                                                              intel_sdvo->sdvo_lvds_fixed_mode))
  981.                         return false;
  982.  
  983.                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  984.                                                              mode,
  985.                                                              adjusted_mode);
  986.         }
  987.  
  988.         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
  989.          * SDVO device will factor out the multiplier during mode_set.
  990.          */
  991.         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  992.         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  993.  
  994.         return true;
  995. }
  996.  
  997. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  998.                                 struct drm_display_mode *mode,
  999.                                 struct drm_display_mode *adjusted_mode)
  1000. {
  1001.         struct drm_device *dev = encoder->dev;
  1002.         struct drm_i915_private *dev_priv = dev->dev_private;
  1003.         struct drm_crtc *crtc = encoder->crtc;
  1004.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  1005.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1006.         u32 sdvox;
  1007.         struct intel_sdvo_in_out_map in_out;
  1008.         struct intel_sdvo_dtd input_dtd;
  1009.         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  1010.         int rate;
  1011.  
  1012.         if (!mode)
  1013.                 return;
  1014.  
  1015.         /* First, set the input mapping for the first input to our controlled
  1016.          * output. This is only correct if we're a single-input device, in
  1017.          * which case the first input is the output from the appropriate SDVO
  1018.          * channel on the motherboard.  In a two-input device, the first input
  1019.          * will be SDVOB and the second SDVOC.
  1020.          */
  1021.         in_out.in0 = intel_sdvo->attached_output;
  1022.         in_out.in1 = 0;
  1023.  
  1024.         intel_sdvo_set_value(intel_sdvo,
  1025.                              SDVO_CMD_SET_IN_OUT_MAP,
  1026.                              &in_out, sizeof(in_out));
  1027.  
  1028.         /* Set the output timings to the screen */
  1029.         if (!intel_sdvo_set_target_output(intel_sdvo,
  1030.                                           intel_sdvo->attached_output))
  1031.                 return;
  1032.  
  1033.         /* We have tried to get input timing in mode_fixup, and filled into
  1034.          * adjusted_mode.
  1035.          */
  1036.         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
  1037.                 input_dtd = intel_sdvo->input_dtd;
  1038.         } else {
  1039.                 /* Set the output timing to the screen */
  1040.                 if (!intel_sdvo_set_target_output(intel_sdvo,
  1041.                                                   intel_sdvo->attached_output))
  1042.                         return;
  1043.  
  1044.                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  1045.                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
  1046.         }
  1047.  
  1048.         /* Set the input timing to the screen. Assume always input 0. */
  1049.         if (!intel_sdvo_set_target_input(intel_sdvo))
  1050.                 return;
  1051.  
  1052.         if (intel_sdvo->has_hdmi_monitor) {
  1053.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  1054.                 intel_sdvo_set_colorimetry(intel_sdvo,
  1055.                                            SDVO_COLORIMETRY_RGB256);
  1056.                 intel_sdvo_set_avi_infoframe(intel_sdvo);
  1057.         } else
  1058.                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  1059.  
  1060.         if (intel_sdvo->is_tv &&
  1061.             !intel_sdvo_set_tv_format(intel_sdvo))
  1062.                 return;
  1063.  
  1064.         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  1065.  
  1066.         switch (pixel_multiplier) {
  1067.         default:
  1068.         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  1069.         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  1070.         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  1071.         }
  1072.         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  1073.                 return;
  1074.  
  1075.         /* Set the SDVO control regs. */
  1076.         if (INTEL_INFO(dev)->gen >= 4) {
  1077.                 /* The real mode polarity is set by the SDVO commands, using
  1078.                  * struct intel_sdvo_dtd. */
  1079.                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  1080.                 if (intel_sdvo->is_hdmi)
  1081.                         sdvox |= intel_sdvo->color_range;
  1082.                 if (INTEL_INFO(dev)->gen < 5)
  1083.                         sdvox |= SDVO_BORDER_ENABLE;
  1084.         } else {
  1085.                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
  1086.                 switch (intel_sdvo->sdvo_reg) {
  1087.                 case SDVOB:
  1088.                         sdvox &= SDVOB_PRESERVE_MASK;
  1089.                         break;
  1090.                 case SDVOC:
  1091.                         sdvox &= SDVOC_PRESERVE_MASK;
  1092.                         break;
  1093.                 }
  1094.                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  1095.         }
  1096.  
  1097.         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  1098.                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  1099.         else
  1100.                 sdvox |= TRANSCODER(intel_crtc->pipe);
  1101.  
  1102.         if (intel_sdvo->has_hdmi_audio)
  1103.                 sdvox |= SDVO_AUDIO_ENABLE;
  1104.  
  1105.         if (INTEL_INFO(dev)->gen >= 4) {
  1106.                 /* done in crtc_mode_set as the dpll_md reg must be written early */
  1107.         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  1108.                 /* done in crtc_mode_set as it lives inside the dpll register */
  1109.         } else {
  1110.                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  1111.         }
  1112.  
  1113.         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  1114.             INTEL_INFO(dev)->gen < 5)
  1115.                 sdvox |= SDVO_STALL_SELECT;
  1116.         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1117. }
  1118.  
  1119. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  1120. {
  1121.         struct drm_device *dev = encoder->dev;
  1122.         struct drm_i915_private *dev_priv = dev->dev_private;
  1123.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1124.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  1125.         u32 temp;
  1126.  
  1127.         if (mode != DRM_MODE_DPMS_ON) {
  1128.                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1129.                 if (0)
  1130.                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1131.  
  1132.                 if (mode == DRM_MODE_DPMS_OFF) {
  1133.                         temp = I915_READ(intel_sdvo->sdvo_reg);
  1134.                         if ((temp & SDVO_ENABLE) != 0) {
  1135.                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1136.                         }
  1137.                 }
  1138.         } else {
  1139.                 bool input1, input2;
  1140.                 int i;
  1141.                 u8 status;
  1142.  
  1143.                 temp = I915_READ(intel_sdvo->sdvo_reg);
  1144.                 if ((temp & SDVO_ENABLE) == 0)
  1145.                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1146.                 for (i = 0; i < 2; i++)
  1147.                         intel_wait_for_vblank(dev, intel_crtc->pipe);
  1148.  
  1149.                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1150.                 /* Warn if the device reported failure to sync.
  1151.                  * A lot of SDVO devices fail to notify of sync, but it's
  1152.                  * a given it the status is a success, we succeeded.
  1153.                  */
  1154.                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1155.                         DRM_DEBUG_KMS("First %s output reported failure to "
  1156.                                         "sync\n", SDVO_NAME(intel_sdvo));
  1157.                 }
  1158.  
  1159.                 if (0)
  1160.                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1161.                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1162.         }
  1163.         return;
  1164. }
  1165.  
  1166. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1167.                                  struct drm_display_mode *mode)
  1168. {
  1169.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1170.  
  1171.         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1172.                 return MODE_NO_DBLESCAN;
  1173.  
  1174.         if (intel_sdvo->pixel_clock_min > mode->clock)
  1175.                 return MODE_CLOCK_LOW;
  1176.  
  1177.         if (intel_sdvo->pixel_clock_max < mode->clock)
  1178.                 return MODE_CLOCK_HIGH;
  1179.  
  1180.         if (intel_sdvo->is_lvds) {
  1181.                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1182.                         return MODE_PANEL;
  1183.  
  1184.                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1185.                         return MODE_PANEL;
  1186.         }
  1187.  
  1188.         return MODE_OK;
  1189. }
  1190.  
  1191. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1192. {
  1193.         BUILD_BUG_ON(sizeof(*caps) != 8);
  1194.         if (!intel_sdvo_get_value(intel_sdvo,
  1195.                                   SDVO_CMD_GET_DEVICE_CAPS,
  1196.                                   caps, sizeof(*caps)))
  1197.                 return false;
  1198.  
  1199.         DRM_DEBUG_KMS("SDVO capabilities:\n"
  1200.                       "  vendor_id: %d\n"
  1201.                       "  device_id: %d\n"
  1202.                       "  device_rev_id: %d\n"
  1203.                       "  sdvo_version_major: %d\n"
  1204.                       "  sdvo_version_minor: %d\n"
  1205.                       "  sdvo_inputs_mask: %d\n"
  1206.                       "  smooth_scaling: %d\n"
  1207.                       "  sharp_scaling: %d\n"
  1208.                       "  up_scaling: %d\n"
  1209.                       "  down_scaling: %d\n"
  1210.                       "  stall_support: %d\n"
  1211.                       "  output_flags: %d\n",
  1212.                       caps->vendor_id,
  1213.                       caps->device_id,
  1214.                       caps->device_rev_id,
  1215.                       caps->sdvo_version_major,
  1216.                       caps->sdvo_version_minor,
  1217.                       caps->sdvo_inputs_mask,
  1218.                       caps->smooth_scaling,
  1219.                       caps->sharp_scaling,
  1220.                       caps->up_scaling,
  1221.                       caps->down_scaling,
  1222.                       caps->stall_support,
  1223.                       caps->output_flags);
  1224.  
  1225.         return true;
  1226. }
  1227.  
  1228. static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
  1229. {
  1230.         u8 response[2];
  1231.  
  1232.         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1233.                                     &response, 2) && response[0];
  1234. }
  1235.  
  1236. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1237. {
  1238.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1239.  
  1240.         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
  1241. }
  1242.  
  1243. static bool
  1244. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1245. {
  1246.         /* Is there more than one type of output? */
  1247.         return hweight16(intel_sdvo->caps.output_flags) > 1;
  1248. }
  1249.  
  1250. static struct edid *
  1251. intel_sdvo_get_edid(struct drm_connector *connector)
  1252. {
  1253.         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1254.         return drm_get_edid(connector, &sdvo->ddc);
  1255. }
  1256.  
  1257. /* Mac mini hack -- use the same DDC as the analog connector */
  1258. static struct edid *
  1259. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1260. {
  1261.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1262.  
  1263.         return drm_get_edid(connector,
  1264.                             &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  1265. }
  1266.  
  1267. enum drm_connector_status
  1268. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1269. {
  1270.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1271.         enum drm_connector_status status;
  1272.         struct edid *edid;
  1273.  
  1274.         edid = intel_sdvo_get_edid(connector);
  1275.  
  1276.         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1277.                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1278.  
  1279.                 /*
  1280.                  * Don't use the 1 as the argument of DDC bus switch to get
  1281.                  * the EDID. It is used for SDVO SPD ROM.
  1282.                  */
  1283.                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1284.                         intel_sdvo->ddc_bus = ddc;
  1285.                         edid = intel_sdvo_get_edid(connector);
  1286.                         if (edid)
  1287.                                 break;
  1288.                 }
  1289.                 /*
  1290.                  * If we found the EDID on the other bus,
  1291.                  * assume that is the correct DDC bus.
  1292.                  */
  1293.                 if (edid == NULL)
  1294.                         intel_sdvo->ddc_bus = saved_ddc;
  1295.         }
  1296.  
  1297.         /*
  1298.          * When there is no edid and no monitor is connected with VGA
  1299.          * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1300.          */
  1301.         if (edid == NULL)
  1302.                 edid = intel_sdvo_get_analog_edid(connector);
  1303.  
  1304.         status = connector_status_unknown;
  1305.         if (edid != NULL) {
  1306.                 /* DDC bus is shared, match EDID to connector type */
  1307.                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1308.                         status = connector_status_connected;
  1309.                         if (intel_sdvo->is_hdmi) {
  1310.                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1311.                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1312.                         }
  1313.                 } else
  1314.                         status = connector_status_disconnected;
  1315.                 connector->display_info.raw_edid = NULL;
  1316.                 kfree(edid);
  1317.         }
  1318.  
  1319.         if (status == connector_status_connected) {
  1320.                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1321.                 if (intel_sdvo_connector->force_audio)
  1322.                         intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
  1323.         }
  1324.  
  1325.         return status;
  1326. }
  1327.  
  1328. static bool
  1329. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1330.                                   struct edid *edid)
  1331. {
  1332.         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1333.         bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1334.  
  1335.         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1336.                       connector_is_digital, monitor_is_digital);
  1337.         return connector_is_digital == monitor_is_digital;
  1338. }
  1339.  
  1340. static enum drm_connector_status
  1341. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1342. {
  1343.         uint16_t response;
  1344.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1345.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1346.         enum drm_connector_status ret;
  1347.  
  1348.         if (!intel_sdvo_write_cmd(intel_sdvo,
  1349.                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1350.                 return connector_status_unknown;
  1351.  
  1352.         /* add 30ms delay when the output type might be TV */
  1353.         if (intel_sdvo->caps.output_flags &
  1354.             (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
  1355.                 mdelay(30);
  1356.  
  1357.         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1358.                 return connector_status_unknown;
  1359.  
  1360.         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1361.                       response & 0xff, response >> 8,
  1362.                       intel_sdvo_connector->output_flag);
  1363.  
  1364.         if (response == 0)
  1365.                 return connector_status_disconnected;
  1366.  
  1367.         intel_sdvo->attached_output = response;
  1368.  
  1369.         intel_sdvo->has_hdmi_monitor = false;
  1370.         intel_sdvo->has_hdmi_audio = false;
  1371.  
  1372.         if ((intel_sdvo_connector->output_flag & response) == 0)
  1373.                 ret = connector_status_disconnected;
  1374.         else if (IS_TMDS(intel_sdvo_connector))
  1375.                 ret = intel_sdvo_tmds_sink_detect(connector);
  1376.         else {
  1377.                 struct edid *edid;
  1378.  
  1379.                 /* if we have an edid check it matches the connection */
  1380.                 edid = intel_sdvo_get_edid(connector);
  1381.                 if (edid == NULL)
  1382.                         edid = intel_sdvo_get_analog_edid(connector);
  1383.                 if (edid != NULL) {
  1384.                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1385.                                                               edid))
  1386.                                 ret = connector_status_connected;
  1387.                         else
  1388.                                 ret = connector_status_disconnected;
  1389.  
  1390.                         connector->display_info.raw_edid = NULL;
  1391.                         kfree(edid);
  1392.                 } else
  1393.                         ret = connector_status_connected;
  1394.         }
  1395.  
  1396.         /* May update encoder flag for like clock for SDVO TV, etc.*/
  1397.         if (ret == connector_status_connected) {
  1398.                 intel_sdvo->is_tv = false;
  1399.                 intel_sdvo->is_lvds = false;
  1400.                 intel_sdvo->base.needs_tv_clock = false;
  1401.  
  1402.                 if (response & SDVO_TV_MASK) {
  1403.                         intel_sdvo->is_tv = true;
  1404.                         intel_sdvo->base.needs_tv_clock = true;
  1405.                 }
  1406.                 if (response & SDVO_LVDS_MASK)
  1407.                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1408.         }
  1409.  
  1410.         return ret;
  1411. }
  1412.  
  1413. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1414. {
  1415.         struct edid *edid;
  1416.  
  1417.         /* set the bus switch and get the modes */
  1418.         edid = intel_sdvo_get_edid(connector);
  1419.  
  1420.         /*
  1421.          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
  1422.          * link between analog and digital outputs. So, if the regular SDVO
  1423.          * DDC fails, check to see if the analog output is disconnected, in
  1424.          * which case we'll look there for the digital DDC data.
  1425.          */
  1426.         if (edid == NULL)
  1427.                 edid = intel_sdvo_get_analog_edid(connector);
  1428.  
  1429.         if (edid != NULL) {
  1430.                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1431.                                                       edid)) {
  1432.                         drm_mode_connector_update_edid_property(connector, edid);
  1433.                         drm_add_edid_modes(connector, edid);
  1434.                 }
  1435.  
  1436.                 connector->display_info.raw_edid = NULL;
  1437.                 kfree(edid);
  1438.         }
  1439. }
  1440.  
  1441. /*
  1442.  * Set of SDVO TV modes.
  1443.  * Note!  This is in reply order (see loop in get_tv_modes).
  1444.  * XXX: all 60Hz refresh?
  1445.  */
  1446. static const struct drm_display_mode sdvo_tv_modes[] = {
  1447.         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1448.                    416, 0, 200, 201, 232, 233, 0,
  1449.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1450.         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1451.                    416, 0, 240, 241, 272, 273, 0,
  1452.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1453.         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1454.                    496, 0, 300, 301, 332, 333, 0,
  1455.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1456.         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1457.                    736, 0, 350, 351, 382, 383, 0,
  1458.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1459.         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1460.                    736, 0, 400, 401, 432, 433, 0,
  1461.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1462.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1463.                    736, 0, 480, 481, 512, 513, 0,
  1464.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1465.         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1466.                    800, 0, 480, 481, 512, 513, 0,
  1467.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1468.         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1469.                    800, 0, 576, 577, 608, 609, 0,
  1470.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1471.         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1472.                    816, 0, 350, 351, 382, 383, 0,
  1473.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1474.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1475.                    816, 0, 400, 401, 432, 433, 0,
  1476.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1477.         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1478.                    816, 0, 480, 481, 512, 513, 0,
  1479.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1480.         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1481.                    816, 0, 540, 541, 572, 573, 0,
  1482.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1483.         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1484.                    816, 0, 576, 577, 608, 609, 0,
  1485.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1486.         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1487.                    864, 0, 576, 577, 608, 609, 0,
  1488.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1489.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1490.                    896, 0, 600, 601, 632, 633, 0,
  1491.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1492.         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1493.                    928, 0, 624, 625, 656, 657, 0,
  1494.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1495.         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1496.                    1016, 0, 766, 767, 798, 799, 0,
  1497.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1498.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1499.                    1120, 0, 768, 769, 800, 801, 0,
  1500.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1501.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1502.                    1376, 0, 1024, 1025, 1056, 1057, 0,
  1503.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1504. };
  1505.  
  1506. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1507. {
  1508.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1509.         struct intel_sdvo_sdtv_resolution_request tv_res;
  1510.         uint32_t reply = 0, format_map = 0;
  1511.         int i;
  1512.  
  1513.         /* Read the list of supported input resolutions for the selected TV
  1514.          * format.
  1515.          */
  1516.         format_map = 1 << intel_sdvo->tv_format_index;
  1517.         memcpy(&tv_res, &format_map,
  1518.                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1519.  
  1520.         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1521.                 return;
  1522.  
  1523.         BUILD_BUG_ON(sizeof(tv_res) != 3);
  1524.         if (!intel_sdvo_write_cmd(intel_sdvo,
  1525.                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1526.                                   &tv_res, sizeof(tv_res)))
  1527.                 return;
  1528.         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1529.                 return;
  1530.  
  1531.         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1532.                 if (reply & (1 << i)) {
  1533.                         struct drm_display_mode *nmode;
  1534.                         nmode = drm_mode_duplicate(connector->dev,
  1535.                                                    &sdvo_tv_modes[i]);
  1536.                         if (nmode)
  1537.                                 drm_mode_probed_add(connector, nmode);
  1538.                 }
  1539. }
  1540.  
  1541. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1542. {
  1543.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1544.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1545.         struct drm_display_mode *newmode;
  1546.  
  1547.         /*
  1548.          * Attempt to get the mode list from DDC.
  1549.          * Assume that the preferred modes are
  1550.          * arranged in priority order.
  1551.          */
  1552.         intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1553.         if (list_empty(&connector->probed_modes) == false)
  1554.                 goto end;
  1555.  
  1556.         /* Fetch modes from VBT */
  1557.         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1558.                 newmode = drm_mode_duplicate(connector->dev,
  1559.                                              dev_priv->sdvo_lvds_vbt_mode);
  1560.                 if (newmode != NULL) {
  1561.                         /* Guarantee the mode is preferred */
  1562.                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1563.                                          DRM_MODE_TYPE_DRIVER);
  1564.                         drm_mode_probed_add(connector, newmode);
  1565.                 }
  1566.         }
  1567.  
  1568. end:
  1569.         list_for_each_entry(newmode, &connector->probed_modes, head) {
  1570.                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1571.                         intel_sdvo->sdvo_lvds_fixed_mode =
  1572.                                 drm_mode_duplicate(connector->dev, newmode);
  1573.  
  1574.                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
  1575.                                               0);
  1576.  
  1577.                         intel_sdvo->is_lvds = true;
  1578.                         break;
  1579.                 }
  1580.         }
  1581.  
  1582. }
  1583.  
  1584. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1585. {
  1586.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1587.  
  1588.         if (IS_TV(intel_sdvo_connector))
  1589.                 intel_sdvo_get_tv_modes(connector);
  1590.         else if (IS_LVDS(intel_sdvo_connector))
  1591.                 intel_sdvo_get_lvds_modes(connector);
  1592.         else
  1593.                 intel_sdvo_get_ddc_modes(connector);
  1594.  
  1595.         return !list_empty(&connector->probed_modes);
  1596. }
  1597.  
  1598. static void
  1599. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1600. {
  1601.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1602.         struct drm_device *dev = connector->dev;
  1603.  
  1604.         if (intel_sdvo_connector->left)
  1605.                 drm_property_destroy(dev, intel_sdvo_connector->left);
  1606.         if (intel_sdvo_connector->right)
  1607.                 drm_property_destroy(dev, intel_sdvo_connector->right);
  1608.         if (intel_sdvo_connector->top)
  1609.                 drm_property_destroy(dev, intel_sdvo_connector->top);
  1610.         if (intel_sdvo_connector->bottom)
  1611.                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1612.         if (intel_sdvo_connector->hpos)
  1613.                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1614.         if (intel_sdvo_connector->vpos)
  1615.                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1616.         if (intel_sdvo_connector->saturation)
  1617.                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1618.         if (intel_sdvo_connector->contrast)
  1619.                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1620.         if (intel_sdvo_connector->hue)
  1621.                 drm_property_destroy(dev, intel_sdvo_connector->hue);
  1622.         if (intel_sdvo_connector->sharpness)
  1623.                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1624.         if (intel_sdvo_connector->flicker_filter)
  1625.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1626.         if (intel_sdvo_connector->flicker_filter_2d)
  1627.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1628.         if (intel_sdvo_connector->flicker_filter_adaptive)
  1629.                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1630.         if (intel_sdvo_connector->tv_luma_filter)
  1631.                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1632.         if (intel_sdvo_connector->tv_chroma_filter)
  1633.                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1634.         if (intel_sdvo_connector->dot_crawl)
  1635.                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1636.         if (intel_sdvo_connector->brightness)
  1637.                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1638. }
  1639.  
  1640. static void intel_sdvo_destroy(struct drm_connector *connector)
  1641. {
  1642.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1643.  
  1644.         if (intel_sdvo_connector->tv_format)
  1645.                 drm_property_destroy(connector->dev,
  1646.                                      intel_sdvo_connector->tv_format);
  1647.  
  1648.         intel_sdvo_destroy_enhance_property(connector);
  1649.         drm_sysfs_connector_remove(connector);
  1650.         drm_connector_cleanup(connector);
  1651.         kfree(connector);
  1652. }
  1653.  
  1654.  
  1655.  
  1656.  
  1657.  
  1658. static int
  1659. intel_sdvo_set_property(struct drm_connector *connector,
  1660.                         struct drm_property *property,
  1661.                         uint64_t val)
  1662. {
  1663.         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1664.         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1665.         struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1666.         uint16_t temp_value;
  1667.         uint8_t cmd;
  1668.         int ret;
  1669.  
  1670.         ret = drm_connector_property_set_value(connector, property, val);
  1671.         if (ret)
  1672.                 return ret;
  1673.  
  1674. #if 0
  1675.         if (property == dev_priv->force_audio_property) {
  1676.                 int i = val;
  1677.                 bool has_audio;
  1678.  
  1679.                 if (i == intel_sdvo_connector->force_audio)
  1680.                         return 0;
  1681.  
  1682.                 intel_sdvo_connector->force_audio = i;
  1683.  
  1684.                 if (i == 0)
  1685.                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1686.                 else
  1687.                         has_audio = i > 0;
  1688.  
  1689.                 if (has_audio == intel_sdvo->has_hdmi_audio)
  1690.                         return 0;
  1691.  
  1692.                 intel_sdvo->has_hdmi_audio = has_audio;
  1693.                 goto done;
  1694.         }
  1695.  
  1696.         if (property == dev_priv->broadcast_rgb_property) {
  1697.                 if (val == !!intel_sdvo->color_range)
  1698.                         return 0;
  1699.  
  1700.                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1701.                 goto done;
  1702.         }
  1703. #endif
  1704.  
  1705. #define CHECK_PROPERTY(name, NAME) \
  1706.         if (intel_sdvo_connector->name == property) { \
  1707.                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1708.                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1709.                 cmd = SDVO_CMD_SET_##NAME; \
  1710.                 intel_sdvo_connector->cur_##name = temp_value; \
  1711.                 goto set_value; \
  1712.         }
  1713.  
  1714.         if (property == intel_sdvo_connector->tv_format) {
  1715.                 if (val >= TV_FORMAT_NUM)
  1716.                         return -EINVAL;
  1717.  
  1718.                 if (intel_sdvo->tv_format_index ==
  1719.                     intel_sdvo_connector->tv_format_supported[val])
  1720.                         return 0;
  1721.  
  1722.                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1723.                 goto done;
  1724.         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1725.                 temp_value = val;
  1726.                 if (intel_sdvo_connector->left == property) {
  1727.                         drm_connector_property_set_value(connector,
  1728.                                                          intel_sdvo_connector->right, val);
  1729.                         if (intel_sdvo_connector->left_margin == temp_value)
  1730.                                 return 0;
  1731.  
  1732.                         intel_sdvo_connector->left_margin = temp_value;
  1733.                         intel_sdvo_connector->right_margin = temp_value;
  1734.                         temp_value = intel_sdvo_connector->max_hscan -
  1735.                                 intel_sdvo_connector->left_margin;
  1736.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  1737.                         goto set_value;
  1738.                 } else if (intel_sdvo_connector->right == property) {
  1739.                         drm_connector_property_set_value(connector,
  1740.                                                          intel_sdvo_connector->left, val);
  1741.                         if (intel_sdvo_connector->right_margin == temp_value)
  1742.                                 return 0;
  1743.  
  1744.                         intel_sdvo_connector->left_margin = temp_value;
  1745.                         intel_sdvo_connector->right_margin = temp_value;
  1746.                         temp_value = intel_sdvo_connector->max_hscan -
  1747.                                 intel_sdvo_connector->left_margin;
  1748.                         cmd = SDVO_CMD_SET_OVERSCAN_H;
  1749.                         goto set_value;
  1750.                 } else if (intel_sdvo_connector->top == property) {
  1751.                         drm_connector_property_set_value(connector,
  1752.                                                          intel_sdvo_connector->bottom, val);
  1753.                         if (intel_sdvo_connector->top_margin == temp_value)
  1754.                                 return 0;
  1755.  
  1756.                         intel_sdvo_connector->top_margin = temp_value;
  1757.                         intel_sdvo_connector->bottom_margin = temp_value;
  1758.                         temp_value = intel_sdvo_connector->max_vscan -
  1759.                                 intel_sdvo_connector->top_margin;
  1760.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  1761.                         goto set_value;
  1762.                 } else if (intel_sdvo_connector->bottom == property) {
  1763.                         drm_connector_property_set_value(connector,
  1764.                                                          intel_sdvo_connector->top, val);
  1765.                         if (intel_sdvo_connector->bottom_margin == temp_value)
  1766.                                 return 0;
  1767.  
  1768.                         intel_sdvo_connector->top_margin = temp_value;
  1769.                         intel_sdvo_connector->bottom_margin = temp_value;
  1770.                         temp_value = intel_sdvo_connector->max_vscan -
  1771.                                 intel_sdvo_connector->top_margin;
  1772.                         cmd = SDVO_CMD_SET_OVERSCAN_V;
  1773.                         goto set_value;
  1774.                 }
  1775.                 CHECK_PROPERTY(hpos, HPOS)
  1776.                 CHECK_PROPERTY(vpos, VPOS)
  1777.                 CHECK_PROPERTY(saturation, SATURATION)
  1778.                 CHECK_PROPERTY(contrast, CONTRAST)
  1779.                 CHECK_PROPERTY(hue, HUE)
  1780.                 CHECK_PROPERTY(brightness, BRIGHTNESS)
  1781.                 CHECK_PROPERTY(sharpness, SHARPNESS)
  1782.                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1783.                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1784.                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1785.                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1786.                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1787.                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1788.         }
  1789.  
  1790.         return -EINVAL; /* unknown property */
  1791.  
  1792. set_value:
  1793.         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1794.                 return -EIO;
  1795.  
  1796.  
  1797. done:
  1798.         if (intel_sdvo->base.base.crtc) {
  1799.                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1800.                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1801.                                          crtc->y, crtc->fb);
  1802.         }
  1803.  
  1804.         return 0;
  1805. #undef CHECK_PROPERTY
  1806. }
  1807.  
  1808. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1809.         .dpms = intel_sdvo_dpms,
  1810.         .mode_fixup = intel_sdvo_mode_fixup,
  1811.         .prepare = intel_encoder_prepare,
  1812.         .mode_set = intel_sdvo_mode_set,
  1813.         .commit = intel_encoder_commit,
  1814. };
  1815.  
  1816. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1817.         .dpms = drm_helper_connector_dpms,
  1818.         .detect = intel_sdvo_detect,
  1819.         .fill_modes = drm_helper_probe_single_connector_modes,
  1820.         .set_property = intel_sdvo_set_property,
  1821.         .destroy = intel_sdvo_destroy,
  1822. };
  1823.  
  1824. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1825.         .get_modes = intel_sdvo_get_modes,
  1826.         .mode_valid = intel_sdvo_mode_valid,
  1827.         .best_encoder = intel_best_encoder,
  1828. };
  1829.  
  1830. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1831. {
  1832.         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1833.  
  1834.         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1835.                 drm_mode_destroy(encoder->dev,
  1836.                                  intel_sdvo->sdvo_lvds_fixed_mode);
  1837.  
  1838. //   i2c_del_adapter(&intel_sdvo->ddc);
  1839.         intel_encoder_destroy(encoder);
  1840. }
  1841.  
  1842. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1843.         .destroy = intel_sdvo_enc_destroy,
  1844. };
  1845.  
  1846. static void
  1847. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1848. {
  1849.         uint16_t mask = 0;
  1850.         unsigned int num_bits;
  1851.  
  1852.         /* Make a mask of outputs less than or equal to our own priority in the
  1853.          * list.
  1854.          */
  1855.         switch (sdvo->controlled_output) {
  1856.         case SDVO_OUTPUT_LVDS1:
  1857.                 mask |= SDVO_OUTPUT_LVDS1;
  1858.         case SDVO_OUTPUT_LVDS0:
  1859.                 mask |= SDVO_OUTPUT_LVDS0;
  1860.         case SDVO_OUTPUT_TMDS1:
  1861.                 mask |= SDVO_OUTPUT_TMDS1;
  1862.         case SDVO_OUTPUT_TMDS0:
  1863.                 mask |= SDVO_OUTPUT_TMDS0;
  1864.         case SDVO_OUTPUT_RGB1:
  1865.                 mask |= SDVO_OUTPUT_RGB1;
  1866.         case SDVO_OUTPUT_RGB0:
  1867.                 mask |= SDVO_OUTPUT_RGB0;
  1868.                 break;
  1869.         }
  1870.  
  1871.         /* Count bits to find what number we are in the priority list. */
  1872.         mask &= sdvo->caps.output_flags;
  1873.         num_bits = hweight16(mask);
  1874.         /* If more than 3 outputs, default to DDC bus 3 for now. */
  1875.         if (num_bits > 3)
  1876.                 num_bits = 3;
  1877.  
  1878.         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1879.         sdvo->ddc_bus = 1 << num_bits;
  1880. }
  1881.  
  1882. /**
  1883.  * Choose the appropriate DDC bus for control bus switch command for this
  1884.  * SDVO output based on the controlled output.
  1885.  *
  1886.  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1887.  * outputs, then LVDS outputs.
  1888.  */
  1889. static void
  1890. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1891.                           struct intel_sdvo *sdvo, u32 reg)
  1892. {
  1893.         struct sdvo_device_mapping *mapping;
  1894.  
  1895.         if (IS_SDVOB(reg))
  1896.                 mapping = &(dev_priv->sdvo_mappings[0]);
  1897.         else
  1898.                 mapping = &(dev_priv->sdvo_mappings[1]);
  1899.  
  1900.         if (mapping->initialized)
  1901.                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1902.         else
  1903.                 intel_sdvo_guess_ddc_bus(sdvo);
  1904. }
  1905.  
  1906. static void
  1907. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1908.                           struct intel_sdvo *sdvo, u32 reg)
  1909. {
  1910.         struct sdvo_device_mapping *mapping;
  1911.         u8 pin;
  1912.  
  1913.         if (IS_SDVOB(reg))
  1914.                 mapping = &dev_priv->sdvo_mappings[0];
  1915.         else
  1916.                 mapping = &dev_priv->sdvo_mappings[1];
  1917.  
  1918.         pin = GMBUS_PORT_DPB;
  1919.         if (mapping->initialized)
  1920.                 pin = mapping->i2c_pin;
  1921.  
  1922.         if (pin < GMBUS_NUM_PORTS) {
  1923.                 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
  1924.                 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1925.                 intel_gmbus_force_bit(sdvo->i2c, true);
  1926.         } else {
  1927.                 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
  1928.         }
  1929. }
  1930.  
  1931. static bool
  1932. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1933. {
  1934.         return intel_sdvo_check_supp_encode(intel_sdvo);
  1935. }
  1936.  
  1937. static u8
  1938. intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
  1939. {
  1940.         struct drm_i915_private *dev_priv = dev->dev_private;
  1941.         struct sdvo_device_mapping *my_mapping, *other_mapping;
  1942.  
  1943.         if (IS_SDVOB(sdvo_reg)) {
  1944.                 my_mapping = &dev_priv->sdvo_mappings[0];
  1945.                 other_mapping = &dev_priv->sdvo_mappings[1];
  1946.         } else {
  1947.                 my_mapping = &dev_priv->sdvo_mappings[1];
  1948.                 other_mapping = &dev_priv->sdvo_mappings[0];
  1949.         }
  1950.  
  1951.         /* If the BIOS described our SDVO device, take advantage of it. */
  1952.         if (my_mapping->slave_addr)
  1953.                 return my_mapping->slave_addr;
  1954.  
  1955.         /* If the BIOS only described a different SDVO device, use the
  1956.          * address that it isn't using.
  1957.          */
  1958.         if (other_mapping->slave_addr) {
  1959.                 if (other_mapping->slave_addr == 0x70)
  1960.                         return 0x72;
  1961.                 else
  1962.                         return 0x70;
  1963.         }
  1964.  
  1965.         /* No SDVO device info is found for another DVO port,
  1966.          * so use mapping assumption we had before BIOS parsing.
  1967.          */
  1968.         if (IS_SDVOB(sdvo_reg))
  1969.                 return 0x70;
  1970.         else
  1971.                 return 0x72;
  1972. }
  1973.  
  1974. static void
  1975. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1976.                           struct intel_sdvo *encoder)
  1977. {
  1978.         drm_connector_init(encoder->base.base.dev,
  1979.                            &connector->base.base,
  1980.                            &intel_sdvo_connector_funcs,
  1981.                            connector->base.base.connector_type);
  1982.  
  1983.         drm_connector_helper_add(&connector->base.base,
  1984.                                  &intel_sdvo_connector_helper_funcs);
  1985.  
  1986.         connector->base.base.interlace_allowed = 0;
  1987.         connector->base.base.doublescan_allowed = 0;
  1988.         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1989.  
  1990.         intel_connector_attach_encoder(&connector->base, &encoder->base);
  1991.         drm_sysfs_connector_add(&connector->base.base);
  1992. }
  1993.  
  1994. static void
  1995. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1996. {
  1997.         struct drm_device *dev = connector->base.base.dev;
  1998.  
  1999.         intel_attach_force_audio_property(&connector->base.base);
  2000.         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  2001.                 intel_attach_broadcast_rgb_property(&connector->base.base);
  2002. }
  2003.  
  2004. static bool
  2005. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  2006. {
  2007.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2008.         struct drm_connector *connector;
  2009.         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  2010.         struct intel_connector *intel_connector;
  2011.         struct intel_sdvo_connector *intel_sdvo_connector;
  2012.  
  2013.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2014.         if (!intel_sdvo_connector)
  2015.                 return false;
  2016.  
  2017.         if (device == 0) {
  2018.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  2019.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  2020.         } else if (device == 1) {
  2021.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  2022.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  2023.         }
  2024.  
  2025.         intel_connector = &intel_sdvo_connector->base;
  2026.         connector = &intel_connector->base;
  2027.         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
  2028.                 connector->polled = DRM_CONNECTOR_POLL_HPD;
  2029.                 intel_sdvo->hotplug_active[0] |= 1 << device;
  2030.                 /* Some SDVO devices have one-shot hotplug interrupts.
  2031.                  * Ensure that they get re-enabled when an interrupt happens.
  2032.                  */
  2033.                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  2034.                 intel_sdvo_enable_hotplug(intel_encoder);
  2035.         }
  2036.         else
  2037.         connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  2038.         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  2039.         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  2040.  
  2041.         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  2042.                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  2043.                 intel_sdvo->is_hdmi = true;
  2044.         }
  2045.         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  2046.                                        (1 << INTEL_ANALOG_CLONE_BIT));
  2047.  
  2048.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2049.         if (intel_sdvo->is_hdmi)
  2050.                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  2051.  
  2052.         return true;
  2053. }
  2054.  
  2055. static bool
  2056. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  2057. {
  2058.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2059.         struct drm_connector *connector;
  2060.         struct intel_connector *intel_connector;
  2061.         struct intel_sdvo_connector *intel_sdvo_connector;
  2062.  
  2063.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2064.         if (!intel_sdvo_connector)
  2065.                 return false;
  2066.  
  2067.         intel_connector = &intel_sdvo_connector->base;
  2068.         connector = &intel_connector->base;
  2069.         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  2070.         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  2071.  
  2072.         intel_sdvo->controlled_output |= type;
  2073.         intel_sdvo_connector->output_flag = type;
  2074.  
  2075.         intel_sdvo->is_tv = true;
  2076.         intel_sdvo->base.needs_tv_clock = true;
  2077.         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  2078.  
  2079.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2080.  
  2081.         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  2082.                 goto err;
  2083.  
  2084.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2085.                 goto err;
  2086.  
  2087.         return true;
  2088.  
  2089. err:
  2090.         intel_sdvo_destroy(connector);
  2091.         return false;
  2092. }
  2093.  
  2094. static bool
  2095. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  2096. {
  2097.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2098.         struct drm_connector *connector;
  2099.         struct intel_connector *intel_connector;
  2100.         struct intel_sdvo_connector *intel_sdvo_connector;
  2101.  
  2102.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2103.         if (!intel_sdvo_connector)
  2104.                 return false;
  2105.  
  2106.         intel_connector = &intel_sdvo_connector->base;
  2107.         connector = &intel_connector->base;
  2108.         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  2109.         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  2110.         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  2111.  
  2112.         if (device == 0) {
  2113.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  2114.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  2115.         } else if (device == 1) {
  2116.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  2117.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  2118.         }
  2119.  
  2120.         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  2121.                                        (1 << INTEL_ANALOG_CLONE_BIT));
  2122.  
  2123.         intel_sdvo_connector_init(intel_sdvo_connector,
  2124.                                   intel_sdvo);
  2125.         return true;
  2126. }
  2127.  
  2128. static bool
  2129. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  2130. {
  2131.         struct drm_encoder *encoder = &intel_sdvo->base.base;
  2132.         struct drm_connector *connector;
  2133.         struct intel_connector *intel_connector;
  2134.         struct intel_sdvo_connector *intel_sdvo_connector;
  2135.  
  2136.         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  2137.         if (!intel_sdvo_connector)
  2138.                 return false;
  2139.  
  2140.         intel_connector = &intel_sdvo_connector->base;
  2141.         connector = &intel_connector->base;
  2142.         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  2143.         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  2144.  
  2145.         if (device == 0) {
  2146.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  2147.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  2148.         } else if (device == 1) {
  2149.                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  2150.                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  2151.         }
  2152.  
  2153.         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  2154.                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  2155.  
  2156.         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2157.         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2158.                 goto err;
  2159.  
  2160.         return true;
  2161.  
  2162. err:
  2163.         intel_sdvo_destroy(connector);
  2164.         return false;
  2165. }
  2166.  
  2167. static bool
  2168. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  2169. {
  2170.         intel_sdvo->is_tv = false;
  2171.         intel_sdvo->base.needs_tv_clock = false;
  2172.         intel_sdvo->is_lvds = false;
  2173.  
  2174.         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  2175.  
  2176.         if (flags & SDVO_OUTPUT_TMDS0)
  2177.                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  2178.                         return false;
  2179.  
  2180.         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  2181.                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  2182.                         return false;
  2183.  
  2184.         /* TV has no XXX1 function block */
  2185.         if (flags & SDVO_OUTPUT_SVID0)
  2186.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  2187.                         return false;
  2188.  
  2189.         if (flags & SDVO_OUTPUT_CVBS0)
  2190.                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  2191.                         return false;
  2192.  
  2193.         if (flags & SDVO_OUTPUT_RGB0)
  2194.                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
  2195.                         return false;
  2196.  
  2197.         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  2198.                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
  2199.                         return false;
  2200.  
  2201.         if (flags & SDVO_OUTPUT_LVDS0)
  2202.                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  2203.                         return false;
  2204.  
  2205.         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  2206.                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  2207.                         return false;
  2208.  
  2209.         if ((flags & SDVO_OUTPUT_MASK) == 0) {
  2210.                 unsigned char bytes[2];
  2211.  
  2212.                 intel_sdvo->controlled_output = 0;
  2213.                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2214.                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2215.                               SDVO_NAME(intel_sdvo),
  2216.                               bytes[0], bytes[1]);
  2217.                 return false;
  2218.         }
  2219.         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2220.  
  2221.         return true;
  2222. }
  2223.  
  2224. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2225.                                           struct intel_sdvo_connector *intel_sdvo_connector,
  2226.                                           int type)
  2227. {
  2228.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2229.         struct intel_sdvo_tv_format format;
  2230.         uint32_t format_map, i;
  2231.  
  2232.         if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2233.                 return false;
  2234.  
  2235.         BUILD_BUG_ON(sizeof(format) != 6);
  2236.         if (!intel_sdvo_get_value(intel_sdvo,
  2237.                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2238.                                   &format, sizeof(format)))
  2239.                 return false;
  2240.  
  2241.         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2242.  
  2243.         if (format_map == 0)
  2244.                 return false;
  2245.  
  2246.         intel_sdvo_connector->format_supported_num = 0;
  2247.         for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2248.                 if (format_map & (1 << i))
  2249.                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2250.  
  2251.  
  2252.         intel_sdvo_connector->tv_format =
  2253.                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2254.                                             "mode", intel_sdvo_connector->format_supported_num);
  2255.         if (!intel_sdvo_connector->tv_format)
  2256.                 return false;
  2257.  
  2258.         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2259.                 drm_property_add_enum(
  2260.                                 intel_sdvo_connector->tv_format, i,
  2261.                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2262.  
  2263.         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2264.         drm_connector_attach_property(&intel_sdvo_connector->base.base,
  2265.                                       intel_sdvo_connector->tv_format, 0);
  2266.         return true;
  2267.  
  2268. }
  2269.  
  2270. #define ENHANCEMENT(name, NAME) do { \
  2271.         if (enhancements.name) { \
  2272.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2273.                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2274.                         return false; \
  2275.                 intel_sdvo_connector->max_##name = data_value[0]; \
  2276.                 intel_sdvo_connector->cur_##name = response; \
  2277.                 intel_sdvo_connector->name = \
  2278.                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
  2279.                 if (!intel_sdvo_connector->name) return false; \
  2280.                 intel_sdvo_connector->name->values[0] = 0; \
  2281.                 intel_sdvo_connector->name->values[1] = data_value[0]; \
  2282.                 drm_connector_attach_property(connector, \
  2283.                                               intel_sdvo_connector->name, \
  2284.                                               intel_sdvo_connector->cur_##name); \
  2285.                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2286.                               data_value[0], data_value[1], response); \
  2287.         } \
  2288. } while (0)
  2289.  
  2290. static bool
  2291. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2292.                                       struct intel_sdvo_connector *intel_sdvo_connector,
  2293.                                       struct intel_sdvo_enhancements_reply enhancements)
  2294. {
  2295.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2296.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2297.         uint16_t response, data_value[2];
  2298.  
  2299.         /* when horizontal overscan is supported, Add the left/right  property */
  2300.         if (enhancements.overscan_h) {
  2301.                 if (!intel_sdvo_get_value(intel_sdvo,
  2302.                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
  2303.                                           &data_value, 4))
  2304.                         return false;
  2305.  
  2306.                 if (!intel_sdvo_get_value(intel_sdvo,
  2307.                                           SDVO_CMD_GET_OVERSCAN_H,
  2308.                                           &response, 2))
  2309.                         return false;
  2310.  
  2311.                 intel_sdvo_connector->max_hscan = data_value[0];
  2312.                 intel_sdvo_connector->left_margin = data_value[0] - response;
  2313.                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2314.                 intel_sdvo_connector->left =
  2315.                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2316.                                             "left_margin", 2);
  2317.                 if (!intel_sdvo_connector->left)
  2318.                         return false;
  2319.  
  2320.                 intel_sdvo_connector->left->values[0] = 0;
  2321.                 intel_sdvo_connector->left->values[1] = data_value[0];
  2322.                 drm_connector_attach_property(connector,
  2323.                                               intel_sdvo_connector->left,
  2324.                                               intel_sdvo_connector->left_margin);
  2325.  
  2326.                 intel_sdvo_connector->right =
  2327.                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2328.                                             "right_margin", 2);
  2329.                 if (!intel_sdvo_connector->right)
  2330.                         return false;
  2331.  
  2332.                 intel_sdvo_connector->right->values[0] = 0;
  2333.                 intel_sdvo_connector->right->values[1] = data_value[0];
  2334.                 drm_connector_attach_property(connector,
  2335.                                               intel_sdvo_connector->right,
  2336.                                               intel_sdvo_connector->right_margin);
  2337.                 DRM_DEBUG_KMS("h_overscan: max %d, "
  2338.                               "default %d, current %d\n",
  2339.                               data_value[0], data_value[1], response);
  2340.         }
  2341.  
  2342.         if (enhancements.overscan_v) {
  2343.                 if (!intel_sdvo_get_value(intel_sdvo,
  2344.                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
  2345.                                           &data_value, 4))
  2346.                         return false;
  2347.  
  2348.                 if (!intel_sdvo_get_value(intel_sdvo,
  2349.                                           SDVO_CMD_GET_OVERSCAN_V,
  2350.                                           &response, 2))
  2351.                         return false;
  2352.  
  2353.                 intel_sdvo_connector->max_vscan = data_value[0];
  2354.                 intel_sdvo_connector->top_margin = data_value[0] - response;
  2355.                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2356.                 intel_sdvo_connector->top =
  2357.                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2358.                                             "top_margin", 2);
  2359.                 if (!intel_sdvo_connector->top)
  2360.                         return false;
  2361.  
  2362.                 intel_sdvo_connector->top->values[0] = 0;
  2363.                 intel_sdvo_connector->top->values[1] = data_value[0];
  2364.                 drm_connector_attach_property(connector,
  2365.                                               intel_sdvo_connector->top,
  2366.                                               intel_sdvo_connector->top_margin);
  2367.  
  2368.                 intel_sdvo_connector->bottom =
  2369.                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2370.                                             "bottom_margin", 2);
  2371.                 if (!intel_sdvo_connector->bottom)
  2372.                         return false;
  2373.  
  2374.                 intel_sdvo_connector->bottom->values[0] = 0;
  2375.                 intel_sdvo_connector->bottom->values[1] = data_value[0];
  2376.                 drm_connector_attach_property(connector,
  2377.                                               intel_sdvo_connector->bottom,
  2378.                                               intel_sdvo_connector->bottom_margin);
  2379.                 DRM_DEBUG_KMS("v_overscan: max %d, "
  2380.                               "default %d, current %d\n",
  2381.                               data_value[0], data_value[1], response);
  2382.         }
  2383.  
  2384.         ENHANCEMENT(hpos, HPOS);
  2385.         ENHANCEMENT(vpos, VPOS);
  2386.         ENHANCEMENT(saturation, SATURATION);
  2387.         ENHANCEMENT(contrast, CONTRAST);
  2388.         ENHANCEMENT(hue, HUE);
  2389.         ENHANCEMENT(sharpness, SHARPNESS);
  2390.         ENHANCEMENT(brightness, BRIGHTNESS);
  2391.         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2392.         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2393.         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2394.         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2395.         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2396.  
  2397.         if (enhancements.dot_crawl) {
  2398.                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2399.                         return false;
  2400.  
  2401.                 intel_sdvo_connector->max_dot_crawl = 1;
  2402.                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2403.                 intel_sdvo_connector->dot_crawl =
  2404.                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
  2405.                 if (!intel_sdvo_connector->dot_crawl)
  2406.                         return false;
  2407.  
  2408.                 intel_sdvo_connector->dot_crawl->values[0] = 0;
  2409.                 intel_sdvo_connector->dot_crawl->values[1] = 1;
  2410.                 drm_connector_attach_property(connector,
  2411.                                               intel_sdvo_connector->dot_crawl,
  2412.                                               intel_sdvo_connector->cur_dot_crawl);
  2413.                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2414.         }
  2415.  
  2416.         return true;
  2417. }
  2418.  
  2419. static bool
  2420. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2421.                                         struct intel_sdvo_connector *intel_sdvo_connector,
  2422.                                         struct intel_sdvo_enhancements_reply enhancements)
  2423. {
  2424.         struct drm_device *dev = intel_sdvo->base.base.dev;
  2425.         struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2426.         uint16_t response, data_value[2];
  2427.  
  2428.         ENHANCEMENT(brightness, BRIGHTNESS);
  2429.  
  2430.         return true;
  2431. }
  2432. #undef ENHANCEMENT
  2433.  
  2434. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2435.                                                struct intel_sdvo_connector *intel_sdvo_connector)
  2436. {
  2437.         union {
  2438.                 struct intel_sdvo_enhancements_reply reply;
  2439.                 uint16_t response;
  2440.         } enhancements;
  2441.  
  2442.         BUILD_BUG_ON(sizeof(enhancements) != 2);
  2443.  
  2444.         enhancements.response = 0;
  2445.         intel_sdvo_get_value(intel_sdvo,
  2446.                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2447.                              &enhancements, sizeof(enhancements));
  2448.         if (enhancements.response == 0) {
  2449.                 DRM_DEBUG_KMS("No enhancement is supported\n");
  2450.                 return true;
  2451.         }
  2452.  
  2453.         if (IS_TV(intel_sdvo_connector))
  2454.                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2455.         else if (IS_LVDS(intel_sdvo_connector))
  2456.                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2457.         else
  2458.                 return true;
  2459. }
  2460.  
  2461. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2462.                                      struct i2c_msg *msgs,
  2463.                                      int num)
  2464. {
  2465.         struct intel_sdvo *sdvo = adapter->algo_data;
  2466.  
  2467.         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2468.                 return -EIO;
  2469.  
  2470.         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2471. }
  2472.  
  2473. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2474. {
  2475.         struct intel_sdvo *sdvo = adapter->algo_data;
  2476.         return sdvo->i2c->algo->functionality(sdvo->i2c);
  2477. }
  2478.  
  2479. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2480.         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
  2481.         .functionality  = intel_sdvo_ddc_proxy_func
  2482. };
  2483.  
  2484. static bool
  2485. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2486.                           struct drm_device *dev)
  2487. {
  2488. //   sdvo->ddc.owner = THIS_MODULE;
  2489.         sdvo->ddc.class = I2C_CLASS_DDC;
  2490.         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2491.         sdvo->ddc.dev.parent = &dev->pdev->dev;
  2492.         sdvo->ddc.algo_data = sdvo;
  2493.         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2494.  
  2495.     return 1; //i2c_add_adapter(&sdvo->ddc) == 0;
  2496. }
  2497.  
  2498. bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
  2499. {
  2500.     struct drm_i915_private *dev_priv = dev->dev_private;
  2501.     struct intel_encoder *intel_encoder;
  2502.     struct intel_sdvo *intel_sdvo;
  2503.     int i;
  2504.  
  2505.     intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2506.     if (!intel_sdvo)
  2507.         return false;
  2508.  
  2509.     intel_sdvo->sdvo_reg = sdvo_reg;
  2510.     intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
  2511.     intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2512.     if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2513.         kfree(intel_sdvo);
  2514.         return false;
  2515.     }
  2516.  
  2517.     /* encoder type will be decided later */
  2518.     intel_encoder = &intel_sdvo->base;
  2519.     intel_encoder->type = INTEL_OUTPUT_SDVO;
  2520.     drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2521.  
  2522.     /* Read the regs to test if we can talk to the device */
  2523.     for (i = 0; i < 0x40; i++) {
  2524.         u8 byte;
  2525.  
  2526.         if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2527.             DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
  2528.                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2529.             goto err;
  2530.         }
  2531.     }
  2532.  
  2533.     if (IS_SDVOB(sdvo_reg))
  2534.         dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2535.     else
  2536.         dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2537.  
  2538.     drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2539.  
  2540.     /* In default case sdvo lvds is false */
  2541.     if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2542.         goto err;
  2543.  
  2544.         /* Set up hotplug command - note paranoia about contents of reply.
  2545.          * We assume that the hardware is in a sane state, and only touch
  2546.          * the bits we think we understand.
  2547.          */
  2548.         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
  2549.                              &intel_sdvo->hotplug_active, 2);
  2550.         intel_sdvo->hotplug_active[0] &= ~0x3;
  2551.  
  2552.     if (intel_sdvo_output_setup(intel_sdvo,
  2553.                     intel_sdvo->caps.output_flags) != true) {
  2554.         DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
  2555.                   IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2556.         goto err;
  2557.     }
  2558.  
  2559.     intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2560.  
  2561.     /* Set the input timing to the screen. Assume always input 0. */
  2562.     if (!intel_sdvo_set_target_input(intel_sdvo))
  2563.         goto err;
  2564.  
  2565.     if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2566.                             &intel_sdvo->pixel_clock_min,
  2567.                             &intel_sdvo->pixel_clock_max))
  2568.         goto err;
  2569.  
  2570.     DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2571.             "clock range %dMHz - %dMHz, "
  2572.             "input 1: %c, input 2: %c, "
  2573.             "output 1: %c, output 2: %c\n",
  2574.             SDVO_NAME(intel_sdvo),
  2575.             intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2576.             intel_sdvo->caps.device_rev_id,
  2577.             intel_sdvo->pixel_clock_min / 1000,
  2578.             intel_sdvo->pixel_clock_max / 1000,
  2579.             (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2580.             (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2581.             /* check currently supported outputs */
  2582.             intel_sdvo->caps.output_flags &
  2583.             (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2584.             intel_sdvo->caps.output_flags &
  2585.             (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2586.     return true;
  2587.  
  2588. err:
  2589.     drm_encoder_cleanup(&intel_encoder->base);
  2590. //    i2c_del_adapter(&intel_sdvo->ddc);
  2591.     kfree(intel_sdvo);
  2592.  
  2593.     return false;
  2594. }
  2595.