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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. #include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <linux/vga_switcheroo.h>
  35. #include <drm/drmP.h>
  36. #include <drm/drm_atomic_helper.h>
  37. #include <drm/drm_crtc.h>
  38. #include <drm/drm_edid.h>
  39. #include "intel_drv.h"
  40. #include <drm/i915_drm.h>
  41. #include "i915_drv.h"
  42. #include <linux/acpi.h>
  43.  
  44. /* Private structure for the integrated LVDS support */
  45. struct intel_lvds_connector {
  46.         struct intel_connector base;
  47.  
  48.         struct notifier_block lid_notifier;
  49. };
  50.  
  51. struct intel_lvds_encoder {
  52.         struct intel_encoder base;
  53.  
  54.         bool is_dual_link;
  55.         i915_reg_t reg;
  56.         u32 a3_power;
  57.  
  58.         struct intel_lvds_connector *attached_connector;
  59. };
  60.  
  61. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  62. {
  63.         return container_of(encoder, struct intel_lvds_encoder, base.base);
  64. }
  65.  
  66. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  67. {
  68.         return container_of(connector, struct intel_lvds_connector, base.base);
  69. }
  70.  
  71. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  72.                                     enum pipe *pipe)
  73. {
  74.         struct drm_device *dev = encoder->base.dev;
  75.         struct drm_i915_private *dev_priv = dev->dev_private;
  76.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  77.         enum intel_display_power_domain power_domain;
  78.         u32 tmp;
  79.         bool ret;
  80.  
  81.         power_domain = intel_display_port_power_domain(encoder);
  82.         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  83.                 return false;
  84.  
  85.         ret = false;
  86.  
  87.         tmp = I915_READ(lvds_encoder->reg);
  88.  
  89.         if (!(tmp & LVDS_PORT_EN))
  90.                 goto out;
  91.  
  92.         if (HAS_PCH_CPT(dev))
  93.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  94.         else
  95.                 *pipe = PORT_TO_PIPE(tmp);
  96.  
  97.         ret = true;
  98.  
  99. out:
  100.         intel_display_power_put(dev_priv, power_domain);
  101.  
  102.         return ret;
  103. }
  104.  
  105. static void intel_lvds_get_config(struct intel_encoder *encoder,
  106.                                   struct intel_crtc_state *pipe_config)
  107. {
  108.         struct drm_device *dev = encoder->base.dev;
  109.         struct drm_i915_private *dev_priv = dev->dev_private;
  110.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  111.         u32 tmp, flags = 0;
  112.         int dotclock;
  113.  
  114.         tmp = I915_READ(lvds_encoder->reg);
  115.         if (tmp & LVDS_HSYNC_POLARITY)
  116.                 flags |= DRM_MODE_FLAG_NHSYNC;
  117.         else
  118.                 flags |= DRM_MODE_FLAG_PHSYNC;
  119.         if (tmp & LVDS_VSYNC_POLARITY)
  120.                 flags |= DRM_MODE_FLAG_NVSYNC;
  121.         else
  122.                 flags |= DRM_MODE_FLAG_PVSYNC;
  123.  
  124.         pipe_config->base.adjusted_mode.flags |= flags;
  125.  
  126.         if (INTEL_INFO(dev)->gen < 5)
  127.                 pipe_config->gmch_pfit.lvds_border_bits =
  128.                         tmp & LVDS_BORDER_ENABLE;
  129.  
  130.         /* gen2/3 store dither state in pfit control, needs to match */
  131.         if (INTEL_INFO(dev)->gen < 4) {
  132.                 tmp = I915_READ(PFIT_CONTROL);
  133.  
  134.                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  135.         }
  136.  
  137.         dotclock = pipe_config->port_clock;
  138.  
  139.         if (HAS_PCH_SPLIT(dev_priv->dev))
  140.                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
  141.  
  142.         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
  143. }
  144.  
  145. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  146. {
  147.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  148.         struct drm_device *dev = encoder->base.dev;
  149.         struct drm_i915_private *dev_priv = dev->dev_private;
  150.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  151.         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
  152.         int pipe = crtc->pipe;
  153.         u32 temp;
  154.  
  155.         if (HAS_PCH_SPLIT(dev)) {
  156.                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
  157.                 assert_shared_dpll_disabled(dev_priv,
  158.                                             intel_crtc_to_shared_dpll(crtc));
  159.         } else {
  160.                 assert_pll_disabled(dev_priv, pipe);
  161.         }
  162.  
  163.         temp = I915_READ(lvds_encoder->reg);
  164.         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  165.  
  166.         if (HAS_PCH_CPT(dev)) {
  167.                 temp &= ~PORT_TRANS_SEL_MASK;
  168.                 temp |= PORT_TRANS_SEL_CPT(pipe);
  169.         } else {
  170.                 if (pipe == 1) {
  171.                         temp |= LVDS_PIPEB_SELECT;
  172.                 } else {
  173.                         temp &= ~LVDS_PIPEB_SELECT;
  174.                 }
  175.         }
  176.  
  177.         /* set the corresponsding LVDS_BORDER bit */
  178.         temp &= ~LVDS_BORDER_ENABLE;
  179.         temp |= crtc->config->gmch_pfit.lvds_border_bits;
  180.         /* Set the B0-B3 data pairs corresponding to whether we're going to
  181.          * set the DPLLs for dual-channel mode or not.
  182.          */
  183.         if (lvds_encoder->is_dual_link)
  184.                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  185.         else
  186.                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  187.  
  188.         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  189.          * appropriately here, but we need to look more thoroughly into how
  190.          * panels behave in the two modes. For now, let's just maintain the
  191.          * value we got from the BIOS.
  192.          */
  193.          temp &= ~LVDS_A3_POWER_MASK;
  194.          temp |= lvds_encoder->a3_power;
  195.  
  196.         /* Set the dithering flag on LVDS as needed, note that there is no
  197.          * special lvds dither control bit on pch-split platforms, dithering is
  198.          * only controlled through the PIPECONF reg. */
  199.         if (INTEL_INFO(dev)->gen == 4) {
  200.                 /* Bspec wording suggests that LVDS port dithering only exists
  201.                  * for 18bpp panels. */
  202.                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
  203.                         temp |= LVDS_ENABLE_DITHER;
  204.                 else
  205.                         temp &= ~LVDS_ENABLE_DITHER;
  206.         }
  207.         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  208.         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  209.                 temp |= LVDS_HSYNC_POLARITY;
  210.         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  211.                 temp |= LVDS_VSYNC_POLARITY;
  212.  
  213.         I915_WRITE(lvds_encoder->reg, temp);
  214. }
  215.  
  216. /**
  217.  * Sets the power state for the panel.
  218.  */
  219. static void intel_enable_lvds(struct intel_encoder *encoder)
  220. {
  221.         struct drm_device *dev = encoder->base.dev;
  222.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  223.         struct intel_connector *intel_connector =
  224.                 &lvds_encoder->attached_connector->base;
  225.         struct drm_i915_private *dev_priv = dev->dev_private;
  226.         i915_reg_t ctl_reg, stat_reg;
  227.  
  228.         if (HAS_PCH_SPLIT(dev)) {
  229.                 ctl_reg = PCH_PP_CONTROL;
  230.                 stat_reg = PCH_PP_STATUS;
  231.         } else {
  232.                 ctl_reg = PP_CONTROL;
  233.                 stat_reg = PP_STATUS;
  234.         }
  235.  
  236.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  237.  
  238.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  239.         POSTING_READ(lvds_encoder->reg);
  240.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  241.                 DRM_ERROR("timed out waiting for panel to power on\n");
  242.  
  243.         intel_panel_enable_backlight(intel_connector);
  244. }
  245.  
  246. static void intel_disable_lvds(struct intel_encoder *encoder)
  247. {
  248.         struct drm_device *dev = encoder->base.dev;
  249.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  250.         struct drm_i915_private *dev_priv = dev->dev_private;
  251.         i915_reg_t ctl_reg, stat_reg;
  252.  
  253.         if (HAS_PCH_SPLIT(dev)) {
  254.                 ctl_reg = PCH_PP_CONTROL;
  255.                 stat_reg = PCH_PP_STATUS;
  256.         } else {
  257.                 ctl_reg = PP_CONTROL;
  258.                 stat_reg = PP_STATUS;
  259.         }
  260.  
  261.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  262.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  263.                 DRM_ERROR("timed out waiting for panel to power off\n");
  264.  
  265.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  266.         POSTING_READ(lvds_encoder->reg);
  267. }
  268.  
  269. static void gmch_disable_lvds(struct intel_encoder *encoder)
  270. {
  271.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  272.         struct intel_connector *intel_connector =
  273.                 &lvds_encoder->attached_connector->base;
  274.  
  275.         intel_panel_disable_backlight(intel_connector);
  276.  
  277.         intel_disable_lvds(encoder);
  278. }
  279.  
  280. static void pch_disable_lvds(struct intel_encoder *encoder)
  281. {
  282.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  283.         struct intel_connector *intel_connector =
  284.                 &lvds_encoder->attached_connector->base;
  285.  
  286.         intel_panel_disable_backlight(intel_connector);
  287. }
  288.  
  289. static void pch_post_disable_lvds(struct intel_encoder *encoder)
  290. {
  291.         intel_disable_lvds(encoder);
  292. }
  293.  
  294. static enum drm_mode_status
  295. intel_lvds_mode_valid(struct drm_connector *connector,
  296.                       struct drm_display_mode *mode)
  297. {
  298.         struct intel_connector *intel_connector = to_intel_connector(connector);
  299.         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  300.         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
  301.  
  302.         if (mode->hdisplay > fixed_mode->hdisplay)
  303.                 return MODE_PANEL;
  304.         if (mode->vdisplay > fixed_mode->vdisplay)
  305.                 return MODE_PANEL;
  306.         if (fixed_mode->clock > max_pixclk)
  307.                 return MODE_CLOCK_HIGH;
  308.  
  309.         return MODE_OK;
  310. }
  311.  
  312. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  313.                                       struct intel_crtc_state *pipe_config)
  314. {
  315.         struct drm_device *dev = intel_encoder->base.dev;
  316.         struct intel_lvds_encoder *lvds_encoder =
  317.                 to_lvds_encoder(&intel_encoder->base);
  318.         struct intel_connector *intel_connector =
  319.                 &lvds_encoder->attached_connector->base;
  320.         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  321.         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
  322.         unsigned int lvds_bpp;
  323.  
  324.         /* Should never happen!! */
  325.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  326.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  327.                 return false;
  328.         }
  329.  
  330.         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
  331.                 lvds_bpp = 8*3;
  332.         else
  333.                 lvds_bpp = 6*3;
  334.  
  335.         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  336.                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  337.                               pipe_config->pipe_bpp, lvds_bpp);
  338.                 pipe_config->pipe_bpp = lvds_bpp;
  339.         }
  340.  
  341.         /*
  342.          * We have timings from the BIOS for the panel, put them in
  343.          * to the adjusted mode.  The CRTC will be set up for this mode,
  344.          * with the panel scaling set up to source from the H/VDisplay
  345.          * of the original mode.
  346.          */
  347.         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  348.                                adjusted_mode);
  349.  
  350.         if (HAS_PCH_SPLIT(dev)) {
  351.                 pipe_config->has_pch_encoder = true;
  352.  
  353.                 intel_pch_panel_fitting(intel_crtc, pipe_config,
  354.                                         intel_connector->panel.fitting_mode);
  355.         } else {
  356.                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
  357.                                          intel_connector->panel.fitting_mode);
  358.  
  359.         }
  360.  
  361.         /*
  362.          * XXX: It would be nice to support lower refresh rates on the
  363.          * panels to reduce power consumption, and perhaps match the
  364.          * user's requested refresh rate.
  365.          */
  366.  
  367.         return true;
  368. }
  369.  
  370. /**
  371.  * Detect the LVDS connection.
  372.  *
  373.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  374.  * connected and closed means disconnected.  We also send hotplug events as
  375.  * needed, using lid status notification from the input layer.
  376.  */
  377. static enum drm_connector_status
  378. intel_lvds_detect(struct drm_connector *connector, bool force)
  379. {
  380.         struct drm_device *dev = connector->dev;
  381.         enum drm_connector_status status;
  382.  
  383.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  384.                       connector->base.id, connector->name);
  385.  
  386.         status = intel_panel_detect(dev);
  387.         if (status != connector_status_unknown)
  388.                 return status;
  389.  
  390.         return connector_status_connected;
  391. }
  392.  
  393. /**
  394.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  395.  */
  396. static int intel_lvds_get_modes(struct drm_connector *connector)
  397. {
  398.         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  399.         struct drm_device *dev = connector->dev;
  400.         struct drm_display_mode *mode;
  401.  
  402.         /* use cached edid if we have one */
  403.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  404.                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
  405.  
  406.         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  407.         if (mode == NULL)
  408.                 return 0;
  409.  
  410.         drm_mode_probed_add(connector, mode);
  411.         return 1;
  412. }
  413.  
  414. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  415. {
  416.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  417.         return 1;
  418. }
  419.  
  420. /* The GPU hangs up on these systems if modeset is performed on LID open */
  421. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  422.         {
  423.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  424.                 .ident = "Toshiba Tecra A11",
  425.                 .matches = {
  426.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  427.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  428.                 },
  429.         },
  430.  
  431.         { }     /* terminating entry */
  432. };
  433.  
  434. #if 0
  435. /*
  436.  * Lid events. Note the use of 'modeset':
  437.  *  - we set it to MODESET_ON_LID_OPEN on lid close,
  438.  *    and set it to MODESET_DONE on open
  439.  *  - we use it as a "only once" bit (ie we ignore
  440.  *    duplicate events where it was already properly set)
  441.  *  - the suspend/resume paths will set it to
  442.  *    MODESET_SUSPENDED and ignore the lid open event,
  443.  *    because they restore the mode ("lid open").
  444.  */
  445. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  446.                             void *unused)
  447. {
  448.         struct intel_lvds_connector *lvds_connector =
  449.                 container_of(nb, struct intel_lvds_connector, lid_notifier);
  450.         struct drm_connector *connector = &lvds_connector->base.base;
  451.         struct drm_device *dev = connector->dev;
  452.         struct drm_i915_private *dev_priv = dev->dev_private;
  453.  
  454.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  455.                 return NOTIFY_OK;
  456.  
  457.         mutex_lock(&dev_priv->modeset_restore_lock);
  458.         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  459.                 goto exit;
  460.         /*
  461.          * check and update the status of LVDS connector after receiving
  462.          * the LID nofication event.
  463.          */
  464.         connector->status = connector->funcs->detect(connector, false);
  465.  
  466.         /* Don't force modeset on machines where it causes a GPU lockup */
  467.         if (dmi_check_system(intel_no_modeset_on_lid))
  468.                 goto exit;
  469.         if (!acpi_lid_open()) {
  470.                 /* do modeset on next lid open event */
  471.                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  472.                 goto exit;
  473.         }
  474.  
  475.         if (dev_priv->modeset_restore == MODESET_DONE)
  476.                 goto exit;
  477.  
  478.         /*
  479.          * Some old platform's BIOS love to wreak havoc while the lid is closed.
  480.          * We try to detect this here and undo any damage. The split for PCH
  481.          * platforms is rather conservative and a bit arbitrary expect that on
  482.          * those platforms VGA disabling requires actual legacy VGA I/O access,
  483.          * and as part of the cleanup in the hw state restore we also redisable
  484.          * the vga plane.
  485.          */
  486.         if (!HAS_PCH_SPLIT(dev))
  487.                 intel_display_resume(dev);
  488.  
  489.         dev_priv->modeset_restore = MODESET_DONE;
  490.  
  491. exit:
  492.         mutex_unlock(&dev_priv->modeset_restore_lock);
  493.         return NOTIFY_OK;
  494. }
  495. #endif
  496.  
  497. /**
  498.  * intel_lvds_destroy - unregister and free LVDS structures
  499.  * @connector: connector to free
  500.  *
  501.  * Unregister the DDC bus for this connector then free the driver private
  502.  * structure.
  503.  */
  504. static void intel_lvds_destroy(struct drm_connector *connector)
  505. {
  506.         struct intel_lvds_connector *lvds_connector =
  507.                 to_lvds_connector(connector);
  508.  
  509.  
  510.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  511.                 kfree(lvds_connector->base.edid);
  512.  
  513.         intel_panel_fini(&lvds_connector->base.panel);
  514.  
  515.         drm_connector_cleanup(connector);
  516.         kfree(connector);
  517. }
  518.  
  519. static int intel_lvds_set_property(struct drm_connector *connector,
  520.                                    struct drm_property *property,
  521.                                    uint64_t value)
  522. {
  523.         struct intel_connector *intel_connector = to_intel_connector(connector);
  524.         struct drm_device *dev = connector->dev;
  525.  
  526.         if (property == dev->mode_config.scaling_mode_property) {
  527.                 struct drm_crtc *crtc;
  528.  
  529.                 if (value == DRM_MODE_SCALE_NONE) {
  530.                         DRM_DEBUG_KMS("no scaling not supported\n");
  531.                         return -EINVAL;
  532.                 }
  533.  
  534.                 if (intel_connector->panel.fitting_mode == value) {
  535.                         /* the LVDS scaling property is not changed */
  536.                         return 0;
  537.                 }
  538.                 intel_connector->panel.fitting_mode = value;
  539.  
  540.                 crtc = intel_attached_encoder(connector)->base.crtc;
  541.                 if (crtc && crtc->state->enable) {
  542.                         /*
  543.                          * If the CRTC is enabled, the display will be changed
  544.                          * according to the new panel fitting mode.
  545.                          */
  546.                         intel_crtc_restore_mode(crtc);
  547.                 }
  548.         }
  549.  
  550.         return 0;
  551. }
  552.  
  553. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  554.         .get_modes = intel_lvds_get_modes,
  555.         .mode_valid = intel_lvds_mode_valid,
  556.         .best_encoder = intel_best_encoder,
  557. };
  558.  
  559. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  560.         .dpms = drm_atomic_helper_connector_dpms,
  561.         .detect = intel_lvds_detect,
  562.         .fill_modes = drm_helper_probe_single_connector_modes,
  563.         .set_property = intel_lvds_set_property,
  564.         .atomic_get_property = intel_connector_atomic_get_property,
  565.         .destroy = intel_lvds_destroy,
  566.         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  567.         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  568. };
  569.  
  570. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  571.         .destroy = intel_encoder_destroy,
  572. };
  573.  
  574. static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  575. {
  576.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  577.         return 1;
  578. }
  579.  
  580. /* These systems claim to have LVDS, but really don't */
  581. static const struct dmi_system_id intel_no_lvds[] = {
  582.         {
  583.                 .callback = intel_no_lvds_dmi_callback,
  584.                 .ident = "Apple Mac Mini (Core series)",
  585.                 .matches = {
  586.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  587.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  588.                 },
  589.         },
  590.         {
  591.                 .callback = intel_no_lvds_dmi_callback,
  592.                 .ident = "Apple Mac Mini (Core 2 series)",
  593.                 .matches = {
  594.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  595.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  596.                 },
  597.         },
  598.         {
  599.                 .callback = intel_no_lvds_dmi_callback,
  600.                 .ident = "MSI IM-945GSE-A",
  601.                 .matches = {
  602.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  603.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  604.                 },
  605.         },
  606.         {
  607.                 .callback = intel_no_lvds_dmi_callback,
  608.                 .ident = "Dell Studio Hybrid",
  609.                 .matches = {
  610.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  611.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  612.                 },
  613.         },
  614.         {
  615.                 .callback = intel_no_lvds_dmi_callback,
  616.                 .ident = "Dell OptiPlex FX170",
  617.                 .matches = {
  618.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  619.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  620.                 },
  621.         },
  622.         {
  623.                 .callback = intel_no_lvds_dmi_callback,
  624.                 .ident = "AOpen Mini PC",
  625.                 .matches = {
  626.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  627.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  628.                 },
  629.         },
  630.         {
  631.                 .callback = intel_no_lvds_dmi_callback,
  632.                 .ident = "AOpen Mini PC MP915",
  633.                 .matches = {
  634.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  635.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  636.                 },
  637.         },
  638.         {
  639.                 .callback = intel_no_lvds_dmi_callback,
  640.                 .ident = "AOpen i915GMm-HFS",
  641.                 .matches = {
  642.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  643.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  644.                 },
  645.         },
  646.         {
  647.                 .callback = intel_no_lvds_dmi_callback,
  648.                 .ident = "AOpen i45GMx-I",
  649.                 .matches = {
  650.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  651.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  652.                 },
  653.         },
  654.         {
  655.                 .callback = intel_no_lvds_dmi_callback,
  656.                 .ident = "Aopen i945GTt-VFA",
  657.                 .matches = {
  658.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  659.                 },
  660.         },
  661.         {
  662.                 .callback = intel_no_lvds_dmi_callback,
  663.                 .ident = "Clientron U800",
  664.                 .matches = {
  665.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  666.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  667.                 },
  668.         },
  669.         {
  670.                 .callback = intel_no_lvds_dmi_callback,
  671.                 .ident = "Clientron E830",
  672.                 .matches = {
  673.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  674.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  675.                 },
  676.         },
  677.         {
  678.                 .callback = intel_no_lvds_dmi_callback,
  679.                 .ident = "Asus EeeBox PC EB1007",
  680.                 .matches = {
  681.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  682.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  683.                 },
  684.         },
  685.         {
  686.                 .callback = intel_no_lvds_dmi_callback,
  687.                 .ident = "Asus AT5NM10T-I",
  688.                 .matches = {
  689.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  690.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  691.                 },
  692.         },
  693.         {
  694.                 .callback = intel_no_lvds_dmi_callback,
  695.                 .ident = "Hewlett-Packard HP t5740",
  696.                 .matches = {
  697.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  698.                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  699.                 },
  700.         },
  701.         {
  702.                 .callback = intel_no_lvds_dmi_callback,
  703.                 .ident = "Hewlett-Packard t5745",
  704.                 .matches = {
  705.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  706.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  707.                 },
  708.         },
  709.         {
  710.                 .callback = intel_no_lvds_dmi_callback,
  711.                 .ident = "Hewlett-Packard st5747",
  712.                 .matches = {
  713.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  714.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  715.                 },
  716.         },
  717.         {
  718.                 .callback = intel_no_lvds_dmi_callback,
  719.                 .ident = "MSI Wind Box DC500",
  720.                 .matches = {
  721.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  722.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  723.                 },
  724.         },
  725.         {
  726.                 .callback = intel_no_lvds_dmi_callback,
  727.                 .ident = "Gigabyte GA-D525TUD",
  728.                 .matches = {
  729.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  730.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  731.                 },
  732.         },
  733.         {
  734.                 .callback = intel_no_lvds_dmi_callback,
  735.                 .ident = "Supermicro X7SPA-H",
  736.                 .matches = {
  737.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  738.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  739.                 },
  740.         },
  741.         {
  742.                 .callback = intel_no_lvds_dmi_callback,
  743.                 .ident = "Fujitsu Esprimo Q900",
  744.                 .matches = {
  745.                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  746.                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  747.                 },
  748.         },
  749.         {
  750.                 .callback = intel_no_lvds_dmi_callback,
  751.                 .ident = "Intel D410PT",
  752.                 .matches = {
  753.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  754.                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  755.                 },
  756.         },
  757.         {
  758.                 .callback = intel_no_lvds_dmi_callback,
  759.                 .ident = "Intel D425KT",
  760.                 .matches = {
  761.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  762.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  763.                 },
  764.         },
  765.         {
  766.                 .callback = intel_no_lvds_dmi_callback,
  767.                 .ident = "Intel D510MO",
  768.                 .matches = {
  769.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  770.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  771.                 },
  772.         },
  773.         {
  774.                 .callback = intel_no_lvds_dmi_callback,
  775.                 .ident = "Intel D525MW",
  776.                 .matches = {
  777.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  778.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  779.                 },
  780.         },
  781.  
  782.         { }     /* terminating entry */
  783. };
  784.  
  785. /*
  786.  * Enumerate the child dev array parsed from VBT to check whether
  787.  * the LVDS is present.
  788.  * If it is present, return 1.
  789.  * If it is not present, return false.
  790.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  791.  */
  792. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  793.                                    u8 *i2c_pin)
  794. {
  795.         struct drm_i915_private *dev_priv = dev->dev_private;
  796.         int i;
  797.  
  798.         if (!dev_priv->vbt.child_dev_num)
  799.                 return true;
  800.  
  801.         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  802.                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  803.                 struct old_child_dev_config *child = &uchild->old;
  804.  
  805.                 /* If the device type is not LFP, continue.
  806.                  * We have to check both the new identifiers as well as the
  807.                  * old for compatibility with some BIOSes.
  808.                  */
  809.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  810.                     child->device_type != DEVICE_TYPE_LFP)
  811.                         continue;
  812.  
  813.                 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
  814.                         *i2c_pin = child->i2c_pin;
  815.  
  816.                 /* However, we cannot trust the BIOS writers to populate
  817.                  * the VBT correctly.  Since LVDS requires additional
  818.                  * information from AIM blocks, a non-zero addin offset is
  819.                  * a good indicator that the LVDS is actually present.
  820.                  */
  821.                 if (child->addin_offset)
  822.                         return true;
  823.  
  824.                 /* But even then some BIOS writers perform some black magic
  825.                  * and instantiate the device without reference to any
  826.                  * additional data.  Trust that if the VBT was written into
  827.                  * the OpRegion then they have validated the LVDS's existence.
  828.                  */
  829.                 if (dev_priv->opregion.vbt)
  830.                         return true;
  831.         }
  832.  
  833.         return false;
  834. }
  835.  
  836. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  837. {
  838.         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  839.         return 1;
  840. }
  841.  
  842. static const struct dmi_system_id intel_dual_link_lvds[] = {
  843.         {
  844.                 .callback = intel_dual_link_lvds_callback,
  845.                 .ident = "Apple MacBook Pro 15\" (2010)",
  846.                 .matches = {
  847.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  848.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
  849.                 },
  850.         },
  851.         {
  852.                 .callback = intel_dual_link_lvds_callback,
  853.                 .ident = "Apple MacBook Pro 15\" (2011)",
  854.                 .matches = {
  855.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  856.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  857.                 },
  858.         },
  859.         {
  860.                 .callback = intel_dual_link_lvds_callback,
  861.                 .ident = "Apple MacBook Pro 15\" (2012)",
  862.                 .matches = {
  863.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  864.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
  865.                 },
  866.         },
  867.         { }     /* terminating entry */
  868. };
  869.  
  870. bool intel_is_dual_link_lvds(struct drm_device *dev)
  871. {
  872.         struct intel_encoder *encoder;
  873.         struct intel_lvds_encoder *lvds_encoder;
  874.  
  875.         for_each_intel_encoder(dev, encoder) {
  876.                 if (encoder->type == INTEL_OUTPUT_LVDS) {
  877.                         lvds_encoder = to_lvds_encoder(&encoder->base);
  878.  
  879.                         return lvds_encoder->is_dual_link;
  880.                 }
  881.         }
  882.  
  883.         return false;
  884. }
  885.  
  886. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  887. {
  888.         struct drm_device *dev = lvds_encoder->base.base.dev;
  889.         unsigned int val;
  890.         struct drm_i915_private *dev_priv = dev->dev_private;
  891.  
  892.         /* use the module option value if specified */
  893.         if (i915.lvds_channel_mode > 0)
  894.                 return i915.lvds_channel_mode == 2;
  895.  
  896.         /* single channel LVDS is limited to 112 MHz */
  897.         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
  898.             > 112999)
  899.                 return true;
  900.  
  901.         if (dmi_check_system(intel_dual_link_lvds))
  902.                 return true;
  903.  
  904.         /* BIOS should set the proper LVDS register value at boot, but
  905.          * in reality, it doesn't set the value when the lid is closed;
  906.          * we need to check "the value to be set" in VBT when LVDS
  907.          * register is uninitialized.
  908.          */
  909.         val = I915_READ(lvds_encoder->reg);
  910.         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  911.                 val = dev_priv->vbt.bios_lvds_val;
  912.  
  913.         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  914. }
  915.  
  916. static bool intel_lvds_supported(struct drm_device *dev)
  917. {
  918.         /* With the introduction of the PCH we gained a dedicated
  919.          * LVDS presence pin, use it. */
  920.         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  921.                 return true;
  922.  
  923.         /* Otherwise LVDS was only attached to mobile products,
  924.          * except for the inglorious 830gm */
  925.         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  926.                 return true;
  927.  
  928.         return false;
  929. }
  930.  
  931. /**
  932.  * intel_lvds_init - setup LVDS connectors on this device
  933.  * @dev: drm device
  934.  *
  935.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  936.  * modes we can display on the LVDS panel (if present).
  937.  */
  938. void intel_lvds_init(struct drm_device *dev)
  939. {
  940.         struct drm_i915_private *dev_priv = dev->dev_private;
  941.         struct intel_lvds_encoder *lvds_encoder;
  942.         struct intel_encoder *intel_encoder;
  943.         struct intel_lvds_connector *lvds_connector;
  944.         struct intel_connector *intel_connector;
  945.         struct drm_connector *connector;
  946.         struct drm_encoder *encoder;
  947.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  948.         struct drm_display_mode *fixed_mode = NULL;
  949.         struct drm_display_mode *downclock_mode = NULL;
  950.         struct edid *edid;
  951.         struct drm_crtc *crtc;
  952.         i915_reg_t lvds_reg;
  953.         u32 lvds;
  954.         int pipe;
  955.         u8 pin;
  956.  
  957.         /*
  958.          * Unlock registers and just leave them unlocked. Do this before
  959.          * checking quirk lists to avoid bogus WARNINGs.
  960.          */
  961.         if (HAS_PCH_SPLIT(dev)) {
  962.                 I915_WRITE(PCH_PP_CONTROL,
  963.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  964.         } else if (INTEL_INFO(dev_priv)->gen < 5) {
  965.                 I915_WRITE(PP_CONTROL,
  966.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  967.         }
  968.         if (!intel_lvds_supported(dev))
  969.                 return;
  970.  
  971.         /* Skip init on machines we know falsely report LVDS */
  972.         if (dmi_check_system(intel_no_lvds))
  973.                 return;
  974.  
  975.         if (HAS_PCH_SPLIT(dev))
  976.                 lvds_reg = PCH_LVDS;
  977.         else
  978.                 lvds_reg = LVDS;
  979.  
  980.         lvds = I915_READ(lvds_reg);
  981.  
  982.         if (HAS_PCH_SPLIT(dev)) {
  983.                 if ((lvds & LVDS_DETECTED) == 0)
  984.                         return;
  985.                 if (dev_priv->vbt.edp_support) {
  986.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  987.                         return;
  988.                 }
  989.         }
  990.  
  991.         pin = GMBUS_PIN_PANEL;
  992.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  993.                 if ((lvds & LVDS_PORT_EN) == 0) {
  994.                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  995.                         return;
  996.                 }
  997.                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
  998.         }
  999.  
  1000.          /* Set the Panel Power On/Off timings if uninitialized. */
  1001.         if (INTEL_INFO(dev_priv)->gen < 5 &&
  1002.             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
  1003.                 /* Set T2 to 40ms and T5 to 200ms */
  1004.                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  1005.  
  1006.                 /* Set T3 to 35ms and Tx to 200ms */
  1007.                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  1008.  
  1009.                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
  1010.         }
  1011.  
  1012.         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  1013.         if (!lvds_encoder)
  1014.                 return;
  1015.  
  1016.         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  1017.         if (!lvds_connector) {
  1018.                 kfree(lvds_encoder);
  1019.                 return;
  1020.         }
  1021.  
  1022.         if (intel_connector_init(&lvds_connector->base) < 0) {
  1023.                 kfree(lvds_connector);
  1024.                 kfree(lvds_encoder);
  1025.                 return;
  1026.         }
  1027.  
  1028.         lvds_encoder->attached_connector = lvds_connector;
  1029.  
  1030.         intel_encoder = &lvds_encoder->base;
  1031.         encoder = &intel_encoder->base;
  1032.         intel_connector = &lvds_connector->base;
  1033.         connector = &intel_connector->base;
  1034.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  1035.                            DRM_MODE_CONNECTOR_LVDS);
  1036.  
  1037.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  1038.                          DRM_MODE_ENCODER_LVDS, NULL);
  1039.  
  1040.         intel_encoder->enable = intel_enable_lvds;
  1041.         intel_encoder->pre_enable = intel_pre_enable_lvds;
  1042.         intel_encoder->compute_config = intel_lvds_compute_config;
  1043.         if (HAS_PCH_SPLIT(dev_priv)) {
  1044.                 intel_encoder->disable = pch_disable_lvds;
  1045.                 intel_encoder->post_disable = pch_post_disable_lvds;
  1046.         } else {
  1047.                 intel_encoder->disable = gmch_disable_lvds;
  1048.         }
  1049.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  1050.         intel_encoder->get_config = intel_lvds_get_config;
  1051.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  1052.         intel_connector->unregister = intel_connector_unregister;
  1053.  
  1054.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  1055.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  1056.  
  1057.         intel_encoder->cloneable = 0;
  1058.         if (HAS_PCH_SPLIT(dev))
  1059.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  1060.         else if (IS_GEN4(dev))
  1061.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  1062.         else
  1063.                 intel_encoder->crtc_mask = (1 << 1);
  1064.  
  1065.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  1066.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  1067.         connector->interlace_allowed = false;
  1068.         connector->doublescan_allowed = false;
  1069.  
  1070.         lvds_encoder->reg = lvds_reg;
  1071.  
  1072.         /* create the scaling mode property */
  1073.         drm_mode_create_scaling_mode_property(dev);
  1074.         drm_object_attach_property(&connector->base,
  1075.                                       dev->mode_config.scaling_mode_property,
  1076.                                       DRM_MODE_SCALE_ASPECT);
  1077.         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  1078.         /*
  1079.          * LVDS discovery:
  1080.          * 1) check for EDID on DDC
  1081.          * 2) check for VBT data
  1082.          * 3) check to see if LVDS is already on
  1083.          *    if none of the above, no panel
  1084.          * 4) make sure lid is open
  1085.          *    if closed, act like it's not there for now
  1086.          */
  1087.  
  1088.         /*
  1089.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1090.          * preferred mode is the right one.
  1091.          */
  1092.         mutex_lock(&dev->mode_config.mutex);
  1093.         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1094.         if (edid) {
  1095.                 if (drm_add_edid_modes(connector, edid)) {
  1096.                         drm_mode_connector_update_edid_property(connector,
  1097.                                                                 edid);
  1098.                 } else {
  1099.                         kfree(edid);
  1100.                         edid = ERR_PTR(-EINVAL);
  1101.                 }
  1102.         } else {
  1103.                 edid = ERR_PTR(-ENOENT);
  1104.         }
  1105.         lvds_connector->base.edid = edid;
  1106.  
  1107.         if (IS_ERR_OR_NULL(edid)) {
  1108.                 /* Didn't get an EDID, so
  1109.                  * Set wide sync ranges so we get all modes
  1110.                  * handed to valid_mode for checking
  1111.                  */
  1112.                 connector->display_info.min_vfreq = 0;
  1113.                 connector->display_info.max_vfreq = 200;
  1114.                 connector->display_info.min_hfreq = 0;
  1115.                 connector->display_info.max_hfreq = 200;
  1116.         }
  1117.  
  1118.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1119.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1120.                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1121.                         drm_mode_debug_printmodeline(scan);
  1122.  
  1123.                         fixed_mode = drm_mode_duplicate(dev, scan);
  1124.                         if (fixed_mode)
  1125.                                 goto out;
  1126.                 }
  1127.         }
  1128.  
  1129.         /* Failed to get EDID, what about VBT? */
  1130.         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  1131.                 DRM_DEBUG_KMS("using mode from VBT: ");
  1132.                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  1133.  
  1134.                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  1135.                 if (fixed_mode) {
  1136.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1137.                         goto out;
  1138.                 }
  1139.         }
  1140.  
  1141.         /*
  1142.          * If we didn't get EDID, try checking if the panel is already turned
  1143.          * on.  If so, assume that whatever is currently programmed is the
  1144.          * correct mode.
  1145.          */
  1146.  
  1147.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1148.         if (HAS_PCH_SPLIT(dev))
  1149.                 goto failed;
  1150.  
  1151.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1152.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1153.  
  1154.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1155.                 fixed_mode = intel_crtc_mode_get(dev, crtc);
  1156.                 if (fixed_mode) {
  1157.                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1158.                         drm_mode_debug_printmodeline(fixed_mode);
  1159.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1160.                         goto out;
  1161.                 }
  1162.         }
  1163.  
  1164.         /* If we still don't have a mode after all that, give up. */
  1165.         if (!fixed_mode)
  1166.                 goto failed;
  1167.  
  1168. out:
  1169.         mutex_unlock(&dev->mode_config.mutex);
  1170.  
  1171.         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
  1172.  
  1173.         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1174.         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1175.                       lvds_encoder->is_dual_link ? "dual" : "single");
  1176.  
  1177.         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
  1178.  
  1179.         drm_connector_register(connector);
  1180.  
  1181.         intel_panel_setup_backlight(connector, INVALID_PIPE);
  1182.  
  1183.         return;
  1184.  
  1185. failed:
  1186.         mutex_unlock(&dev->mode_config.mutex);
  1187.  
  1188.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1189.         drm_connector_cleanup(connector);
  1190.         drm_encoder_cleanup(encoder);
  1191.         kfree(lvds_encoder);
  1192.         kfree(lvds_connector);
  1193.         return;
  1194. }
  1195.