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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. //#include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_crtc.h>
  36. #include <drm/drm_edid.h>
  37. #include "intel_drv.h"
  38. #include <drm/i915_drm.h>
  39. #include "i915_drv.h"
  40. //#include <linux/acpi.h>
  41.  
  42. /* Private structure for the integrated LVDS support */
  43. struct intel_lvds {
  44.         struct intel_encoder base;
  45.  
  46.         struct edid *edid;
  47.  
  48.         int fitting_mode;
  49.         u32 pfit_control;
  50.         u32 pfit_pgm_ratios;
  51.         bool pfit_dirty;
  52.  
  53.         struct drm_display_mode *fixed_mode;
  54. };
  55.  
  56. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  57. {
  58.         return container_of(encoder, struct intel_lvds, base.base);
  59. }
  60.  
  61. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  62. {
  63.         return container_of(intel_attached_encoder(connector),
  64.                             struct intel_lvds, base);
  65. }
  66.  
  67. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  68.                                     enum pipe *pipe)
  69. {
  70.         struct drm_device *dev = encoder->base.dev;
  71.         struct drm_i915_private *dev_priv = dev->dev_private;
  72.         u32 lvds_reg, tmp;
  73.  
  74.         if (HAS_PCH_SPLIT(dev)) {
  75.                 lvds_reg = PCH_LVDS;
  76.         } else {
  77.                 lvds_reg = LVDS;
  78.         }
  79.  
  80.         tmp = I915_READ(lvds_reg);
  81.  
  82.         if (!(tmp & LVDS_PORT_EN))
  83.                 return false;
  84.  
  85.         if (HAS_PCH_CPT(dev))
  86.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  87.         else
  88.                 *pipe = PORT_TO_PIPE(tmp);
  89.  
  90.         return true;
  91. }
  92.  
  93. /**
  94.  * Sets the power state for the panel.
  95.  */
  96. static void intel_enable_lvds(struct intel_encoder *encoder)
  97. {
  98.         struct drm_device *dev = encoder->base.dev;
  99.         struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  100.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  101.         struct drm_i915_private *dev_priv = dev->dev_private;
  102.         u32 ctl_reg, lvds_reg, stat_reg;
  103.  
  104.         if (HAS_PCH_SPLIT(dev)) {
  105.                 ctl_reg = PCH_PP_CONTROL;
  106.                 lvds_reg = PCH_LVDS;
  107.                 stat_reg = PCH_PP_STATUS;
  108.         } else {
  109.                 ctl_reg = PP_CONTROL;
  110.                 lvds_reg = LVDS;
  111.                 stat_reg = PP_STATUS;
  112.         }
  113.  
  114.         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  115.  
  116.         if (intel_lvds->pfit_dirty) {
  117.                 /*
  118.                  * Enable automatic panel scaling so that non-native modes
  119.                  * fill the screen.  The panel fitter should only be
  120.                  * adjusted whilst the pipe is disabled, according to
  121.                  * register description and PRM.
  122.                  */
  123.                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  124.                               intel_lvds->pfit_control,
  125.                               intel_lvds->pfit_pgm_ratios);
  126.  
  127.                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  128.                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  129.                 intel_lvds->pfit_dirty = false;
  130.         }
  131.  
  132.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  133.         POSTING_READ(lvds_reg);
  134.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  135.                 DRM_ERROR("timed out waiting for panel to power on\n");
  136.  
  137.         intel_panel_enable_backlight(dev, intel_crtc->pipe);
  138. }
  139.  
  140. static void intel_disable_lvds(struct intel_encoder *encoder)
  141. {
  142.         struct drm_device *dev = encoder->base.dev;
  143.         struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  144.         struct drm_i915_private *dev_priv = dev->dev_private;
  145.         u32 ctl_reg, lvds_reg, stat_reg;
  146.  
  147.         if (HAS_PCH_SPLIT(dev)) {
  148.                 ctl_reg = PCH_PP_CONTROL;
  149.                 lvds_reg = PCH_LVDS;
  150.                 stat_reg = PCH_PP_STATUS;
  151.         } else {
  152.                 ctl_reg = PP_CONTROL;
  153.                 lvds_reg = LVDS;
  154.                 stat_reg = PP_STATUS;
  155.         }
  156.  
  157.         intel_panel_disable_backlight(dev);
  158.  
  159.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  160.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  161.                 DRM_ERROR("timed out waiting for panel to power off\n");
  162.  
  163.         if (intel_lvds->pfit_control) {
  164.                 I915_WRITE(PFIT_CONTROL, 0);
  165.                 intel_lvds->pfit_dirty = true;
  166.         }
  167.  
  168.         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  169.         POSTING_READ(lvds_reg);
  170. }
  171.  
  172. static int intel_lvds_mode_valid(struct drm_connector *connector,
  173.                                  struct drm_display_mode *mode)
  174. {
  175.         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  176.         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  177.  
  178.         if (mode->hdisplay > fixed_mode->hdisplay)
  179.                 return MODE_PANEL;
  180.         if (mode->vdisplay > fixed_mode->vdisplay)
  181.                 return MODE_PANEL;
  182.  
  183.         return MODE_OK;
  184. }
  185.  
  186. static void
  187. centre_horizontally(struct drm_display_mode *mode,
  188.                     int width)
  189. {
  190.         u32 border, sync_pos, blank_width, sync_width;
  191.  
  192.         /* keep the hsync and hblank widths constant */
  193.         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  194.         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  195.         sync_pos = (blank_width - sync_width + 1) / 2;
  196.  
  197.         border = (mode->hdisplay - width + 1) / 2;
  198.         border += border & 1; /* make the border even */
  199.  
  200.         mode->crtc_hdisplay = width;
  201.         mode->crtc_hblank_start = width + border;
  202.         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  203.  
  204.         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  205.         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  206.  
  207.         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  208. }
  209.  
  210. static void
  211. centre_vertically(struct drm_display_mode *mode,
  212.                   int height)
  213. {
  214.         u32 border, sync_pos, blank_width, sync_width;
  215.  
  216.         /* keep the vsync and vblank widths constant */
  217.         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  218.         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  219.         sync_pos = (blank_width - sync_width + 1) / 2;
  220.  
  221.         border = (mode->vdisplay - height + 1) / 2;
  222.  
  223.         mode->crtc_vdisplay = height;
  224.         mode->crtc_vblank_start = height + border;
  225.         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  226.  
  227.         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  228.         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  229.  
  230.         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  231. }
  232.  
  233. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  234. {
  235.         /*
  236.          * Floating point operation is not supported. So the FACTOR
  237.          * is defined, which can avoid the floating point computation
  238.          * when calculating the panel ratio.
  239.          */
  240. #define ACCURACY 12
  241. #define FACTOR (1 << ACCURACY)
  242.         u32 ratio = source * FACTOR / target;
  243.         return (FACTOR * ratio + FACTOR/2) / FACTOR;
  244. }
  245.  
  246. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  247.                                   const struct drm_display_mode *mode,
  248.                                   struct drm_display_mode *adjusted_mode)
  249. {
  250.         struct drm_device *dev = encoder->dev;
  251.         struct drm_i915_private *dev_priv = dev->dev_private;
  252.         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  253.         struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc;
  254.         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  255.         int pipe;
  256.  
  257.         /* Should never happen!! */
  258.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  259.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  260.                 return false;
  261.         }
  262.  
  263.         if (intel_encoder_check_is_cloned(&intel_lvds->base))
  264.                         return false;
  265.  
  266.         /*
  267.          * We have timings from the BIOS for the panel, put them in
  268.          * to the adjusted mode.  The CRTC will be set up for this mode,
  269.          * with the panel scaling set up to source from the H/VDisplay
  270.          * of the original mode.
  271.          */
  272.         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  273.  
  274.         if (HAS_PCH_SPLIT(dev)) {
  275.                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  276.                                         mode, adjusted_mode);
  277.                 return true;
  278.         }
  279.  
  280.         /* Native modes don't need fitting */
  281.         if (adjusted_mode->hdisplay == mode->hdisplay &&
  282.             adjusted_mode->vdisplay == mode->vdisplay)
  283.                 goto out;
  284.  
  285.         /* 965+ wants fuzzy fitting */
  286.         if (INTEL_INFO(dev)->gen >= 4)
  287.                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  288.                                  PFIT_FILTER_FUZZY);
  289.  
  290.         /*
  291.          * Enable automatic panel scaling for non-native modes so that they fill
  292.          * the screen.  Should be enabled before the pipe is enabled, according
  293.          * to register description and PRM.
  294.          * Change the value here to see the borders for debugging
  295.          */
  296.         for_each_pipe(pipe)
  297.                 I915_WRITE(BCLRPAT(pipe), 0);
  298.  
  299.         drm_mode_set_crtcinfo(adjusted_mode, 0);
  300.  
  301.         switch (intel_lvds->fitting_mode) {
  302.         case DRM_MODE_SCALE_CENTER:
  303.                 /*
  304.                  * For centered modes, we have to calculate border widths &
  305.                  * heights and modify the values programmed into the CRTC.
  306.                  */
  307.                 centre_horizontally(adjusted_mode, mode->hdisplay);
  308.                 centre_vertically(adjusted_mode, mode->vdisplay);
  309.                 border = LVDS_BORDER_ENABLE;
  310.                 break;
  311.  
  312.         case DRM_MODE_SCALE_ASPECT:
  313.                 /* Scale but preserve the aspect ratio */
  314.                 if (INTEL_INFO(dev)->gen >= 4) {
  315.                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  316.                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  317.  
  318.                         /* 965+ is easy, it does everything in hw */
  319.                         if (scaled_width > scaled_height)
  320.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  321.                         else if (scaled_width < scaled_height)
  322.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  323.                         else if (adjusted_mode->hdisplay != mode->hdisplay)
  324.                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  325.                 } else {
  326.                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  327.                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  328.                         /*
  329.                          * For earlier chips we have to calculate the scaling
  330.                          * ratio by hand and program it into the
  331.                          * PFIT_PGM_RATIO register
  332.                          */
  333.                         if (scaled_width > scaled_height) { /* pillar */
  334.                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  335.  
  336.                                 border = LVDS_BORDER_ENABLE;
  337.                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
  338.                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  339.                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  340.                                                             bits << PFIT_VERT_SCALE_SHIFT);
  341.                                         pfit_control |= (PFIT_ENABLE |
  342.                                                          VERT_INTERP_BILINEAR |
  343.                                                          HORIZ_INTERP_BILINEAR);
  344.                                 }
  345.                         } else if (scaled_width < scaled_height) { /* letter */
  346.                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  347.  
  348.                                 border = LVDS_BORDER_ENABLE;
  349.                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
  350.                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  351.                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  352.                                                             bits << PFIT_VERT_SCALE_SHIFT);
  353.                                         pfit_control |= (PFIT_ENABLE |
  354.                                                          VERT_INTERP_BILINEAR |
  355.                                                          HORIZ_INTERP_BILINEAR);
  356.                                 }
  357.                         } else
  358.                                 /* Aspects match, Let hw scale both directions */
  359.                                 pfit_control |= (PFIT_ENABLE |
  360.                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  361.                                                  VERT_INTERP_BILINEAR |
  362.                                                  HORIZ_INTERP_BILINEAR);
  363.                 }
  364.                 break;
  365.  
  366.         case DRM_MODE_SCALE_FULLSCREEN:
  367.                 /*
  368.                  * Full scaling, even if it changes the aspect ratio.
  369.                  * Fortunately this is all done for us in hw.
  370.                  */
  371.                 if (mode->vdisplay != adjusted_mode->vdisplay ||
  372.                     mode->hdisplay != adjusted_mode->hdisplay) {
  373.                         pfit_control |= PFIT_ENABLE;
  374.                         if (INTEL_INFO(dev)->gen >= 4)
  375.                                 pfit_control |= PFIT_SCALING_AUTO;
  376.                         else
  377.                                 pfit_control |= (VERT_AUTO_SCALE |
  378.                                                  VERT_INTERP_BILINEAR |
  379.                                                  HORIZ_AUTO_SCALE |
  380.                                                  HORIZ_INTERP_BILINEAR);
  381.                 }
  382.                 break;
  383.  
  384.         default:
  385.                 break;
  386.         }
  387.  
  388. out:
  389.         /* If not enabling scaling, be consistent and always use 0. */
  390.         if ((pfit_control & PFIT_ENABLE) == 0) {
  391.                 pfit_control = 0;
  392.                 pfit_pgm_ratios = 0;
  393.         }
  394.  
  395.         /* Make sure pre-965 set dither correctly */
  396.         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  397.                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  398.  
  399.         if (pfit_control != intel_lvds->pfit_control ||
  400.             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  401.                 intel_lvds->pfit_control = pfit_control;
  402.                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  403.                 intel_lvds->pfit_dirty = true;
  404.         }
  405.         dev_priv->lvds_border_bits = border;
  406.  
  407.         /*
  408.          * XXX: It would be nice to support lower refresh rates on the
  409.          * panels to reduce power consumption, and perhaps match the
  410.          * user's requested refresh rate.
  411.          */
  412.  
  413.         return true;
  414. }
  415.  
  416. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  417.                                 struct drm_display_mode *mode,
  418.                                 struct drm_display_mode *adjusted_mode)
  419. {
  420.         /*
  421.          * The LVDS pin pair will already have been turned on in the
  422.          * intel_crtc_mode_set since it has a large impact on the DPLL
  423.          * settings.
  424.          */
  425. }
  426.  
  427. /**
  428.  * Detect the LVDS connection.
  429.  *
  430.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  431.  * connected and closed means disconnected.  We also send hotplug events as
  432.  * needed, using lid status notification from the input layer.
  433.  */
  434. static enum drm_connector_status
  435. intel_lvds_detect(struct drm_connector *connector, bool force)
  436. {
  437.         struct drm_device *dev = connector->dev;
  438.         enum drm_connector_status status;
  439.  
  440.         status = intel_panel_detect(dev);
  441.         if (status != connector_status_unknown)
  442.                 return status;
  443.  
  444.         return connector_status_connected;
  445. }
  446.  
  447. /**
  448.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  449.  */
  450. static int intel_lvds_get_modes(struct drm_connector *connector)
  451. {
  452.         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  453.         struct drm_device *dev = connector->dev;
  454.         struct drm_display_mode *mode;
  455.  
  456.         if (intel_lvds->edid)
  457.                 return drm_add_edid_modes(connector, intel_lvds->edid);
  458.  
  459.         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  460.         if (mode == NULL)
  461.                 return 0;
  462.  
  463.         drm_mode_probed_add(connector, mode);
  464.         return 1;
  465. }
  466.  
  467. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  468. {
  469.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  470.         return 1;
  471. }
  472.  
  473. /* The GPU hangs up on these systems if modeset is performed on LID open */
  474. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  475.         {
  476.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  477.                 .ident = "Toshiba Tecra A11",
  478.                 .matches = {
  479.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  480.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  481.                 },
  482.         },
  483.  
  484.         { }     /* terminating entry */
  485. };
  486.  
  487. #if 0
  488. /*
  489.  * Lid events. Note the use of 'modeset_on_lid':
  490.  *  - we set it on lid close, and reset it on open
  491.  *  - we use it as a "only once" bit (ie we ignore
  492.  *    duplicate events where it was already properly
  493.  *    set/reset)
  494.  *  - the suspend/resume paths will also set it to
  495.  *    zero, since they restore the mode ("lid open").
  496.  */
  497. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  498.                             void *unused)
  499. {
  500.         struct drm_i915_private *dev_priv =
  501.                 container_of(nb, struct drm_i915_private, lid_notifier);
  502.         struct drm_device *dev = dev_priv->dev;
  503.         struct drm_connector *connector = dev_priv->int_lvds_connector;
  504.  
  505.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  506.                 return NOTIFY_OK;
  507.  
  508.         /*
  509.          * check and update the status of LVDS connector after receiving
  510.          * the LID nofication event.
  511.          */
  512.         if (connector)
  513.                 connector->status = connector->funcs->detect(connector,
  514.                                                              false);
  515.  
  516.         /* Don't force modeset on machines where it causes a GPU lockup */
  517.         if (dmi_check_system(intel_no_modeset_on_lid))
  518.                 return NOTIFY_OK;
  519.         if (!acpi_lid_open()) {
  520.                 dev_priv->modeset_on_lid = 1;
  521.                 return NOTIFY_OK;
  522.         }
  523.  
  524.         if (!dev_priv->modeset_on_lid)
  525.                 return NOTIFY_OK;
  526.  
  527.         dev_priv->modeset_on_lid = 0;
  528.  
  529.         mutex_lock(&dev->mode_config.mutex);
  530.         intel_modeset_check_state(dev);
  531.         mutex_unlock(&dev->mode_config.mutex);
  532.  
  533.         return NOTIFY_OK;
  534. }
  535. #endif
  536.  
  537. /**
  538.  * intel_lvds_destroy - unregister and free LVDS structures
  539.  * @connector: connector to free
  540.  *
  541.  * Unregister the DDC bus for this connector then free the driver private
  542.  * structure.
  543.  */
  544. static void intel_lvds_destroy(struct drm_connector *connector)
  545. {
  546.         struct drm_device *dev = connector->dev;
  547.         struct drm_i915_private *dev_priv = dev->dev_private;
  548.  
  549.         intel_panel_destroy_backlight(dev);
  550.  
  551. //   if (dev_priv->lid_notifier.notifier_call)
  552. //       acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  553.         drm_sysfs_connector_remove(connector);
  554.         drm_connector_cleanup(connector);
  555.         kfree(connector);
  556. }
  557.  
  558. static int intel_lvds_set_property(struct drm_connector *connector,
  559.                                    struct drm_property *property,
  560.                                    uint64_t value)
  561. {
  562.         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  563.         struct drm_device *dev = connector->dev;
  564.  
  565.         if (property == dev->mode_config.scaling_mode_property) {
  566.                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  567.  
  568.                 if (value == DRM_MODE_SCALE_NONE) {
  569.                         DRM_DEBUG_KMS("no scaling not supported\n");
  570.                         return -EINVAL;
  571.                 }
  572.  
  573.                 if (intel_lvds->fitting_mode == value) {
  574.                         /* the LVDS scaling property is not changed */
  575.                         return 0;
  576.                 }
  577.                 intel_lvds->fitting_mode = value;
  578.                 if (crtc && crtc->enabled) {
  579.                         /*
  580.                          * If the CRTC is enabled, the display will be changed
  581.                          * according to the new panel fitting mode.
  582.                          */
  583.                         intel_set_mode(crtc, &crtc->mode,
  584.                                 crtc->x, crtc->y, crtc->fb);
  585.                 }
  586.         }
  587.  
  588.         return 0;
  589. }
  590.  
  591. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  592.         .mode_fixup = intel_lvds_mode_fixup,
  593.         .mode_set = intel_lvds_mode_set,
  594.         .disable = intel_encoder_noop,
  595. };
  596.  
  597. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  598.         .get_modes = intel_lvds_get_modes,
  599.         .mode_valid = intel_lvds_mode_valid,
  600.         .best_encoder = intel_best_encoder,
  601. };
  602.  
  603. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  604.         .dpms = intel_connector_dpms,
  605.         .detect = intel_lvds_detect,
  606.         .fill_modes = drm_helper_probe_single_connector_modes,
  607.         .set_property = intel_lvds_set_property,
  608.         .destroy = intel_lvds_destroy,
  609. };
  610.  
  611. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  612.         .destroy = intel_encoder_destroy,
  613. };
  614.  
  615. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  616. {
  617.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  618.         return 1;
  619. }
  620.  
  621. /* These systems claim to have LVDS, but really don't */
  622. static const struct dmi_system_id intel_no_lvds[] = {
  623.         {
  624.                 .callback = intel_no_lvds_dmi_callback,
  625.                 .ident = "Apple Mac Mini (Core series)",
  626.                 .matches = {
  627.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  628.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  629.                 },
  630.         },
  631.         {
  632.                 .callback = intel_no_lvds_dmi_callback,
  633.                 .ident = "Apple Mac Mini (Core 2 series)",
  634.                 .matches = {
  635.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  636.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  637.                 },
  638.         },
  639.         {
  640.                 .callback = intel_no_lvds_dmi_callback,
  641.                 .ident = "MSI IM-945GSE-A",
  642.                 .matches = {
  643.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  644.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  645.                 },
  646.         },
  647.         {
  648.                 .callback = intel_no_lvds_dmi_callback,
  649.                 .ident = "Dell Studio Hybrid",
  650.                 .matches = {
  651.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  652.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  653.                 },
  654.         },
  655.         {
  656.                 .callback = intel_no_lvds_dmi_callback,
  657.                 .ident = "Dell OptiPlex FX170",
  658.                 .matches = {
  659.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  660.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  661.                 },
  662.         },
  663.         {
  664.                 .callback = intel_no_lvds_dmi_callback,
  665.                 .ident = "AOpen Mini PC",
  666.                 .matches = {
  667.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  668.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  669.                 },
  670.         },
  671.         {
  672.                 .callback = intel_no_lvds_dmi_callback,
  673.                 .ident = "AOpen Mini PC MP915",
  674.                 .matches = {
  675.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  676.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  677.                 },
  678.         },
  679.         {
  680.                 .callback = intel_no_lvds_dmi_callback,
  681.                 .ident = "AOpen i915GMm-HFS",
  682.                 .matches = {
  683.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  684.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  685.                 },
  686.         },
  687.         {
  688.                 .callback = intel_no_lvds_dmi_callback,
  689.                 .ident = "AOpen i45GMx-I",
  690.                 .matches = {
  691.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  692.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  693.                 },
  694.         },
  695.         {
  696.                 .callback = intel_no_lvds_dmi_callback,
  697.                 .ident = "Aopen i945GTt-VFA",
  698.                 .matches = {
  699.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  700.                 },
  701.         },
  702.         {
  703.                 .callback = intel_no_lvds_dmi_callback,
  704.                 .ident = "Clientron U800",
  705.                 .matches = {
  706.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  707.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  708.                 },
  709.         },
  710.         {
  711.                 .callback = intel_no_lvds_dmi_callback,
  712.                 .ident = "Clientron E830",
  713.                 .matches = {
  714.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  715.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  716.                 },
  717.         },
  718.         {
  719.                 .callback = intel_no_lvds_dmi_callback,
  720.                 .ident = "Asus EeeBox PC EB1007",
  721.                 .matches = {
  722.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  723.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  724.                 },
  725.         },
  726.         {
  727.                 .callback = intel_no_lvds_dmi_callback,
  728.                 .ident = "Asus AT5NM10T-I",
  729.                 .matches = {
  730.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  731.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  732.                 },
  733.         },
  734.         {
  735.                 .callback = intel_no_lvds_dmi_callback,
  736.                 .ident = "Hewlett-Packard HP t5740e Thin Client",
  737.                 .matches = {
  738.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  739.                         DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  740.                 },
  741.         },
  742.         {
  743.                 .callback = intel_no_lvds_dmi_callback,
  744.                 .ident = "Hewlett-Packard t5745",
  745.                 .matches = {
  746.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  747.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  748.                 },
  749.         },
  750.         {
  751.                 .callback = intel_no_lvds_dmi_callback,
  752.                 .ident = "Hewlett-Packard st5747",
  753.                 .matches = {
  754.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  755.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  756.                 },
  757.         },
  758.         {
  759.                 .callback = intel_no_lvds_dmi_callback,
  760.                 .ident = "MSI Wind Box DC500",
  761.                 .matches = {
  762.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  763.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  764.                 },
  765.         },
  766.         {
  767.                 .callback = intel_no_lvds_dmi_callback,
  768.                 .ident = "ZOTAC ZBOXSD-ID12/ID13",
  769.                 .matches = {
  770.                         DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  771.                         DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  772.                 },
  773.         },
  774.         {
  775.                 .callback = intel_no_lvds_dmi_callback,
  776.                 .ident = "Gigabyte GA-D525TUD",
  777.                 .matches = {
  778.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  779.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  780.                 },
  781.         },
  782.         {
  783.                 .callback = intel_no_lvds_dmi_callback,
  784.                 .ident = "Supermicro X7SPA-H",
  785.                 .matches = {
  786.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  787.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  788.                 },
  789.         },
  790.  
  791.         { }     /* terminating entry */
  792. };
  793.  
  794. /**
  795.  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  796.  * @dev: drm device
  797.  * @connector: LVDS connector
  798.  *
  799.  * Find the reduced downclock for LVDS in EDID.
  800.  */
  801. static void intel_find_lvds_downclock(struct drm_device *dev,
  802.                                       struct drm_display_mode *fixed_mode,
  803.                                       struct drm_connector *connector)
  804. {
  805.         struct drm_i915_private *dev_priv = dev->dev_private;
  806.         struct drm_display_mode *scan;
  807.         int temp_downclock;
  808.  
  809.         temp_downclock = fixed_mode->clock;
  810.         list_for_each_entry(scan, &connector->probed_modes, head) {
  811.                 /*
  812.                  * If one mode has the same resolution with the fixed_panel
  813.                  * mode while they have the different refresh rate, it means
  814.                  * that the reduced downclock is found for the LVDS. In such
  815.                  * case we can set the different FPx0/1 to dynamically select
  816.                  * between low and high frequency.
  817.                  */
  818.                 if (scan->hdisplay == fixed_mode->hdisplay &&
  819.                     scan->hsync_start == fixed_mode->hsync_start &&
  820.                     scan->hsync_end == fixed_mode->hsync_end &&
  821.                     scan->htotal == fixed_mode->htotal &&
  822.                     scan->vdisplay == fixed_mode->vdisplay &&
  823.                     scan->vsync_start == fixed_mode->vsync_start &&
  824.                     scan->vsync_end == fixed_mode->vsync_end &&
  825.                     scan->vtotal == fixed_mode->vtotal) {
  826.                         if (scan->clock < temp_downclock) {
  827.                                 /*
  828.                                  * The downclock is already found. But we
  829.                                  * expect to find the lower downclock.
  830.                                  */
  831.                                 temp_downclock = scan->clock;
  832.                         }
  833.                 }
  834.         }
  835.         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  836.                 /* We found the downclock for LVDS. */
  837.                 dev_priv->lvds_downclock_avail = 1;
  838.                 dev_priv->lvds_downclock = temp_downclock;
  839.                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  840.                               "Normal clock %dKhz, downclock %dKhz\n",
  841.                               fixed_mode->clock, temp_downclock);
  842.         }
  843. }
  844.  
  845. /*
  846.  * Enumerate the child dev array parsed from VBT to check whether
  847.  * the LVDS is present.
  848.  * If it is present, return 1.
  849.  * If it is not present, return false.
  850.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  851.  */
  852. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  853.                                    u8 *i2c_pin)
  854. {
  855.         struct drm_i915_private *dev_priv = dev->dev_private;
  856.         int i;
  857.  
  858.         if (!dev_priv->child_dev_num)
  859.                 return true;
  860.  
  861.         for (i = 0; i < dev_priv->child_dev_num; i++) {
  862.                 struct child_device_config *child = dev_priv->child_dev + i;
  863.  
  864.                 /* If the device type is not LFP, continue.
  865.                  * We have to check both the new identifiers as well as the
  866.                  * old for compatibility with some BIOSes.
  867.                  */
  868.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  869.                     child->device_type != DEVICE_TYPE_LFP)
  870.                         continue;
  871.  
  872.                 if (intel_gmbus_is_port_valid(child->i2c_pin))
  873.                     *i2c_pin = child->i2c_pin;
  874.  
  875.                 /* However, we cannot trust the BIOS writers to populate
  876.                  * the VBT correctly.  Since LVDS requires additional
  877.                  * information from AIM blocks, a non-zero addin offset is
  878.                  * a good indicator that the LVDS is actually present.
  879.                  */
  880.                 if (child->addin_offset)
  881.                         return true;
  882.  
  883.                 /* But even then some BIOS writers perform some black magic
  884.                  * and instantiate the device without reference to any
  885.                  * additional data.  Trust that if the VBT was written into
  886.                  * the OpRegion then they have validated the LVDS's existence.
  887.                  */
  888.                 if (dev_priv->opregion.vbt)
  889.                         return true;
  890.         }
  891.  
  892.         return false;
  893. }
  894.  
  895. static bool intel_lvds_supported(struct drm_device *dev)
  896. {
  897.         /* With the introduction of the PCH we gained a dedicated
  898.          * LVDS presence pin, use it. */
  899.         if (HAS_PCH_SPLIT(dev))
  900.                 return true;
  901.  
  902.         /* Otherwise LVDS was only attached to mobile products,
  903.          * except for the inglorious 830gm */
  904.         return IS_MOBILE(dev) && !IS_I830(dev);
  905. }
  906.  
  907. /**
  908.  * intel_lvds_init - setup LVDS connectors on this device
  909.  * @dev: drm device
  910.  *
  911.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  912.  * modes we can display on the LVDS panel (if present).
  913.  */
  914. bool intel_lvds_init(struct drm_device *dev)
  915. {
  916.         struct drm_i915_private *dev_priv = dev->dev_private;
  917.         struct intel_lvds *intel_lvds;
  918.         struct intel_encoder *intel_encoder;
  919.         struct intel_connector *intel_connector;
  920.         struct drm_connector *connector;
  921.         struct drm_encoder *encoder;
  922.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  923.         struct drm_crtc *crtc;
  924.         u32 lvds;
  925.         int pipe;
  926.         u8 pin;
  927.  
  928.         if (!intel_lvds_supported(dev))
  929.                 return false;
  930.  
  931.         /* Skip init on machines we know falsely report LVDS */
  932. //   if (dmi_check_system(intel_no_lvds))
  933. //       return false;
  934.  
  935.         pin = GMBUS_PORT_PANEL;
  936.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  937.                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  938.                 return false;
  939.         }
  940.  
  941.         if (HAS_PCH_SPLIT(dev)) {
  942.                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  943.                         return false;
  944.                 if (dev_priv->edp.support) {
  945.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  946.                         return false;
  947.                 }
  948.         }
  949.  
  950.         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  951.         if (!intel_lvds) {
  952.                 return false;
  953.         }
  954.  
  955.         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  956.         if (!intel_connector) {
  957.                 kfree(intel_lvds);
  958.                 return false;
  959.         }
  960.  
  961.         if (!HAS_PCH_SPLIT(dev)) {
  962.                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  963.         }
  964.  
  965.         intel_encoder = &intel_lvds->base;
  966.         encoder = &intel_encoder->base;
  967.         connector = &intel_connector->base;
  968.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  969.                            DRM_MODE_CONNECTOR_LVDS);
  970.  
  971.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  972.                          DRM_MODE_ENCODER_LVDS);
  973.  
  974.         intel_encoder->enable = intel_enable_lvds;
  975.         intel_encoder->disable = intel_disable_lvds;
  976.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  977.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  978.  
  979.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  980.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  981.  
  982.         intel_encoder->cloneable = false;
  983.         if (HAS_PCH_SPLIT(dev))
  984.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  985.         else if (IS_GEN4(dev))
  986.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  987.         else
  988.         intel_encoder->crtc_mask = (1 << 1);
  989.  
  990.         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  991.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  992.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  993.         connector->interlace_allowed = false;
  994.         connector->doublescan_allowed = false;
  995.  
  996.         /* create the scaling mode property */
  997.         drm_mode_create_scaling_mode_property(dev);
  998.         /*
  999.          * the initial panel fitting mode will be FULL_SCREEN.
  1000.          */
  1001.  
  1002.         drm_connector_attach_property(&intel_connector->base,
  1003.                                       dev->mode_config.scaling_mode_property,
  1004.                                       DRM_MODE_SCALE_ASPECT);
  1005.         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  1006.         /*
  1007.          * LVDS discovery:
  1008.          * 1) check for EDID on DDC
  1009.          * 2) check for VBT data
  1010.          * 3) check to see if LVDS is already on
  1011.          *    if none of the above, no panel
  1012.          * 4) make sure lid is open
  1013.          *    if closed, act like it's not there for now
  1014.          */
  1015.  
  1016.         /*
  1017.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1018.          * preferred mode is the right one.
  1019.          */
  1020.         intel_lvds->edid = drm_get_edid(connector,
  1021.                                         intel_gmbus_get_adapter(dev_priv,
  1022.                                                                 pin));
  1023.         if (intel_lvds->edid) {
  1024.                 if (drm_add_edid_modes(connector,
  1025.                                        intel_lvds->edid)) {
  1026.                         drm_mode_connector_update_edid_property(connector,
  1027.                                                                 intel_lvds->edid);
  1028.                 } else {
  1029.                         kfree(intel_lvds->edid);
  1030.                         intel_lvds->edid = NULL;
  1031.                 }
  1032.         }
  1033.         if (!intel_lvds->edid) {
  1034.                 /* Didn't get an EDID, so
  1035.                  * Set wide sync ranges so we get all modes
  1036.                  * handed to valid_mode for checking
  1037.                  */
  1038.                 connector->display_info.min_vfreq = 0;
  1039.                 connector->display_info.max_vfreq = 200;
  1040.                 connector->display_info.min_hfreq = 0;
  1041.                 connector->display_info.max_hfreq = 200;
  1042.         }
  1043.  
  1044.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1045.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1046.                         intel_lvds->fixed_mode =
  1047.                                 drm_mode_duplicate(dev, scan);
  1048.                         intel_find_lvds_downclock(dev,
  1049.                                                   intel_lvds->fixed_mode,
  1050.                                                   connector);
  1051.                         goto out;
  1052.                 }
  1053.         }
  1054.  
  1055.         /* Failed to get EDID, what about VBT? */
  1056.         if (dev_priv->lfp_lvds_vbt_mode) {
  1057.                 intel_lvds->fixed_mode =
  1058.                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  1059.                 if (intel_lvds->fixed_mode) {
  1060.                         intel_lvds->fixed_mode->type |=
  1061.                                 DRM_MODE_TYPE_PREFERRED;
  1062.                         goto out;
  1063.                 }
  1064.         }
  1065.  
  1066.         /*
  1067.          * If we didn't get EDID, try checking if the panel is already turned
  1068.          * on.  If so, assume that whatever is currently programmed is the
  1069.          * correct mode.
  1070.          */
  1071.  
  1072.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1073.         if (HAS_PCH_SPLIT(dev))
  1074.                 goto failed;
  1075.  
  1076.         lvds = I915_READ(LVDS);
  1077.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1078.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1079.  
  1080.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1081.                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  1082.                 if (intel_lvds->fixed_mode) {
  1083.                         intel_lvds->fixed_mode->type |=
  1084.                                 DRM_MODE_TYPE_PREFERRED;
  1085.                         goto out;
  1086.                 }
  1087.         }
  1088.  
  1089.         /* If we still don't have a mode after all that, give up. */
  1090.         if (!intel_lvds->fixed_mode)
  1091.                 goto failed;
  1092.  
  1093. out:
  1094.                 /*
  1095.                  * Unlock registers and just
  1096.                  * leave them unlocked
  1097.                  */
  1098.         if (HAS_PCH_SPLIT(dev)) {
  1099.                 I915_WRITE(PCH_PP_CONTROL,
  1100.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1101.         } else {
  1102.                 I915_WRITE(PP_CONTROL,
  1103.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1104.         }
  1105. //   dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  1106. //   if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  1107. //       DRM_DEBUG_KMS("lid notifier registration failed\n");
  1108.  //      dev_priv->lid_notifier.notifier_call = NULL;
  1109. //   }
  1110.         /* keep the LVDS connector */
  1111.         dev_priv->int_lvds_connector = connector;
  1112.         drm_sysfs_connector_add(connector);
  1113.  
  1114.         intel_panel_setup_backlight(dev);
  1115.  
  1116.         return true;
  1117.  
  1118. failed:
  1119.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1120.         drm_connector_cleanup(connector);
  1121.         drm_encoder_cleanup(encoder);
  1122.         kfree(intel_lvds);
  1123.         kfree(intel_connector);
  1124.         return false;
  1125. }
  1126.