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  1. /*
  2.  * Copyright © 2006-2007 Intel Corporation
  3.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22.  * DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * Authors:
  25.  *      Eric Anholt <eric@anholt.net>
  26.  *      Dave Airlie <airlied@linux.ie>
  27.  *      Jesse Barnes <jesse.barnes@intel.com>
  28.  */
  29.  
  30. //#include <acpi/button.h>
  31. //#include <linux/dmi.h>
  32. #include <linux/i2c.h>
  33. #include <linux/slab.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_crtc.h>
  36. #include <drm/drm_edid.h>
  37. #include "intel_drv.h"
  38. #include <drm/i915_drm.h>
  39. #include "i915_drv.h"
  40. //#include <linux/acpi.h>
  41.  
  42. /* Private structure for the integrated LVDS support */
  43. struct intel_lvds_connector {
  44.         struct intel_connector base;
  45.  
  46. //      struct notifier_block lid_notifier;
  47. };
  48.  
  49. struct intel_lvds_encoder {
  50.         struct intel_encoder base;
  51.  
  52.         bool is_dual_link;
  53.         u32 reg;
  54.  
  55.         struct intel_lvds_connector *attached_connector;
  56. };
  57.  
  58. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  59. {
  60.         return container_of(encoder, struct intel_lvds_encoder, base.base);
  61. }
  62.  
  63. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  64. {
  65.         return container_of(connector, struct intel_lvds_connector, base.base);
  66. }
  67.  
  68. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  69.                                     enum pipe *pipe)
  70. {
  71.         struct drm_device *dev = encoder->base.dev;
  72.         struct drm_i915_private *dev_priv = dev->dev_private;
  73.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  74.         u32 tmp;
  75.  
  76.         tmp = I915_READ(lvds_encoder->reg);
  77.  
  78.         if (!(tmp & LVDS_PORT_EN))
  79.                 return false;
  80.  
  81.         if (HAS_PCH_CPT(dev))
  82.                 *pipe = PORT_TO_PIPE_CPT(tmp);
  83.         else
  84.                 *pipe = PORT_TO_PIPE(tmp);
  85.  
  86.         return true;
  87. }
  88.  
  89. static void intel_lvds_get_config(struct intel_encoder *encoder,
  90.                                   struct intel_crtc_config *pipe_config)
  91. {
  92.         struct drm_device *dev = encoder->base.dev;
  93.         struct drm_i915_private *dev_priv = dev->dev_private;
  94.         u32 lvds_reg, tmp, flags = 0;
  95.  
  96.         if (HAS_PCH_SPLIT(dev))
  97.                 lvds_reg = PCH_LVDS;
  98.         else
  99.                 lvds_reg = LVDS;
  100.  
  101.         tmp = I915_READ(lvds_reg);
  102.         if (tmp & LVDS_HSYNC_POLARITY)
  103.                 flags |= DRM_MODE_FLAG_NHSYNC;
  104.         else
  105.                 flags |= DRM_MODE_FLAG_PHSYNC;
  106.         if (tmp & LVDS_VSYNC_POLARITY)
  107.                 flags |= DRM_MODE_FLAG_NVSYNC;
  108.         else
  109.                 flags |= DRM_MODE_FLAG_PVSYNC;
  110.  
  111.         pipe_config->adjusted_mode.flags |= flags;
  112.  
  113.         /* gen2/3 store dither state in pfit control, needs to match */
  114.         if (INTEL_INFO(dev)->gen < 4) {
  115.                 tmp = I915_READ(PFIT_CONTROL);
  116.  
  117.                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  118.         }
  119. }
  120.  
  121. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  122.  * This is an exception to the general rule that mode_set doesn't turn
  123.  * things on.
  124.  */
  125. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  126. {
  127.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  128.         struct drm_device *dev = encoder->base.dev;
  129.         struct drm_i915_private *dev_priv = dev->dev_private;
  130.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  131.         const struct drm_display_mode *adjusted_mode =
  132.                 &crtc->config.adjusted_mode;
  133.         int pipe = crtc->pipe;
  134.         u32 temp;
  135.  
  136.         if (HAS_PCH_SPLIT(dev)) {
  137.                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
  138.                 assert_shared_dpll_disabled(dev_priv,
  139.                                             intel_crtc_to_shared_dpll(crtc));
  140.         } else {
  141.                 assert_pll_disabled(dev_priv, pipe);
  142.         }
  143.  
  144.         temp = I915_READ(lvds_encoder->reg);
  145.         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  146.  
  147.         if (HAS_PCH_CPT(dev)) {
  148.                 temp &= ~PORT_TRANS_SEL_MASK;
  149.                 temp |= PORT_TRANS_SEL_CPT(pipe);
  150.         } else {
  151.                 if (pipe == 1) {
  152.                         temp |= LVDS_PIPEB_SELECT;
  153.                 } else {
  154.                         temp &= ~LVDS_PIPEB_SELECT;
  155.                 }
  156.         }
  157.  
  158.         /* set the corresponsding LVDS_BORDER bit */
  159.         temp &= ~LVDS_BORDER_ENABLE;
  160.         temp |= crtc->config.gmch_pfit.lvds_border_bits;
  161.         /* Set the B0-B3 data pairs corresponding to whether we're going to
  162.          * set the DPLLs for dual-channel mode or not.
  163.          */
  164.         if (lvds_encoder->is_dual_link)
  165.                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  166.         else
  167.                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  168.  
  169.         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  170.          * appropriately here, but we need to look more thoroughly into how
  171.          * panels behave in the two modes.
  172.          */
  173.  
  174.         /* Set the dithering flag on LVDS as needed, note that there is no
  175.          * special lvds dither control bit on pch-split platforms, dithering is
  176.          * only controlled through the PIPECONF reg. */
  177.         if (INTEL_INFO(dev)->gen == 4) {
  178.                 /* Bspec wording suggests that LVDS port dithering only exists
  179.                  * for 18bpp panels. */
  180.                 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  181.                         temp |= LVDS_ENABLE_DITHER;
  182.                 else
  183.                         temp &= ~LVDS_ENABLE_DITHER;
  184.         }
  185.         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  186.         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  187.                 temp |= LVDS_HSYNC_POLARITY;
  188.         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  189.                 temp |= LVDS_VSYNC_POLARITY;
  190.  
  191.         I915_WRITE(lvds_encoder->reg, temp);
  192. }
  193.  
  194. /**
  195.  * Sets the power state for the panel.
  196.  */
  197. static void intel_enable_lvds(struct intel_encoder *encoder)
  198. {
  199.         struct drm_device *dev = encoder->base.dev;
  200.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  201.         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  202.         struct drm_i915_private *dev_priv = dev->dev_private;
  203.         u32 ctl_reg, stat_reg;
  204.  
  205.         if (HAS_PCH_SPLIT(dev)) {
  206.                 ctl_reg = PCH_PP_CONTROL;
  207.                 stat_reg = PCH_PP_STATUS;
  208.         } else {
  209.                 ctl_reg = PP_CONTROL;
  210.                 stat_reg = PP_STATUS;
  211.         }
  212.  
  213.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  214.  
  215.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  216.         POSTING_READ(lvds_encoder->reg);
  217.         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  218.                 DRM_ERROR("timed out waiting for panel to power on\n");
  219.  
  220.         intel_panel_enable_backlight(dev, intel_crtc->pipe);
  221. }
  222.  
  223. static void intel_disable_lvds(struct intel_encoder *encoder)
  224. {
  225.         struct drm_device *dev = encoder->base.dev;
  226.         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  227.         struct drm_i915_private *dev_priv = dev->dev_private;
  228.         u32 ctl_reg, stat_reg;
  229.  
  230.         if (HAS_PCH_SPLIT(dev)) {
  231.                 ctl_reg = PCH_PP_CONTROL;
  232.                 stat_reg = PCH_PP_STATUS;
  233.         } else {
  234.                 ctl_reg = PP_CONTROL;
  235.                 stat_reg = PP_STATUS;
  236.         }
  237.  
  238.         intel_panel_disable_backlight(dev);
  239.  
  240.         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  241.         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  242.                 DRM_ERROR("timed out waiting for panel to power off\n");
  243.  
  244.         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  245.         POSTING_READ(lvds_encoder->reg);
  246. }
  247.  
  248. static int intel_lvds_mode_valid(struct drm_connector *connector,
  249.                                  struct drm_display_mode *mode)
  250. {
  251.         struct intel_connector *intel_connector = to_intel_connector(connector);
  252.         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  253.  
  254.         if (mode->hdisplay > fixed_mode->hdisplay)
  255.                 return MODE_PANEL;
  256.         if (mode->vdisplay > fixed_mode->vdisplay)
  257.                 return MODE_PANEL;
  258.  
  259.         return MODE_OK;
  260. }
  261.  
  262. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  263.                                       struct intel_crtc_config *pipe_config)
  264. {
  265.         struct drm_device *dev = intel_encoder->base.dev;
  266.         struct drm_i915_private *dev_priv = dev->dev_private;
  267.         struct intel_lvds_encoder *lvds_encoder =
  268.                 to_lvds_encoder(&intel_encoder->base);
  269.         struct intel_connector *intel_connector =
  270.                 &lvds_encoder->attached_connector->base;
  271.         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  272.         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  273.         unsigned int lvds_bpp;
  274.  
  275.         /* Should never happen!! */
  276.         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  277.                 DRM_ERROR("Can't support LVDS on pipe A\n");
  278.                 return false;
  279.         }
  280.  
  281.         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  282.             LVDS_A3_POWER_UP)
  283.                 lvds_bpp = 8*3;
  284.         else
  285.                 lvds_bpp = 6*3;
  286.  
  287.         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  288.                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  289.                               pipe_config->pipe_bpp, lvds_bpp);
  290.                 pipe_config->pipe_bpp = lvds_bpp;
  291.         }
  292.  
  293.         /*
  294.          * We have timings from the BIOS for the panel, put them in
  295.          * to the adjusted mode.  The CRTC will be set up for this mode,
  296.          * with the panel scaling set up to source from the H/VDisplay
  297.          * of the original mode.
  298.          */
  299.         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  300.                                adjusted_mode);
  301.  
  302.         if (HAS_PCH_SPLIT(dev)) {
  303.                 pipe_config->has_pch_encoder = true;
  304.  
  305.                 intel_pch_panel_fitting(intel_crtc, pipe_config,
  306.                                         intel_connector->panel.fitting_mode);
  307.         } else {
  308.                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
  309.                                          intel_connector->panel.fitting_mode);
  310.  
  311.         }
  312.  
  313.         /*
  314.          * XXX: It would be nice to support lower refresh rates on the
  315.          * panels to reduce power consumption, and perhaps match the
  316.          * user's requested refresh rate.
  317.          */
  318.  
  319.         return true;
  320. }
  321.  
  322. static void intel_lvds_mode_set(struct intel_encoder *encoder)
  323. {
  324.         /*
  325.          * We don't do anything here, the LVDS port is fully set up in the pre
  326.          * enable hook - the ordering constraints for enabling the lvds port vs.
  327.          * enabling the display pll are too strict.
  328.          */
  329. }
  330.  
  331. /**
  332.  * Detect the LVDS connection.
  333.  *
  334.  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
  335.  * connected and closed means disconnected.  We also send hotplug events as
  336.  * needed, using lid status notification from the input layer.
  337.  */
  338. static enum drm_connector_status
  339. intel_lvds_detect(struct drm_connector *connector, bool force)
  340. {
  341.         struct drm_device *dev = connector->dev;
  342.         enum drm_connector_status status;
  343.  
  344.         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  345.                       connector->base.id, drm_get_connector_name(connector));
  346.  
  347.         status = intel_panel_detect(dev);
  348.         if (status != connector_status_unknown)
  349.                 return status;
  350.  
  351.         return connector_status_connected;
  352. }
  353.  
  354. /**
  355.  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  356.  */
  357. static int intel_lvds_get_modes(struct drm_connector *connector)
  358. {
  359.         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  360.         struct drm_device *dev = connector->dev;
  361.         struct drm_display_mode *mode;
  362.  
  363.         /* use cached edid if we have one */
  364.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  365.                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
  366.  
  367.         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  368.         if (mode == NULL)
  369.                 return 0;
  370.  
  371.         drm_mode_probed_add(connector, mode);
  372.         return 1;
  373. }
  374.  
  375. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  376. {
  377.         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  378.         return 1;
  379. }
  380.  
  381. /* The GPU hangs up on these systems if modeset is performed on LID open */
  382. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  383.         {
  384.                 .callback = intel_no_modeset_on_lid_dmi_callback,
  385.                 .ident = "Toshiba Tecra A11",
  386.                 .matches = {
  387.                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  388.                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  389.                 },
  390.         },
  391.  
  392.         { }     /* terminating entry */
  393. };
  394.  
  395. #if 0
  396. /*
  397.  * Lid events. Note the use of 'modeset':
  398.  *  - we set it to MODESET_ON_LID_OPEN on lid close,
  399.  *    and set it to MODESET_DONE on open
  400.  *  - we use it as a "only once" bit (ie we ignore
  401.  *    duplicate events where it was already properly set)
  402.  *  - the suspend/resume paths will set it to
  403.  *    MODESET_SUSPENDED and ignore the lid open event,
  404.  *    because they restore the mode ("lid open").
  405.  */
  406. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  407.                             void *unused)
  408. {
  409.         struct intel_lvds_connector *lvds_connector =
  410.                 container_of(nb, struct intel_lvds_connector, lid_notifier);
  411.         struct drm_connector *connector = &lvds_connector->base.base;
  412.         struct drm_device *dev = connector->dev;
  413.         struct drm_i915_private *dev_priv = dev->dev_private;
  414.  
  415.         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  416.                 return NOTIFY_OK;
  417.  
  418.         mutex_lock(&dev_priv->modeset_restore_lock);
  419.         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  420.                 goto exit;
  421.         /*
  422.          * check and update the status of LVDS connector after receiving
  423.          * the LID nofication event.
  424.          */
  425.         connector->status = connector->funcs->detect(connector, false);
  426.  
  427.         /* Don't force modeset on machines where it causes a GPU lockup */
  428.         if (dmi_check_system(intel_no_modeset_on_lid))
  429.                 goto exit;
  430.         if (!acpi_lid_open()) {
  431.                 /* do modeset on next lid open event */
  432.                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  433.                 goto exit;
  434.         }
  435.  
  436.         if (dev_priv->modeset_restore == MODESET_DONE)
  437.                 goto exit;
  438.  
  439.         drm_modeset_lock_all(dev);
  440.         intel_modeset_setup_hw_state(dev, true);
  441.         drm_modeset_unlock_all(dev);
  442.  
  443.         dev_priv->modeset_restore = MODESET_DONE;
  444.  
  445. exit:
  446.         mutex_unlock(&dev_priv->modeset_restore_lock);
  447.         return NOTIFY_OK;
  448. }
  449. #endif
  450.  
  451. /**
  452.  * intel_lvds_destroy - unregister and free LVDS structures
  453.  * @connector: connector to free
  454.  *
  455.  * Unregister the DDC bus for this connector then free the driver private
  456.  * structure.
  457.  */
  458. static void intel_lvds_destroy(struct drm_connector *connector)
  459. {
  460.         struct intel_lvds_connector *lvds_connector =
  461.                 to_lvds_connector(connector);
  462.  
  463.  
  464.         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  465.                 kfree(lvds_connector->base.edid);
  466.  
  467.         intel_panel_fini(&lvds_connector->base.panel);
  468.  
  469.         drm_sysfs_connector_remove(connector);
  470.         drm_connector_cleanup(connector);
  471.         kfree(connector);
  472. }
  473.  
  474. static int intel_lvds_set_property(struct drm_connector *connector,
  475.                                    struct drm_property *property,
  476.                                    uint64_t value)
  477. {
  478.         struct intel_connector *intel_connector = to_intel_connector(connector);
  479.         struct drm_device *dev = connector->dev;
  480.  
  481.         if (property == dev->mode_config.scaling_mode_property) {
  482.                 struct drm_crtc *crtc;
  483.  
  484.                 if (value == DRM_MODE_SCALE_NONE) {
  485.                         DRM_DEBUG_KMS("no scaling not supported\n");
  486.                         return -EINVAL;
  487.                 }
  488.  
  489.                 if (intel_connector->panel.fitting_mode == value) {
  490.                         /* the LVDS scaling property is not changed */
  491.                         return 0;
  492.                 }
  493.                 intel_connector->panel.fitting_mode = value;
  494.  
  495.                 crtc = intel_attached_encoder(connector)->base.crtc;
  496.                 if (crtc && crtc->enabled) {
  497.                         /*
  498.                          * If the CRTC is enabled, the display will be changed
  499.                          * according to the new panel fitting mode.
  500.                          */
  501.                         intel_crtc_restore_mode(crtc);
  502.                 }
  503.         }
  504.  
  505.         return 0;
  506. }
  507.  
  508. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  509.         .get_modes = intel_lvds_get_modes,
  510.         .mode_valid = intel_lvds_mode_valid,
  511.         .best_encoder = intel_best_encoder,
  512. };
  513.  
  514. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  515.         .dpms = intel_connector_dpms,
  516.         .detect = intel_lvds_detect,
  517.         .fill_modes = drm_helper_probe_single_connector_modes,
  518.         .set_property = intel_lvds_set_property,
  519.         .destroy = intel_lvds_destroy,
  520. };
  521.  
  522. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  523.         .destroy = intel_encoder_destroy,
  524. };
  525.  
  526. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  527. {
  528.         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  529.         return 1;
  530. }
  531.  
  532. /* These systems claim to have LVDS, but really don't */
  533. static const struct dmi_system_id intel_no_lvds[] = {
  534.         {
  535.                 .callback = intel_no_lvds_dmi_callback,
  536.                 .ident = "Apple Mac Mini (Core series)",
  537.                 .matches = {
  538.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  539.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  540.                 },
  541.         },
  542.         {
  543.                 .callback = intel_no_lvds_dmi_callback,
  544.                 .ident = "Apple Mac Mini (Core 2 series)",
  545.                 .matches = {
  546.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  547.                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  548.                 },
  549.         },
  550.         {
  551.                 .callback = intel_no_lvds_dmi_callback,
  552.                 .ident = "MSI IM-945GSE-A",
  553.                 .matches = {
  554.                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  555.                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  556.                 },
  557.         },
  558.         {
  559.                 .callback = intel_no_lvds_dmi_callback,
  560.                 .ident = "Dell Studio Hybrid",
  561.                 .matches = {
  562.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  563.                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  564.                 },
  565.         },
  566.         {
  567.                 .callback = intel_no_lvds_dmi_callback,
  568.                 .ident = "Dell OptiPlex FX170",
  569.                 .matches = {
  570.                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  571.                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  572.                 },
  573.         },
  574.         {
  575.                 .callback = intel_no_lvds_dmi_callback,
  576.                 .ident = "AOpen Mini PC",
  577.                 .matches = {
  578.                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  579.                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  580.                 },
  581.         },
  582.         {
  583.                 .callback = intel_no_lvds_dmi_callback,
  584.                 .ident = "AOpen Mini PC MP915",
  585.                 .matches = {
  586.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  587.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  588.                 },
  589.         },
  590.         {
  591.                 .callback = intel_no_lvds_dmi_callback,
  592.                 .ident = "AOpen i915GMm-HFS",
  593.                 .matches = {
  594.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  595.                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  596.                 },
  597.         },
  598.         {
  599.                 .callback = intel_no_lvds_dmi_callback,
  600.                 .ident = "AOpen i45GMx-I",
  601.                 .matches = {
  602.                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  603.                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  604.                 },
  605.         },
  606.         {
  607.                 .callback = intel_no_lvds_dmi_callback,
  608.                 .ident = "Aopen i945GTt-VFA",
  609.                 .matches = {
  610.                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  611.                 },
  612.         },
  613.         {
  614.                 .callback = intel_no_lvds_dmi_callback,
  615.                 .ident = "Clientron U800",
  616.                 .matches = {
  617.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  618.                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  619.                 },
  620.         },
  621.         {
  622.                 .callback = intel_no_lvds_dmi_callback,
  623.                 .ident = "Clientron E830",
  624.                 .matches = {
  625.                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  626.                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  627.                 },
  628.         },
  629.         {
  630.                 .callback = intel_no_lvds_dmi_callback,
  631.                 .ident = "Asus EeeBox PC EB1007",
  632.                 .matches = {
  633.                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  634.                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  635.                 },
  636.         },
  637.         {
  638.                 .callback = intel_no_lvds_dmi_callback,
  639.                 .ident = "Asus AT5NM10T-I",
  640.                 .matches = {
  641.                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  642.                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  643.                 },
  644.         },
  645.         {
  646.                 .callback = intel_no_lvds_dmi_callback,
  647.                 .ident = "Hewlett-Packard HP t5740",
  648.                 .matches = {
  649.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  650.                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  651.                 },
  652.         },
  653.         {
  654.                 .callback = intel_no_lvds_dmi_callback,
  655.                 .ident = "Hewlett-Packard t5745",
  656.                 .matches = {
  657.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  658.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  659.                 },
  660.         },
  661.         {
  662.                 .callback = intel_no_lvds_dmi_callback,
  663.                 .ident = "Hewlett-Packard st5747",
  664.                 .matches = {
  665.                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  666.                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  667.                 },
  668.         },
  669.         {
  670.                 .callback = intel_no_lvds_dmi_callback,
  671.                 .ident = "MSI Wind Box DC500",
  672.                 .matches = {
  673.                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  674.                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  675.                 },
  676.         },
  677.         {
  678.                 .callback = intel_no_lvds_dmi_callback,
  679.                 .ident = "Gigabyte GA-D525TUD",
  680.                 .matches = {
  681.                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  682.                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  683.                 },
  684.         },
  685.         {
  686.                 .callback = intel_no_lvds_dmi_callback,
  687.                 .ident = "Supermicro X7SPA-H",
  688.                 .matches = {
  689.                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  690.                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  691.                 },
  692.         },
  693.         {
  694.                 .callback = intel_no_lvds_dmi_callback,
  695.                 .ident = "Fujitsu Esprimo Q900",
  696.                 .matches = {
  697.                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  698.                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  699.                 },
  700.         },
  701.         {
  702.                 .callback = intel_no_lvds_dmi_callback,
  703.                 .ident = "Intel D410PT",
  704.                 .matches = {
  705.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  706.                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
  707.                 },
  708.         },
  709.         {
  710.                 .callback = intel_no_lvds_dmi_callback,
  711.                 .ident = "Intel D425KT",
  712.                 .matches = {
  713.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  714.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
  715.                 },
  716.         },
  717.         {
  718.                 .callback = intel_no_lvds_dmi_callback,
  719.                 .ident = "Intel D510MO",
  720.                 .matches = {
  721.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  722.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  723.                 },
  724.         },
  725.         {
  726.                 .callback = intel_no_lvds_dmi_callback,
  727.                 .ident = "Intel D525MW",
  728.                 .matches = {
  729.                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  730.                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  731.                 },
  732.         },
  733.  
  734.         { }     /* terminating entry */
  735. };
  736.  
  737. /**
  738.  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  739.  * @dev: drm device
  740.  * @connector: LVDS connector
  741.  *
  742.  * Find the reduced downclock for LVDS in EDID.
  743.  */
  744. static void intel_find_lvds_downclock(struct drm_device *dev,
  745.                                       struct drm_display_mode *fixed_mode,
  746.                                       struct drm_connector *connector)
  747. {
  748.         struct drm_i915_private *dev_priv = dev->dev_private;
  749.         struct drm_display_mode *scan;
  750.         int temp_downclock;
  751.  
  752.         temp_downclock = fixed_mode->clock;
  753.         list_for_each_entry(scan, &connector->probed_modes, head) {
  754.                 /*
  755.                  * If one mode has the same resolution with the fixed_panel
  756.                  * mode while they have the different refresh rate, it means
  757.                  * that the reduced downclock is found for the LVDS. In such
  758.                  * case we can set the different FPx0/1 to dynamically select
  759.                  * between low and high frequency.
  760.                  */
  761.                 if (scan->hdisplay == fixed_mode->hdisplay &&
  762.                     scan->hsync_start == fixed_mode->hsync_start &&
  763.                     scan->hsync_end == fixed_mode->hsync_end &&
  764.                     scan->htotal == fixed_mode->htotal &&
  765.                     scan->vdisplay == fixed_mode->vdisplay &&
  766.                     scan->vsync_start == fixed_mode->vsync_start &&
  767.                     scan->vsync_end == fixed_mode->vsync_end &&
  768.                     scan->vtotal == fixed_mode->vtotal) {
  769.                         if (scan->clock < temp_downclock) {
  770.                                 /*
  771.                                  * The downclock is already found. But we
  772.                                  * expect to find the lower downclock.
  773.                                  */
  774.                                 temp_downclock = scan->clock;
  775.                         }
  776.                 }
  777.         }
  778.         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  779.                 /* We found the downclock for LVDS. */
  780.                 dev_priv->lvds_downclock_avail = 1;
  781.                 dev_priv->lvds_downclock = temp_downclock;
  782.                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  783.                               "Normal clock %dKhz, downclock %dKhz\n",
  784.                               fixed_mode->clock, temp_downclock);
  785.         }
  786. }
  787.  
  788. /*
  789.  * Enumerate the child dev array parsed from VBT to check whether
  790.  * the LVDS is present.
  791.  * If it is present, return 1.
  792.  * If it is not present, return false.
  793.  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  794.  */
  795. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  796.                                    u8 *i2c_pin)
  797. {
  798.         struct drm_i915_private *dev_priv = dev->dev_private;
  799.         int i;
  800.  
  801.         if (!dev_priv->vbt.child_dev_num)
  802.                 return true;
  803.  
  804.         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  805.                 struct child_device_config *child = dev_priv->vbt.child_dev + i;
  806.  
  807.                 /* If the device type is not LFP, continue.
  808.                  * We have to check both the new identifiers as well as the
  809.                  * old for compatibility with some BIOSes.
  810.                  */
  811.                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
  812.                     child->device_type != DEVICE_TYPE_LFP)
  813.                         continue;
  814.  
  815.                 if (intel_gmbus_is_port_valid(child->i2c_pin))
  816.                     *i2c_pin = child->i2c_pin;
  817.  
  818.                 /* However, we cannot trust the BIOS writers to populate
  819.                  * the VBT correctly.  Since LVDS requires additional
  820.                  * information from AIM blocks, a non-zero addin offset is
  821.                  * a good indicator that the LVDS is actually present.
  822.                  */
  823.                 if (child->addin_offset)
  824.                         return true;
  825.  
  826.                 /* But even then some BIOS writers perform some black magic
  827.                  * and instantiate the device without reference to any
  828.                  * additional data.  Trust that if the VBT was written into
  829.                  * the OpRegion then they have validated the LVDS's existence.
  830.                  */
  831.                 if (dev_priv->opregion.vbt)
  832.                         return true;
  833.         }
  834.  
  835.         return false;
  836. }
  837.  
  838. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  839. {
  840.         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  841.         return 1;
  842. }
  843.  
  844. static const struct dmi_system_id intel_dual_link_lvds[] = {
  845.         {
  846.                 .callback = intel_dual_link_lvds_callback,
  847.                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  848.                 .matches = {
  849.                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  850.                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  851.                 },
  852.         },
  853.         { }     /* terminating entry */
  854. };
  855.  
  856. bool intel_is_dual_link_lvds(struct drm_device *dev)
  857. {
  858.         struct intel_encoder *encoder;
  859.         struct intel_lvds_encoder *lvds_encoder;
  860.  
  861.         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  862.                             base.head) {
  863.                 if (encoder->type == INTEL_OUTPUT_LVDS) {
  864.                         lvds_encoder = to_lvds_encoder(&encoder->base);
  865.  
  866.                         return lvds_encoder->is_dual_link;
  867.                 }
  868.         }
  869.  
  870.         return false;
  871. }
  872.  
  873. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  874. {
  875.         struct drm_device *dev = lvds_encoder->base.base.dev;
  876.         unsigned int val;
  877.         struct drm_i915_private *dev_priv = dev->dev_private;
  878.  
  879.         /* use the module option value if specified */
  880.         if (i915_lvds_channel_mode > 0)
  881.                 return i915_lvds_channel_mode == 2;
  882.  
  883. //      if (dmi_check_system(intel_dual_link_lvds))
  884. //              return true;
  885.  
  886.         /* BIOS should set the proper LVDS register value at boot, but
  887.          * in reality, it doesn't set the value when the lid is closed;
  888.          * we need to check "the value to be set" in VBT when LVDS
  889.          * register is uninitialized.
  890.          */
  891.         val = I915_READ(lvds_encoder->reg);
  892.         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  893.                 val = dev_priv->vbt.bios_lvds_val;
  894.  
  895.         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  896. }
  897.  
  898. static bool intel_lvds_supported(struct drm_device *dev)
  899. {
  900.         /* With the introduction of the PCH we gained a dedicated
  901.          * LVDS presence pin, use it. */
  902.         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  903.                 return true;
  904.  
  905.         /* Otherwise LVDS was only attached to mobile products,
  906.          * except for the inglorious 830gm */
  907.         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  908.                 return true;
  909.  
  910.         return false;
  911. }
  912.  
  913. /**
  914.  * intel_lvds_init - setup LVDS connectors on this device
  915.  * @dev: drm device
  916.  *
  917.  * Create the connector, register the LVDS DDC bus, and try to figure out what
  918.  * modes we can display on the LVDS panel (if present).
  919.  */
  920. void intel_lvds_init(struct drm_device *dev)
  921. {
  922.         struct drm_i915_private *dev_priv = dev->dev_private;
  923.         struct intel_lvds_encoder *lvds_encoder;
  924.         struct intel_encoder *intel_encoder;
  925.         struct intel_lvds_connector *lvds_connector;
  926.         struct intel_connector *intel_connector;
  927.         struct drm_connector *connector;
  928.         struct drm_encoder *encoder;
  929.         struct drm_display_mode *scan; /* *modes, *bios_mode; */
  930.         struct drm_display_mode *fixed_mode = NULL;
  931.         struct edid *edid;
  932.         struct drm_crtc *crtc;
  933.         u32 lvds;
  934.         int pipe;
  935.         u8 pin;
  936.  
  937.         if (!intel_lvds_supported(dev))
  938.                 return;
  939.  
  940.         /* Skip init on machines we know falsely report LVDS */
  941. //   if (dmi_check_system(intel_no_lvds))
  942. //       return false;
  943.  
  944.         pin = GMBUS_PORT_PANEL;
  945.         if (!lvds_is_present_in_vbt(dev, &pin)) {
  946.                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  947.                 return;
  948.         }
  949.  
  950.         if (HAS_PCH_SPLIT(dev)) {
  951.                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  952.                         return;
  953.                 if (dev_priv->vbt.edp_support) {
  954.                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  955.                         return;
  956.                 }
  957.         }
  958.  
  959.         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  960.         if (!lvds_encoder)
  961.                 return;
  962.  
  963.         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  964.         if (!lvds_connector) {
  965.                 kfree(lvds_encoder);
  966.                 return;
  967.         }
  968.  
  969.         lvds_encoder->attached_connector = lvds_connector;
  970.  
  971.         intel_encoder = &lvds_encoder->base;
  972.         encoder = &intel_encoder->base;
  973.         intel_connector = &lvds_connector->base;
  974.         connector = &intel_connector->base;
  975.         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  976.                            DRM_MODE_CONNECTOR_LVDS);
  977.  
  978.         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  979.                          DRM_MODE_ENCODER_LVDS);
  980.  
  981.         intel_encoder->enable = intel_enable_lvds;
  982.         intel_encoder->pre_enable = intel_pre_enable_lvds;
  983.         intel_encoder->compute_config = intel_lvds_compute_config;
  984.         intel_encoder->mode_set = intel_lvds_mode_set;
  985.         intel_encoder->disable = intel_disable_lvds;
  986.         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  987.         intel_encoder->get_config = intel_lvds_get_config;
  988.         intel_connector->get_hw_state = intel_connector_get_hw_state;
  989.  
  990.         intel_connector_attach_encoder(intel_connector, intel_encoder);
  991.         intel_encoder->type = INTEL_OUTPUT_LVDS;
  992.  
  993.         intel_encoder->cloneable = false;
  994.         if (HAS_PCH_SPLIT(dev))
  995.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  996.         else if (IS_GEN4(dev))
  997.                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  998.         else
  999.         intel_encoder->crtc_mask = (1 << 1);
  1000.  
  1001.         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  1002.         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  1003.         connector->interlace_allowed = false;
  1004.         connector->doublescan_allowed = false;
  1005.  
  1006.         if (HAS_PCH_SPLIT(dev)) {
  1007.                 lvds_encoder->reg = PCH_LVDS;
  1008.         } else {
  1009.                 lvds_encoder->reg = LVDS;
  1010.         }
  1011.  
  1012.         /* create the scaling mode property */
  1013.         drm_mode_create_scaling_mode_property(dev);
  1014.         drm_object_attach_property(&connector->base,
  1015.                                       dev->mode_config.scaling_mode_property,
  1016.                                       DRM_MODE_SCALE_ASPECT);
  1017.         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  1018.         /*
  1019.          * LVDS discovery:
  1020.          * 1) check for EDID on DDC
  1021.          * 2) check for VBT data
  1022.          * 3) check to see if LVDS is already on
  1023.          *    if none of the above, no panel
  1024.          * 4) make sure lid is open
  1025.          *    if closed, act like it's not there for now
  1026.          */
  1027.  
  1028.         /*
  1029.          * Attempt to get the fixed panel mode from DDC.  Assume that the
  1030.          * preferred mode is the right one.
  1031.          */
  1032.         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  1033.         if (edid) {
  1034.                 if (drm_add_edid_modes(connector, edid)) {
  1035.                         drm_mode_connector_update_edid_property(connector,
  1036.                                                                 edid);
  1037.                 } else {
  1038.                         kfree(edid);
  1039.                         edid = ERR_PTR(-EINVAL);
  1040.                 }
  1041.         } else {
  1042.                 edid = ERR_PTR(-ENOENT);
  1043.         }
  1044.         lvds_connector->base.edid = edid;
  1045.  
  1046.         if (IS_ERR_OR_NULL(edid)) {
  1047.                 /* Didn't get an EDID, so
  1048.                  * Set wide sync ranges so we get all modes
  1049.                  * handed to valid_mode for checking
  1050.                  */
  1051.                 connector->display_info.min_vfreq = 0;
  1052.                 connector->display_info.max_vfreq = 200;
  1053.                 connector->display_info.min_hfreq = 0;
  1054.                 connector->display_info.max_hfreq = 200;
  1055.         }
  1056.  
  1057.         list_for_each_entry(scan, &connector->probed_modes, head) {
  1058.                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1059.                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1060.                         drm_mode_debug_printmodeline(scan);
  1061.  
  1062.                         fixed_mode = drm_mode_duplicate(dev, scan);
  1063.                         if (fixed_mode) {
  1064.                                 intel_find_lvds_downclock(dev, fixed_mode,
  1065.                                                   connector);
  1066.                         goto out;
  1067.                 }
  1068.         }
  1069.         }
  1070.  
  1071.         /* Failed to get EDID, what about VBT? */
  1072.         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  1073.                 DRM_DEBUG_KMS("using mode from VBT: ");
  1074.                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  1075.  
  1076.                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  1077.                 if (fixed_mode) {
  1078.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1079.                         goto out;
  1080.                 }
  1081.         }
  1082.  
  1083.         /*
  1084.          * If we didn't get EDID, try checking if the panel is already turned
  1085.          * on.  If so, assume that whatever is currently programmed is the
  1086.          * correct mode.
  1087.          */
  1088.  
  1089.         /* Ironlake: FIXME if still fail, not try pipe mode now */
  1090.         if (HAS_PCH_SPLIT(dev))
  1091.                 goto failed;
  1092.  
  1093.         lvds = I915_READ(LVDS);
  1094.         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1095.         crtc = intel_get_crtc_for_pipe(dev, pipe);
  1096.  
  1097.         if (crtc && (lvds & LVDS_PORT_EN)) {
  1098.                 fixed_mode = intel_crtc_mode_get(dev, crtc);
  1099.                 if (fixed_mode) {
  1100.                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1101.                         drm_mode_debug_printmodeline(fixed_mode);
  1102.                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1103.                         goto out;
  1104.                 }
  1105.         }
  1106.  
  1107.         /* If we still don't have a mode after all that, give up. */
  1108.         if (!fixed_mode)
  1109.                 goto failed;
  1110.  
  1111. out:
  1112.         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1113.         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1114.                       lvds_encoder->is_dual_link ? "dual" : "single");
  1115.  
  1116.                 /*
  1117.                  * Unlock registers and just
  1118.                  * leave them unlocked
  1119.                  */
  1120.         if (HAS_PCH_SPLIT(dev)) {
  1121.                 I915_WRITE(PCH_PP_CONTROL,
  1122.                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1123.         } else {
  1124.                 I915_WRITE(PP_CONTROL,
  1125.                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1126.         }
  1127. //   dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  1128. //   if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  1129. //       DRM_DEBUG_KMS("lid notifier registration failed\n");
  1130.  //      dev_priv->lid_notifier.notifier_call = NULL;
  1131. //   }
  1132.         drm_sysfs_connector_add(connector);
  1133.  
  1134.         intel_panel_init(&intel_connector->panel, fixed_mode);
  1135.         intel_panel_setup_backlight(connector);
  1136.  
  1137.         return;
  1138.  
  1139. failed:
  1140.         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1141.         drm_connector_cleanup(connector);
  1142.         drm_encoder_cleanup(encoder);
  1143.         if (fixed_mode)
  1144.                 drm_mode_destroy(dev, fixed_mode);
  1145.         kfree(lvds_encoder);
  1146.         kfree(lvds_connector);
  1147.         return;
  1148. }
  1149.