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  1. /*
  2.  * Copyright © 2013 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8.  * and/or sell copies of the Software, and to permit persons to whom the
  9.  * Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21.  * DEALINGS IN THE SOFTWARE.
  22.  *
  23.  * Author: Jani Nikula <jani.nikula@intel.com>
  24.  */
  25.  
  26. #ifndef _INTEL_DSI_DSI_H
  27. #define _INTEL_DSI_DSI_H
  28.  
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include <linux/mipi_display.h>
  32. #include "i915_drv.h"
  33. #include "intel_drv.h"
  34. #include "intel_dsi.h"
  35.  
  36. void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable);
  37.  
  38. int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
  39.                      const u8 *data, int len);
  40.  
  41. int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
  42.                          const u8 *data, int len);
  43.  
  44. int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
  45.                     u8 *buf, int buflen);
  46.  
  47. int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
  48.                         u8 *reqdata, int reqlen, u8 *buf, int buflen);
  49.  
  50. int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd);
  51.  
  52. /* XXX: questionable write helpers */
  53. static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi,
  54.                                      int channel, u8 dcs_cmd)
  55. {
  56.         return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1);
  57. }
  58.  
  59. static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi,
  60.                                      int channel, u8 dcs_cmd, u8 param)
  61. {
  62.         u8 buf[2] = { dcs_cmd, param };
  63.         return dsi_vc_dcs_write(intel_dsi, channel, buf, 2);
  64. }
  65.  
  66. static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi,
  67.                                          int channel)
  68. {
  69.         return dsi_vc_generic_write(intel_dsi, channel, NULL, 0);
  70. }
  71.  
  72. static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi,
  73.                                          int channel, u8 param)
  74. {
  75.         return dsi_vc_generic_write(intel_dsi, channel, &param, 1);
  76. }
  77.  
  78. static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
  79.                                          int channel, u8 param1, u8 param2)
  80. {
  81.         u8 buf[2] = { param1, param2 };
  82.         return dsi_vc_generic_write(intel_dsi, channel, buf, 2);
  83. }
  84.  
  85. /* XXX: questionable read helpers */
  86. static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
  87.                                         int channel, u8 *buf, int buflen)
  88. {
  89.         return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen);
  90. }
  91.  
  92. static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
  93.                                         int channel, u8 param, u8 *buf,
  94.                                         int buflen)
  95. {
  96.         return dsi_vc_generic_read(intel_dsi, channel, &param, 1, buf, buflen);
  97. }
  98.  
  99. static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
  100.                                         int channel, u8 param1, u8 param2,
  101.                                         u8 *buf, int buflen)
  102. {
  103.         u8 req[2] = { param1, param2 };
  104.  
  105.         return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen);
  106. }
  107.  
  108.  
  109. #endif /* _INTEL_DSI_DSI_H */
  110.