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  1. /*
  2.  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  3.  * Copyright (c) 2007-2008 Intel Corporation
  4.  *   Jesse Barnes <jesse.barnes@intel.com>
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the "Software"),
  8.  * to deal in the Software without restriction, including without limitation
  9.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10.  * and/or sell copies of the Software, and to permit persons to whom the
  11.  * Software is furnished to do so, subject to the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the next
  14.  * paragraph) shall be included in all copies or substantial portions of the
  15.  * Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23.  * IN THE SOFTWARE.
  24.  */
  25. #ifndef __INTEL_DRV_H__
  26. #define __INTEL_DRV_H__
  27.  
  28. #include <linux/i2c.h>
  29. #include <drm/i915_drm.h>
  30. #include "i915_drv.h"
  31. #include <drm/drm_crtc.h>
  32. #include <drm/drm_crtc_helper.h>
  33. #include <drm/drm_fb_helper.h>
  34. #include <drm/drm_dp_helper.h>
  35.  
  36. #define cpu_relax()     asm volatile("rep; nop")
  37.  
  38. #define _wait_for(COND, MS, W) ({ \
  39.     unsigned long timeout__ = GetTimerTicks() + msecs_to_jiffies(MS);  \
  40.         int ret__ = 0;                                                  \
  41.         while (!(COND)) {                                               \
  42.         if (time_after(GetTimerTicks(), timeout__)) {          \
  43.                         ret__ = -ETIMEDOUT;                             \
  44.                         break;                                          \
  45.                 }                                                       \
  46.                 if (W )  {                              \
  47.          msleep(W); \
  48.                 } else {                                                \
  49.                         cpu_relax();                                    \
  50.                 }                                                       \
  51.         }                                                               \
  52.         ret__;                                                          \
  53. })
  54.  
  55. #define wait_for_atomic_us(COND, US) ({ \
  56.         unsigned long timeout__ = GetTimerTicks() + usecs_to_jiffies(US);       \
  57.         int ret__ = 0;                                                  \
  58.         while (!(COND)) {                                               \
  59.                 if (time_after(GetTimerTicks(), timeout__)) {                   \
  60.                         ret__ = -ETIMEDOUT;                             \
  61.                         break;                                          \
  62.                 }                                                       \
  63.                 cpu_relax();                                            \
  64.         }                                                               \
  65.         ret__;                                                          \
  66. })
  67.  
  68. #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  69. #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  70.  
  71. #define MSLEEP(x) do { \
  72.         if (in_dbg_master()) \
  73.                 mdelay(x); \
  74.         else \
  75.                 msleep(x); \
  76. } while(0)
  77.  
  78. #define KHz(x) (1000*x)
  79. #define MHz(x) KHz(1000*x)
  80.  
  81. /*
  82.  * Display related stuff
  83.  */
  84.  
  85. /* store information about an Ixxx DVO */
  86. /* The i830->i865 use multiple DVOs with multiple i2cs */
  87. /* the i915, i945 have a single sDVO i2c bus - which is different */
  88. #define MAX_OUTPUTS 6
  89. /* maximum connectors per crtcs in the mode set */
  90. #define INTELFB_CONN_LIMIT 4
  91.  
  92. #define INTEL_I2C_BUS_DVO 1
  93. #define INTEL_I2C_BUS_SDVO 2
  94.  
  95. /* these are outputs from the chip - integrated only
  96.    external chips are via DVO or SDVO output */
  97. #define INTEL_OUTPUT_UNUSED 0
  98. #define INTEL_OUTPUT_ANALOG 1
  99. #define INTEL_OUTPUT_DVO 2
  100. #define INTEL_OUTPUT_SDVO 3
  101. #define INTEL_OUTPUT_LVDS 4
  102. #define INTEL_OUTPUT_TVOUT 5
  103. #define INTEL_OUTPUT_HDMI 6
  104. #define INTEL_OUTPUT_DISPLAYPORT 7
  105. #define INTEL_OUTPUT_EDP 8
  106.  
  107. /* Intel Pipe Clone Bit */
  108. #define INTEL_HDMIB_CLONE_BIT 1
  109. #define INTEL_HDMIC_CLONE_BIT 2
  110. #define INTEL_HDMID_CLONE_BIT 3
  111. #define INTEL_HDMIE_CLONE_BIT 4
  112. #define INTEL_HDMIF_CLONE_BIT 5
  113. #define INTEL_SDVO_NON_TV_CLONE_BIT 6
  114. #define INTEL_SDVO_TV_CLONE_BIT 7
  115. #define INTEL_SDVO_LVDS_CLONE_BIT 8
  116. #define INTEL_ANALOG_CLONE_BIT 9
  117. #define INTEL_TV_CLONE_BIT 10
  118. #define INTEL_DP_B_CLONE_BIT 11
  119. #define INTEL_DP_C_CLONE_BIT 12
  120. #define INTEL_DP_D_CLONE_BIT 13
  121. #define INTEL_LVDS_CLONE_BIT 14
  122. #define INTEL_DVO_TMDS_CLONE_BIT 15
  123. #define INTEL_DVO_LVDS_CLONE_BIT 16
  124. #define INTEL_EDP_CLONE_BIT 17
  125.  
  126. #define INTEL_DVO_CHIP_NONE 0
  127. #define INTEL_DVO_CHIP_LVDS 1
  128. #define INTEL_DVO_CHIP_TMDS 2
  129. #define INTEL_DVO_CHIP_TVOUT 4
  130.  
  131. /* drm_display_mode->private_flags */
  132. #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
  133. #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
  134. #define INTEL_MODE_DP_FORCE_6BPC (0x10)
  135. /* This flag must be set by the encoder's mode_fixup if it changes the crtc
  136.  * timings in the mode to prevent the crtc fixup from overwriting them.
  137.  * Currently only lvds needs that. */
  138. #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
  139.  
  140. static inline void
  141. intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
  142.                                 int multiplier)
  143. {
  144.         mode->clock *= multiplier;
  145.         mode->private_flags |= multiplier;
  146. }
  147.  
  148. static inline int
  149. intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
  150. {
  151.         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
  152. }
  153.  
  154. struct intel_framebuffer {
  155.         struct drm_framebuffer base;
  156.         struct drm_i915_gem_object *obj;
  157. };
  158.  
  159. struct intel_fbdev {
  160.         struct drm_fb_helper helper;
  161.         struct intel_framebuffer ifb;
  162.         struct list_head fbdev_list;
  163.         struct drm_display_mode *our_mode;
  164. };
  165.  
  166. struct intel_encoder {
  167.         struct drm_encoder base;
  168.         /*
  169.          * The new crtc this encoder will be driven from. Only differs from
  170.          * base->crtc while a modeset is in progress.
  171.          */
  172.         struct intel_crtc *new_crtc;
  173.  
  174.         int type;
  175.         bool needs_tv_clock;
  176.         /*
  177.          * Intel hw has only one MUX where encoders could be clone, hence a
  178.          * simple flag is enough to compute the possible_clones mask.
  179.          */
  180.         bool cloneable;
  181.         bool connectors_active;
  182.         void (*hot_plug)(struct intel_encoder *);
  183.         void (*pre_enable)(struct intel_encoder *);
  184.         void (*enable)(struct intel_encoder *);
  185.         void (*disable)(struct intel_encoder *);
  186.         void (*post_disable)(struct intel_encoder *);
  187.         /* Read out the current hw state of this connector, returning true if
  188.          * the encoder is active. If the encoder is enabled it also set the pipe
  189.          * it is connected to in the pipe parameter. */
  190.         bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
  191.         int crtc_mask;
  192. };
  193.  
  194. struct intel_connector {
  195.         struct drm_connector base;
  196.         /*
  197.          * The fixed encoder this connector is connected to.
  198.          */
  199.         struct intel_encoder *encoder;
  200.  
  201.         /*
  202.          * The new encoder this connector will be driven. Only differs from
  203.          * encoder while a modeset is in progress.
  204.          */
  205.         struct intel_encoder *new_encoder;
  206.  
  207.         /* Reads out the current hw, returning true if the connector is enabled
  208.          * and active (i.e. dpms ON state). */
  209.         bool (*get_hw_state)(struct intel_connector *);
  210. };
  211.  
  212. struct intel_crtc {
  213.         struct drm_crtc base;
  214.         enum pipe pipe;
  215.         enum plane plane;
  216.         u8 lut_r[256], lut_g[256], lut_b[256];
  217.         /*
  218.          * Whether the crtc and the connected output pipeline is active. Implies
  219.          * that crtc->enabled is set, i.e. the current mode configuration has
  220.          * some outputs connected to this crtc.
  221.          */
  222.         bool active;
  223.         bool primary_disabled; /* is the crtc obscured by a plane? */
  224.         bool lowfreq_avail;
  225.         struct intel_overlay *overlay;
  226.         struct intel_unpin_work *unpin_work;
  227.         int fdi_lanes;
  228.  
  229.         /* Display surface base address adjustement for pageflips. Note that on
  230.          * gen4+ this only adjusts up to a tile, offsets within a tile are
  231.          * handled in the hw itself (with the TILEOFF register). */
  232.         unsigned long dspaddr_offset;
  233.  
  234.         struct drm_i915_gem_object *cursor_bo;
  235.         uint32_t cursor_addr;
  236.         int16_t cursor_x, cursor_y;
  237.         int16_t cursor_width, cursor_height;
  238.         bool cursor_visible;
  239.         unsigned int bpp;
  240.  
  241.         /* We can share PLLs across outputs if the timings match */
  242.         struct intel_pch_pll *pch_pll;
  243. };
  244.  
  245. struct intel_plane {
  246.         struct drm_plane base;
  247.         enum pipe pipe;
  248.         struct drm_i915_gem_object *obj;
  249.         int max_downscale;
  250.         u32 lut_r[1024], lut_g[1024], lut_b[1024];
  251.         void (*update_plane)(struct drm_plane *plane,
  252.                              struct drm_framebuffer *fb,
  253.                              struct drm_i915_gem_object *obj,
  254.                              int crtc_x, int crtc_y,
  255.                              unsigned int crtc_w, unsigned int crtc_h,
  256.                              uint32_t x, uint32_t y,
  257.                              uint32_t src_w, uint32_t src_h);
  258.         void (*disable_plane)(struct drm_plane *plane);
  259.         int (*update_colorkey)(struct drm_plane *plane,
  260.                                struct drm_intel_sprite_colorkey *key);
  261.         void (*get_colorkey)(struct drm_plane *plane,
  262.                              struct drm_intel_sprite_colorkey *key);
  263. };
  264.  
  265. struct intel_watermark_params {
  266.         unsigned long fifo_size;
  267.         unsigned long max_wm;
  268.         unsigned long default_wm;
  269.         unsigned long guard_size;
  270.         unsigned long cacheline_size;
  271. };
  272.  
  273. struct cxsr_latency {
  274.         int is_desktop;
  275.         int is_ddr3;
  276.         unsigned long fsb_freq;
  277.         unsigned long mem_freq;
  278.         unsigned long display_sr;
  279.         unsigned long display_hpll_disable;
  280.         unsigned long cursor_sr;
  281.         unsigned long cursor_hpll_disable;
  282. };
  283.  
  284. #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
  285. #define to_intel_connector(x) container_of(x, struct intel_connector, base)
  286. #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
  287. #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
  288. #define to_intel_plane(x) container_of(x, struct intel_plane, base)
  289.  
  290. #define DIP_HEADER_SIZE 5
  291.  
  292. #define DIP_TYPE_AVI    0x82
  293. #define DIP_VERSION_AVI 0x2
  294. #define DIP_LEN_AVI     13
  295. #define DIP_AVI_PR_1    0
  296. #define DIP_AVI_PR_2    1
  297.  
  298. #define DIP_TYPE_SPD    0x83
  299. #define DIP_VERSION_SPD 0x1
  300. #define DIP_LEN_SPD     25
  301. #define DIP_SPD_UNKNOWN 0
  302. #define DIP_SPD_DSTB    0x1
  303. #define DIP_SPD_DVDP    0x2
  304. #define DIP_SPD_DVHS    0x3
  305. #define DIP_SPD_HDDVR   0x4
  306. #define DIP_SPD_DVC     0x5
  307. #define DIP_SPD_DSC     0x6
  308. #define DIP_SPD_VCD     0x7
  309. #define DIP_SPD_GAME    0x8
  310. #define DIP_SPD_PC      0x9
  311. #define DIP_SPD_BD      0xa
  312. #define DIP_SPD_SCD     0xb
  313.  
  314. struct dip_infoframe {
  315.         uint8_t type;           /* HB0 */
  316.         uint8_t ver;            /* HB1 */
  317.         uint8_t len;            /* HB2 - body len, not including checksum */
  318.         uint8_t ecc;            /* Header ECC */
  319.         uint8_t checksum;       /* PB0 */
  320.         union {
  321.                 struct {
  322.                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
  323.                         uint8_t Y_A_B_S;
  324.                         /* PB2 - C 7:6, M 5:4, R 3:0 */
  325.                         uint8_t C_M_R;
  326.                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
  327.                         uint8_t ITC_EC_Q_SC;
  328.                         /* PB4 - VIC 6:0 */
  329.                         uint8_t VIC;
  330.                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
  331.                         uint8_t YQ_CN_PR;
  332.                         /* PB6 to PB13 */
  333.                         uint16_t top_bar_end;
  334.                         uint16_t bottom_bar_start;
  335.                         uint16_t left_bar_end;
  336.                         uint16_t right_bar_start;
  337.                 } __attribute__ ((packed)) avi;
  338.                 struct {
  339.                         uint8_t vn[8];
  340.                         uint8_t pd[16];
  341.                         uint8_t sdi;
  342.                 } __attribute__ ((packed)) spd;
  343.                 uint8_t payload[27];
  344.         } __attribute__ ((packed)) body;
  345. } __attribute__((packed));
  346.  
  347. struct intel_hdmi {
  348.         struct intel_encoder base;
  349.         u32 sdvox_reg;
  350.         int ddc_bus;
  351.         int ddi_port;
  352.         uint32_t color_range;
  353.         bool has_hdmi_sink;
  354.         bool has_audio;
  355.         enum hdmi_force_audio force_audio;
  356.         void (*write_infoframe)(struct drm_encoder *encoder,
  357.                                 struct dip_infoframe *frame);
  358.         void (*set_infoframes)(struct drm_encoder *encoder,
  359.                                struct drm_display_mode *adjusted_mode);
  360. };
  361.  
  362. #define DP_RECEIVER_CAP_SIZE            0xf
  363. #define DP_MAX_DOWNSTREAM_PORTS         0x10
  364. #define DP_LINK_CONFIGURATION_SIZE      9
  365.  
  366. struct intel_dp {
  367.         struct intel_encoder base;
  368.         uint32_t output_reg;
  369.         uint32_t DP;
  370.         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
  371.         bool has_audio;
  372.         enum hdmi_force_audio force_audio;
  373.         enum port port;
  374.         uint32_t color_range;
  375.         uint8_t link_bw;
  376.         uint8_t lane_count;
  377.         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
  378.         uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
  379.         struct i2c_adapter adapter;
  380.         struct i2c_algo_dp_aux_data algo;
  381.         bool is_pch_edp;
  382.         uint8_t train_set[4];
  383.         int panel_power_up_delay;
  384.         int panel_power_down_delay;
  385.         int panel_power_cycle_delay;
  386.         int backlight_on_delay;
  387.         int backlight_off_delay;
  388.         struct drm_display_mode *panel_fixed_mode;  /* for eDP */
  389.         struct delayed_work panel_vdd_work;
  390.         bool want_panel_vdd;
  391.         struct edid *edid; /* cached EDID for eDP */
  392.         int edid_mode_count;
  393. };
  394.  
  395. static inline struct drm_crtc *
  396. intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
  397. {
  398.         struct drm_i915_private *dev_priv = dev->dev_private;
  399.         return dev_priv->pipe_to_crtc_mapping[pipe];
  400. }
  401.  
  402. static inline struct drm_crtc *
  403. intel_get_crtc_for_plane(struct drm_device *dev, int plane)
  404. {
  405.         struct drm_i915_private *dev_priv = dev->dev_private;
  406.         return dev_priv->plane_to_crtc_mapping[plane];
  407. }
  408.  
  409. struct intel_unpin_work {
  410.         struct work_struct work;
  411.         struct drm_device *dev;
  412.         struct drm_i915_gem_object *old_fb_obj;
  413.         struct drm_i915_gem_object *pending_flip_obj;
  414.         struct drm_pending_vblank_event *event;
  415.         int pending;
  416.         bool enable_stall_check;
  417. };
  418.  
  419. struct intel_fbc_work {
  420.         struct delayed_work work;
  421.         struct drm_crtc *crtc;
  422.         struct drm_framebuffer *fb;
  423.         int interval;
  424. };
  425.  
  426. int intel_connector_update_modes(struct drm_connector *connector,
  427.                                 struct edid *edid);
  428. int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
  429.  
  430. extern void intel_attach_force_audio_property(struct drm_connector *connector);
  431. extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
  432.  
  433. extern void intel_crt_init(struct drm_device *dev);
  434. extern void intel_hdmi_init(struct drm_device *dev,
  435.                             int sdvox_reg, enum port port);
  436. extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
  437. extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
  438. extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
  439.                             bool is_sdvob);
  440. extern void intel_dvo_init(struct drm_device *dev);
  441. extern void intel_tv_init(struct drm_device *dev);
  442. extern void intel_mark_busy(struct drm_device *dev);
  443. extern void intel_mark_idle(struct drm_device *dev);
  444. extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
  445. extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj);
  446. extern bool intel_lvds_init(struct drm_device *dev);
  447. extern void intel_dp_init(struct drm_device *dev, int output_reg,
  448.                           enum port port);
  449. void
  450. intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
  451.                  struct drm_display_mode *adjusted_mode);
  452. extern bool intel_dpd_is_edp(struct drm_device *dev);
  453. extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
  454. extern int intel_edp_target_clock(struct intel_encoder *,
  455.                                   struct drm_display_mode *mode);
  456. extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
  457. extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
  458. extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
  459.                                       enum plane plane);
  460.  
  461. /* intel_panel.c */
  462. extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
  463.                                    struct drm_display_mode *adjusted_mode);
  464. extern void intel_pch_panel_fitting(struct drm_device *dev,
  465.                                     int fitting_mode,
  466.                                     const struct drm_display_mode *mode,
  467.                                     struct drm_display_mode *adjusted_mode);
  468. extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
  469. extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
  470. extern int intel_panel_setup_backlight(struct drm_device *dev);
  471. extern void intel_panel_enable_backlight(struct drm_device *dev,
  472.                                          enum pipe pipe);
  473. extern void intel_panel_disable_backlight(struct drm_device *dev);
  474. extern void intel_panel_destroy_backlight(struct drm_device *dev);
  475. extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
  476.  
  477. struct intel_set_config {
  478.         struct drm_encoder **save_connector_encoders;
  479.         struct drm_crtc **save_encoder_crtcs;
  480.  
  481.         bool fb_changed;
  482.         bool mode_changed;
  483. };
  484.  
  485. extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
  486.                            int x, int y, struct drm_framebuffer *old_fb);
  487. extern void intel_modeset_disable(struct drm_device *dev);
  488. extern void intel_crtc_load_lut(struct drm_crtc *crtc);
  489. extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
  490. extern void intel_encoder_noop(struct drm_encoder *encoder);
  491. extern void intel_encoder_destroy(struct drm_encoder *encoder);
  492. extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
  493. extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
  494. extern void intel_connector_dpms(struct drm_connector *, int mode);
  495. extern bool intel_connector_get_hw_state(struct intel_connector *connector);
  496. extern void intel_modeset_check_state(struct drm_device *dev);
  497.  
  498.  
  499. static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
  500. {
  501.         return to_intel_connector(connector)->encoder;
  502. }
  503.  
  504. extern void intel_connector_attach_encoder(struct intel_connector *connector,
  505.                                            struct intel_encoder *encoder);
  506. extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
  507.  
  508. extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
  509.                                                     struct drm_crtc *crtc);
  510. int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
  511.                                 struct drm_file *file_priv);
  512. extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
  513. extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
  514.  
  515. struct intel_load_detect_pipe {
  516.         struct drm_framebuffer *release_fb;
  517.         bool load_detect_temp;
  518.         int dpms_mode;
  519. };
  520. extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
  521.                                        struct drm_display_mode *mode,
  522.                                        struct intel_load_detect_pipe *old);
  523. extern void intel_release_load_detect_pipe(struct drm_connector *connector,
  524.                                            struct intel_load_detect_pipe *old);
  525.  
  526. extern void intelfb_restore(void);
  527. extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  528.                                     u16 blue, int regno);
  529. extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  530.                                     u16 *blue, int regno);
  531. extern void intel_enable_clock_gating(struct drm_device *dev);
  532.  
  533. extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
  534.                                       struct drm_i915_gem_object *obj,
  535.                                       struct intel_ring_buffer *pipelined);
  536. extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
  537.  
  538. extern int intel_framebuffer_init(struct drm_device *dev,
  539.                                   struct intel_framebuffer *ifb,
  540.                                   struct drm_mode_fb_cmd2 *mode_cmd,
  541.                                   struct drm_i915_gem_object *obj);
  542. extern int intel_fbdev_init(struct drm_device *dev);
  543. extern void intel_fbdev_fini(struct drm_device *dev);
  544. extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
  545. extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
  546. extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
  547. extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
  548.  
  549. extern void intel_setup_overlay(struct drm_device *dev);
  550. extern void intel_cleanup_overlay(struct drm_device *dev);
  551. extern int intel_overlay_switch_off(struct intel_overlay *overlay);
  552. extern int intel_overlay_put_image(struct drm_device *dev, void *data,
  553.                                    struct drm_file *file_priv);
  554. extern int intel_overlay_attrs(struct drm_device *dev, void *data,
  555.                                struct drm_file *file_priv);
  556.  
  557. extern void intel_fb_output_poll_changed(struct drm_device *dev);
  558. extern void intel_fb_restore_mode(struct drm_device *dev);
  559.  
  560. extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
  561.                         bool state);
  562. #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
  563. #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
  564.  
  565. extern void intel_init_clock_gating(struct drm_device *dev);
  566. extern void intel_write_eld(struct drm_encoder *encoder,
  567.                             struct drm_display_mode *mode);
  568. extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
  569. extern void intel_prepare_ddi(struct drm_device *dev);
  570. extern void hsw_fdi_link_train(struct drm_crtc *crtc);
  571. extern void intel_ddi_init(struct drm_device *dev, enum port port);
  572.  
  573. /* For use by IVB LP watermark workaround in intel_sprite.c */
  574. extern void intel_update_watermarks(struct drm_device *dev);
  575. extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
  576.                                            uint32_t sprite_width,
  577.                                            int pixel_size);
  578. extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
  579.                          struct drm_display_mode *mode);
  580.  
  581. extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
  582.                                      struct drm_file *file_priv);
  583. extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
  584.                                      struct drm_file *file_priv);
  585.  
  586. extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
  587.  
  588. /* Power-related functions, located in intel_pm.c */
  589. extern void intel_init_pm(struct drm_device *dev);
  590. /* FBC */
  591. extern bool intel_fbc_enabled(struct drm_device *dev);
  592. extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
  593. extern void intel_update_fbc(struct drm_device *dev);
  594. /* IPS */
  595. extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
  596. extern void intel_gpu_ips_teardown(void);
  597.  
  598. extern void intel_init_power_wells(struct drm_device *dev);
  599. extern void intel_enable_gt_powersave(struct drm_device *dev);
  600. extern void intel_disable_gt_powersave(struct drm_device *dev);
  601. extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
  602. extern void ironlake_teardown_rc6(struct drm_device *dev);
  603.  
  604. extern void intel_enable_ddi(struct intel_encoder *encoder);
  605. extern void intel_disable_ddi(struct intel_encoder *encoder);
  606. extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
  607.                                    enum pipe *pipe);
  608. extern void intel_ddi_mode_set(struct drm_encoder *encoder,
  609.                                 struct drm_display_mode *mode,
  610.                                 struct drm_display_mode *adjusted_mode);
  611.  
  612. #endif /* __INTEL_DRV_H__ */
  613.