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  1. /*
  2.  * Copyright © 2008 Intel Corporation
  3.  *             2014 Red Hat Inc.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the "Software"),
  7.  * to deal in the Software without restriction, including without limitation
  8.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9.  * and/or sell copies of the Software, and to permit persons to whom the
  10.  * Software is furnished to do so, subject to the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the next
  13.  * paragraph) shall be included in all copies or substantial portions of the
  14.  * Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22.  * IN THE SOFTWARE.
  23.  *
  24.  */
  25.  
  26. #include <drm/drmP.h>
  27. #include "i915_drv.h"
  28. #include "intel_drv.h"
  29. #include <drm/drm_atomic_helper.h>
  30. #include <drm/drm_crtc_helper.h>
  31. #include <drm/drm_edid.h>
  32.  
  33. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  34.                                         struct intel_crtc_state *pipe_config)
  35. {
  36.         struct drm_device *dev = encoder->base.dev;
  37.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  38.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  39.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  40.         struct drm_atomic_state *state;
  41.         int bpp, i;
  42.         int lane_count, slots;
  43.         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  44.         struct drm_connector *drm_connector;
  45.         struct intel_connector *connector, *found = NULL;
  46.         struct drm_connector_state *connector_state;
  47.         int mst_pbn;
  48.  
  49.         pipe_config->dp_encoder_is_mst = true;
  50.         pipe_config->has_pch_encoder = false;
  51.         pipe_config->has_dp_encoder = true;
  52.         bpp = 24;
  53.         /*
  54.          * for MST we always configure max link bw - the spec doesn't
  55.          * seem to suggest we should do otherwise.
  56.          */
  57.         lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  58.  
  59.  
  60.         pipe_config->lane_count = lane_count;
  61.  
  62.         pipe_config->pipe_bpp = 24;
  63.         pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  64.  
  65.         state = pipe_config->base.state;
  66.  
  67.         for_each_connector_in_state(state, drm_connector, connector_state, i) {
  68.                 connector = to_intel_connector(drm_connector);
  69.  
  70.                 if (connector_state->best_encoder == &encoder->base) {
  71.                         found = connector;
  72.                         break;
  73.                 }
  74.         }
  75.  
  76.         if (!found) {
  77.                 DRM_ERROR("can't find connector\n");
  78.                 return false;
  79.         }
  80.  
  81.         mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  82.  
  83.         pipe_config->pbn = mst_pbn;
  84.         slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  85.  
  86.         intel_link_compute_m_n(bpp, lane_count,
  87.                                adjusted_mode->crtc_clock,
  88.                                pipe_config->port_clock,
  89.                                &pipe_config->dp_m_n);
  90.  
  91.         pipe_config->dp_m_n.tu = slots;
  92.  
  93.         if (IS_HASWELL(dev) || IS_BROADWELL(dev))
  94.                 hsw_dp_set_ddi_pll_sel(pipe_config);
  95.  
  96.         return true;
  97.  
  98. }
  99.  
  100. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  101. {
  102.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  103.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  104.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  105.         int ret;
  106.  
  107.         DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  108.  
  109.         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  110.  
  111.         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  112.         if (ret) {
  113.                 DRM_ERROR("failed to update payload %d\n", ret);
  114.         }
  115. }
  116.  
  117. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  118. {
  119.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  120.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  121.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  122.  
  123.         DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  124.  
  125.         /* this can fail */
  126.         drm_dp_check_act_status(&intel_dp->mst_mgr);
  127.         /* and this can also fail */
  128.         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  129.  
  130.         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  131.  
  132.         intel_dp->active_mst_links--;
  133.         intel_mst->port = NULL;
  134.         if (intel_dp->active_mst_links == 0) {
  135.                 intel_dig_port->base.post_disable(&intel_dig_port->base);
  136.                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  137.         }
  138. }
  139.  
  140. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  141. {
  142.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  143.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  144.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  145.         struct drm_device *dev = encoder->base.dev;
  146.         struct drm_i915_private *dev_priv = dev->dev_private;
  147.         enum port port = intel_dig_port->port;
  148.         int ret;
  149.         uint32_t temp;
  150.         struct intel_connector *found = NULL, *connector;
  151.         int slots;
  152.         struct drm_crtc *crtc = encoder->base.crtc;
  153.         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  154.  
  155.         for_each_intel_connector(dev, connector) {
  156.                 if (connector->base.state->best_encoder == &encoder->base) {
  157.                         found = connector;
  158.                         break;
  159.                 }
  160.         }
  161.  
  162.         if (!found) {
  163.                 DRM_ERROR("can't find connector\n");
  164.                 return;
  165.         }
  166.  
  167.         /* MST encoders are bound to a crtc, not to a connector,
  168.          * force the mapping here for get_hw_state.
  169.          */
  170.         found->encoder = encoder;
  171.  
  172.         DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  173.         intel_mst->port = found->port;
  174.  
  175.         if (intel_dp->active_mst_links == 0) {
  176.                 enum port port = intel_ddi_get_encoder_port(encoder);
  177.  
  178.                 intel_dp_set_link_params(intel_dp, intel_crtc->config);
  179.  
  180.                 /* FIXME: add support for SKL */
  181.                 if (INTEL_INFO(dev)->gen < 9)
  182.                         I915_WRITE(PORT_CLK_SEL(port),
  183.                                    intel_crtc->config->ddi_pll_sel);
  184.  
  185.                 intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  186.  
  187.                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  188.  
  189.  
  190.                 intel_dp_start_link_train(intel_dp);
  191.                 intel_dp_stop_link_train(intel_dp);
  192.         }
  193.  
  194.         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  195.                                        intel_mst->port,
  196.                                        intel_crtc->config->pbn, &slots);
  197.         if (ret == false) {
  198.                 DRM_ERROR("failed to allocate vcpi\n");
  199.                 return;
  200.         }
  201.  
  202.  
  203.         intel_dp->active_mst_links++;
  204.         temp = I915_READ(DP_TP_STATUS(port));
  205.         I915_WRITE(DP_TP_STATUS(port), temp);
  206.  
  207.         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  208. }
  209.  
  210. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  211. {
  212.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  213.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  214.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  215.         struct drm_device *dev = intel_dig_port->base.base.dev;
  216.         struct drm_i915_private *dev_priv = dev->dev_private;
  217.         enum port port = intel_dig_port->port;
  218.         int ret;
  219.  
  220.         DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  221.  
  222.         if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  223.                      1))
  224.                 DRM_ERROR("Timed out waiting for ACT sent\n");
  225.  
  226.         ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  227.  
  228.         ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  229. }
  230.  
  231. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  232.                                       enum pipe *pipe)
  233. {
  234.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  235.         *pipe = intel_mst->pipe;
  236.         if (intel_mst->port)
  237.                 return true;
  238.         return false;
  239. }
  240.  
  241. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  242.                                         struct intel_crtc_state *pipe_config)
  243. {
  244.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  245.         struct intel_digital_port *intel_dig_port = intel_mst->primary;
  246.         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  247.         struct drm_device *dev = encoder->base.dev;
  248.         struct drm_i915_private *dev_priv = dev->dev_private;
  249.         enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  250.         u32 temp, flags = 0;
  251.  
  252.         pipe_config->has_dp_encoder = true;
  253.  
  254.         temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  255.         if (temp & TRANS_DDI_PHSYNC)
  256.                 flags |= DRM_MODE_FLAG_PHSYNC;
  257.         else
  258.                 flags |= DRM_MODE_FLAG_NHSYNC;
  259.         if (temp & TRANS_DDI_PVSYNC)
  260.                 flags |= DRM_MODE_FLAG_PVSYNC;
  261.         else
  262.                 flags |= DRM_MODE_FLAG_NVSYNC;
  263.  
  264.         switch (temp & TRANS_DDI_BPC_MASK) {
  265.         case TRANS_DDI_BPC_6:
  266.                 pipe_config->pipe_bpp = 18;
  267.                 break;
  268.         case TRANS_DDI_BPC_8:
  269.                 pipe_config->pipe_bpp = 24;
  270.                 break;
  271.         case TRANS_DDI_BPC_10:
  272.                 pipe_config->pipe_bpp = 30;
  273.                 break;
  274.         case TRANS_DDI_BPC_12:
  275.                 pipe_config->pipe_bpp = 36;
  276.                 break;
  277.         default:
  278.                 break;
  279.         }
  280.         pipe_config->base.adjusted_mode.flags |= flags;
  281.  
  282.         pipe_config->lane_count =
  283.                 ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  284.  
  285.         intel_dp_get_m_n(crtc, pipe_config);
  286.  
  287.         intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  288. }
  289.  
  290. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  291. {
  292.         struct intel_connector *intel_connector = to_intel_connector(connector);
  293.         struct intel_dp *intel_dp = intel_connector->mst_port;
  294.         struct edid *edid;
  295.         int ret;
  296.  
  297.         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  298.         if (!edid)
  299.                 return 0;
  300.  
  301.         ret = intel_connector_update_modes(connector, edid);
  302.         kfree(edid);
  303.  
  304.         return ret;
  305. }
  306.  
  307. static enum drm_connector_status
  308. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  309. {
  310.         struct intel_connector *intel_connector = to_intel_connector(connector);
  311.         struct intel_dp *intel_dp = intel_connector->mst_port;
  312.  
  313.         return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  314. }
  315.  
  316. static int
  317. intel_dp_mst_set_property(struct drm_connector *connector,
  318.                           struct drm_property *property,
  319.                           uint64_t val)
  320. {
  321.         return 0;
  322. }
  323.  
  324. static void
  325. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  326. {
  327.         struct intel_connector *intel_connector = to_intel_connector(connector);
  328.  
  329.         if (!IS_ERR_OR_NULL(intel_connector->edid))
  330.                 kfree(intel_connector->edid);
  331.  
  332.         drm_connector_cleanup(connector);
  333.         kfree(connector);
  334. }
  335.  
  336. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  337.         .dpms = drm_atomic_helper_connector_dpms,
  338.         .detect = intel_dp_mst_detect,
  339.         .fill_modes = drm_helper_probe_single_connector_modes,
  340.         .set_property = intel_dp_mst_set_property,
  341.         .atomic_get_property = intel_connector_atomic_get_property,
  342.         .destroy = intel_dp_mst_connector_destroy,
  343.         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  344.         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  345. };
  346.  
  347. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  348. {
  349.         return intel_dp_mst_get_ddc_modes(connector);
  350. }
  351.  
  352. static enum drm_mode_status
  353. intel_dp_mst_mode_valid(struct drm_connector *connector,
  354.                         struct drm_display_mode *mode)
  355. {
  356.         /* TODO - validate mode against available PBN for link */
  357.         if (mode->clock < 10000)
  358.                 return MODE_CLOCK_LOW;
  359.  
  360.         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  361.                 return MODE_H_ILLEGAL;
  362.  
  363.         return MODE_OK;
  364. }
  365.  
  366. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  367.                                                          struct drm_connector_state *state)
  368. {
  369.         struct intel_connector *intel_connector = to_intel_connector(connector);
  370.         struct intel_dp *intel_dp = intel_connector->mst_port;
  371.         struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  372.  
  373.         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  374. }
  375.  
  376. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  377. {
  378.         struct intel_connector *intel_connector = to_intel_connector(connector);
  379.         struct intel_dp *intel_dp = intel_connector->mst_port;
  380.         return &intel_dp->mst_encoders[0]->base.base;
  381. }
  382.  
  383. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  384.         .get_modes = intel_dp_mst_get_modes,
  385.         .mode_valid = intel_dp_mst_mode_valid,
  386.         .atomic_best_encoder = intel_mst_atomic_best_encoder,
  387.         .best_encoder = intel_mst_best_encoder,
  388. };
  389.  
  390. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  391. {
  392.         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  393.  
  394.         drm_encoder_cleanup(encoder);
  395.         kfree(intel_mst);
  396. }
  397.  
  398. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  399.         .destroy = intel_dp_mst_encoder_destroy,
  400. };
  401.  
  402. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  403. {
  404.         if (connector->encoder && connector->base.state->crtc) {
  405.                 enum pipe pipe;
  406.                 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  407.                         return false;
  408.                 return true;
  409.         }
  410.         return false;
  411. }
  412.  
  413. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  414. {
  415. #ifdef CONFIG_DRM_FBDEV_EMULATION
  416.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  417.         drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  418. #endif
  419. }
  420.  
  421. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  422. {
  423. #ifdef CONFIG_DRM_FBDEV_EMULATION
  424.         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  425.         drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  426. #endif
  427. }
  428.  
  429. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  430. {
  431.         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  432.         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  433.         struct drm_device *dev = intel_dig_port->base.base.dev;
  434.         struct intel_connector *intel_connector;
  435.         struct drm_connector *connector;
  436.         int i;
  437.  
  438.         intel_connector = intel_connector_alloc();
  439.         if (!intel_connector)
  440.                 return NULL;
  441.  
  442.         connector = &intel_connector->base;
  443.         drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  444.         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  445.  
  446.         intel_connector->unregister = intel_connector_unregister;
  447.         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  448.         intel_connector->mst_port = intel_dp;
  449.         intel_connector->port = port;
  450.  
  451.         for (i = PIPE_A; i <= PIPE_C; i++) {
  452.                 drm_mode_connector_attach_encoder(&intel_connector->base,
  453.                                                   &intel_dp->mst_encoders[i]->base.base);
  454.         }
  455.         intel_dp_add_properties(intel_dp, connector);
  456.  
  457.         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  458.         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  459.  
  460.         drm_mode_connector_set_path_property(connector, pathprop);
  461.         return connector;
  462. }
  463.  
  464. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  465. {
  466.         struct intel_connector *intel_connector = to_intel_connector(connector);
  467.         struct drm_device *dev = connector->dev;
  468.         drm_modeset_lock_all(dev);
  469.         intel_connector_add_to_fbdev(intel_connector);
  470.         drm_modeset_unlock_all(dev);
  471.         drm_connector_register(&intel_connector->base);
  472. }
  473.  
  474. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  475.                                            struct drm_connector *connector)
  476. {
  477.         struct intel_connector *intel_connector = to_intel_connector(connector);
  478.         struct drm_device *dev = connector->dev;
  479.  
  480.         /* need to nuke the connector */
  481.         drm_modeset_lock_all(dev);
  482.         if (connector->state->crtc) {
  483.                 struct drm_mode_set set;
  484.                 int ret;
  485.  
  486.                 memset(&set, 0, sizeof(set));
  487.                 set.crtc = connector->state->crtc,
  488.  
  489.                 ret = drm_atomic_helper_set_config(&set);
  490.  
  491.                 WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  492.         }
  493.         drm_modeset_unlock_all(dev);
  494.  
  495.         intel_connector->unregister(intel_connector);
  496.  
  497.         drm_modeset_lock_all(dev);
  498.         intel_connector_remove_from_fbdev(intel_connector);
  499.         drm_connector_cleanup(connector);
  500.         drm_modeset_unlock_all(dev);
  501.  
  502.         kfree(intel_connector);
  503.         DRM_DEBUG_KMS("\n");
  504. }
  505.  
  506. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  507. {
  508.         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  509.         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  510.         struct drm_device *dev = intel_dig_port->base.base.dev;
  511.  
  512.         drm_kms_helper_hotplug_event(dev);
  513. }
  514.  
  515. static struct drm_dp_mst_topology_cbs mst_cbs = {
  516.         .add_connector = intel_dp_add_mst_connector,
  517.         .register_connector = intel_dp_register_mst_connector,
  518.         .destroy_connector = intel_dp_destroy_mst_connector,
  519.         .hotplug = intel_dp_mst_hotplug,
  520. };
  521.  
  522. static struct intel_dp_mst_encoder *
  523. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  524. {
  525.         struct intel_dp_mst_encoder *intel_mst;
  526.         struct intel_encoder *intel_encoder;
  527.         struct drm_device *dev = intel_dig_port->base.base.dev;
  528.  
  529.         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  530.  
  531.         if (!intel_mst)
  532.                 return NULL;
  533.  
  534.         intel_mst->pipe = pipe;
  535.         intel_encoder = &intel_mst->base;
  536.         intel_mst->primary = intel_dig_port;
  537.  
  538.         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  539.                          DRM_MODE_ENCODER_DPMST);
  540.  
  541.         intel_encoder->type = INTEL_OUTPUT_DP_MST;
  542.         intel_encoder->crtc_mask = 0x7;
  543.         intel_encoder->cloneable = 0;
  544.  
  545.         intel_encoder->compute_config = intel_dp_mst_compute_config;
  546.         intel_encoder->disable = intel_mst_disable_dp;
  547.         intel_encoder->post_disable = intel_mst_post_disable_dp;
  548.         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  549.         intel_encoder->enable = intel_mst_enable_dp;
  550.         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  551.         intel_encoder->get_config = intel_dp_mst_enc_get_config;
  552.  
  553.         return intel_mst;
  554.  
  555. }
  556.  
  557. static bool
  558. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  559. {
  560.         int i;
  561.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  562.  
  563.         for (i = PIPE_A; i <= PIPE_C; i++)
  564.                 intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  565.         return true;
  566. }
  567.  
  568. int
  569. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  570. {
  571.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  572.         struct drm_device *dev = intel_dig_port->base.base.dev;
  573.         int ret;
  574.  
  575.         intel_dp->can_mst = true;
  576.         intel_dp->mst_mgr.cbs = &mst_cbs;
  577.  
  578.         /* create encoders */
  579.         intel_dp_create_fake_mst_encoders(intel_dig_port);
  580.         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  581.         if (ret) {
  582.                 intel_dp->can_mst = false;
  583.                 return ret;
  584.         }
  585.         return 0;
  586. }
  587.  
  588. void
  589. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  590. {
  591.         struct intel_dp *intel_dp = &intel_dig_port->dp;
  592.  
  593.         if (!intel_dp->can_mst)
  594.                 return;
  595.  
  596.         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  597.         /* encoders will get killed by normal cleanup */
  598. }
  599.