Subversion Repositories Kolibri OS

Rev

Rev 2325 | Rev 3031 | Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | Download | RSS feed

  1. /*
  2.  * Intel AGPGART routines.
  3.  */
  4.  
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/mod_devicetable.h>
  8. #include <errno-base.h>
  9. #include <linux/pci.h>
  10.  
  11. //#include <linux/agp_backend.h>
  12. //#include <asm/smp.h>
  13. #include <linux/spinlock.h>
  14.  
  15. #include "agp.h"
  16. #include "intel-agp.h"
  17.  
  18. #include <syscall.h>
  19.  
  20. #define __devinit
  21. #define PCI_VENDOR_ID_INTEL             0x8086
  22. #define PCI_DEVICE_ID_INTEL_82915G_HB   0x2580
  23. #define PCI_DEVICE_ID_INTEL_82915GM_HB  0x2590
  24. #define PCI_DEVICE_ID_INTEL_82945G_HB   0x2770
  25. #define PCI_DEVICE_ID_INTEL_82945GM_HB  0x27A0
  26.  
  27.  
  28. int intel_gmch_probe(struct pci_dev *pdev,
  29.                       struct agp_bridge_data *bridge);
  30.  
  31. int intel_agp_enabled;
  32.  
  33. struct agp_bridge_data *agp_alloc_bridge(void)
  34. {
  35.     struct agp_bridge_data *bridge;
  36.  
  37.     bridge = kzalloc(sizeof(*bridge), GFP_KERNEL);
  38.     if (!bridge)
  39.         return NULL;
  40.  
  41.     atomic_set(&bridge->agp_in_use, 0);
  42.     atomic_set(&bridge->current_memory_agp, 0);
  43.  
  44. //    if (list_empty(&agp_bridges))
  45. //      agp_bridge = bridge;
  46.  
  47.     return bridge;
  48. }
  49.  
  50. static int __devinit agp_intel_probe(struct pci_dev *pdev,
  51.                      const struct pci_device_id *ent)
  52. {
  53.     struct agp_bridge_data *bridge;
  54.     u8 cap_ptr = 0;
  55.     int err = -ENODEV;
  56.  
  57.     cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
  58.  
  59.     bridge = agp_alloc_bridge();
  60.     if (!bridge)
  61.         return -ENOMEM;
  62.  
  63.     bridge->capndx = cap_ptr;
  64.  
  65.     if (intel_gmch_probe(pdev, bridge))
  66.     {
  67. //        pci_set_drvdata(pdev, bridge);
  68. //        err = agp_add_bridge(bridge);
  69. //        if (!err)
  70.         intel_agp_enabled = 1;
  71.         err = 0;
  72.     }
  73.  
  74.     return err;
  75. }
  76.  
  77. static struct pci_device_id agp_intel_pci_table[] = {
  78. #define ID(x)                       \
  79.     {                       \
  80.     .class      = (PCI_CLASS_BRIDGE_HOST << 8), \
  81.     .class_mask = ~0,               \
  82.     .vendor     = PCI_VENDOR_ID_INTEL,      \
  83.     .device     = x,                \
  84.     .subvendor  = PCI_ANY_ID,           \
  85.     .subdevice  = PCI_ANY_ID,           \
  86.     }
  87.         ID(PCI_DEVICE_ID_INTEL_E7221_HB),
  88.         ID(PCI_DEVICE_ID_INTEL_82915G_HB),
  89.         ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
  90.         ID(PCI_DEVICE_ID_INTEL_82945G_HB),
  91.         ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
  92.         ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
  93.         ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),
  94.         ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),
  95.         ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
  96.         ID(PCI_DEVICE_ID_INTEL_82G35_HB),
  97.         ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
  98.         ID(PCI_DEVICE_ID_INTEL_82965G_HB),
  99.         ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
  100.         ID(PCI_DEVICE_ID_INTEL_82965GME_HB),
  101.         ID(PCI_DEVICE_ID_INTEL_G33_HB),
  102.         ID(PCI_DEVICE_ID_INTEL_Q35_HB),
  103.         ID(PCI_DEVICE_ID_INTEL_Q33_HB),
  104.         ID(PCI_DEVICE_ID_INTEL_GM45_HB),
  105.         ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),
  106.         ID(PCI_DEVICE_ID_INTEL_Q45_HB),
  107.         ID(PCI_DEVICE_ID_INTEL_G45_HB),
  108.         ID(PCI_DEVICE_ID_INTEL_G41_HB),
  109.         ID(PCI_DEVICE_ID_INTEL_B43_HB),
  110.         ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
  111.         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
  112.         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
  113.         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
  114.         ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
  115.     ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),
  116.     ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),
  117.     ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB),
  118.         ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB),
  119.         ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB),
  120.         ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB),
  121.     { }
  122. };
  123.  
  124. static pci_dev_t agp_device;
  125.  
  126. int init_agp(void)
  127. {
  128.     const struct pci_device_id  *ent;
  129.  
  130.     ent = find_pci_device(&agp_device, agp_intel_pci_table);
  131.  
  132.     if( unlikely(ent == NULL) )
  133.     {
  134.         dbgprintf("host controller not found\n");
  135.         return -ENODEV;
  136.     };
  137.  
  138.     return agp_intel_probe(&agp_device.pci_dev, ent);
  139. }
  140.  
  141.  
  142.