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  1. /*
  2.  * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3.  * Copyright (c) 2007-2008 Intel Corporation
  4.  *   Jesse Barnes <jesse.barnes@intel.com>
  5.  *
  6.  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  7.  * FB layer.
  8.  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  9.  *
  10.  * Permission is hereby granted, free of charge, to any person obtaining a
  11.  * copy of this software and associated documentation files (the "Software"),
  12.  * to deal in the Software without restriction, including without limitation
  13.  * the rights to use, copy, modify, merge, publish, distribute, sub license,
  14.  * and/or sell copies of the Software, and to permit persons to whom the
  15.  * Software is furnished to do so, subject to the following conditions:
  16.  *
  17.  * The above copyright notice and this permission notice (including the
  18.  * next paragraph) shall be included in all copies or substantial portions
  19.  * of the Software.
  20.  *
  21.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  24.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  25.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  26.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27.  * DEALINGS IN THE SOFTWARE.
  28.  */
  29. #include <linux/kernel.h>
  30. #include <linux/i2c.h>
  31. #include <linux/i2c-algo-bit.h>
  32. #include "drmP.h"
  33. #include "drm_edid.h"
  34.  
  35. /*
  36.  * TODO:
  37.  *   - support EDID 1.4 (incl. CE blocks)
  38.  */
  39.  
  40. /*
  41.  * EDID blocks out in the wild have a variety of bugs, try to collect
  42.  * them here (note that userspace may work around broken monitors first,
  43.  * but fixes should make their way here so that the kernel "just works"
  44.  * on as many displays as possible).
  45.  */
  46.  
  47. /* First detailed mode wrong, use largest 60Hz mode */
  48. #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
  49. /* Reported 135MHz pixel clock is too high, needs adjustment */
  50. #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
  51. /* Prefer the largest mode at 75 Hz */
  52. #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
  53. /* Detail timing is in cm not mm */
  54. #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
  55. /* Detailed timing descriptors have bogus size values, so just take the
  56.  * maximum size and use that.
  57.  */
  58. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
  59. /* Monitor forgot to set the first detailed is preferred bit. */
  60. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
  61. /* use +hsync +vsync for detailed mode */
  62. #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
  63. /* define the number of Extension EDID block */
  64. #define MAX_EDID_EXT_NUM 4
  65.  
  66. #define LEVEL_DMT       0
  67. #define LEVEL_GTF       1
  68. #define LEVEL_CVT       2
  69.  
  70. static struct edid_quirk {
  71.         char *vendor;
  72.         int product_id;
  73.         u32 quirks;
  74. } edid_quirk_list[] = {
  75.         /* Acer AL1706 */
  76.         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  77.         /* Acer F51 */
  78.         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  79.         /* Unknown Acer */
  80.         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  81.  
  82.         /* Belinea 10 15 55 */
  83.         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  84.         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  85.  
  86.         /* Envision Peripherals, Inc. EN-7100e */
  87.         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  88.  
  89.         /* Funai Electronics PM36B */
  90.         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  91.           EDID_QUIRK_DETAILED_IN_CM },
  92.  
  93.         /* LG Philips LCD LP154W01-A5 */
  94.         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  95.         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  96.  
  97.         /* Philips 107p5 CRT */
  98.         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  99.  
  100.         /* Proview AY765C */
  101.         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  102.  
  103.         /* Samsung SyncMaster 205BW.  Note: irony */
  104.         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  105.         /* Samsung SyncMaster 22[5-6]BW */
  106.         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  107.         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  108. };
  109.  
  110.  
  111. /* Valid EDID header has these bytes */
  112. static const u8 edid_header[] = {
  113.         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  114. };
  115.  
  116. /**
  117.  * edid_is_valid - sanity check EDID data
  118.  * @edid: EDID data
  119.  *
  120.  * Sanity check the EDID block by looking at the header, the version number
  121.  * and the checksum.  Return 0 if the EDID doesn't check out, or 1 if it's
  122.  * valid.
  123.  */
  124. static bool edid_is_valid(struct edid *edid)
  125. {
  126.         int i, score = 0;
  127.         u8 csum = 0;
  128.         u8 *raw_edid = (u8 *)edid;
  129.  
  130.         for (i = 0; i < sizeof(edid_header); i++)
  131.                 if (raw_edid[i] == edid_header[i])
  132.                         score++;
  133.  
  134.         if (score == 8) ;
  135.         else if (score >= 6) {
  136.                 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
  137.                 memcpy(raw_edid, edid_header, sizeof(edid_header));
  138.         } else
  139.                 goto bad;
  140.  
  141.         for (i = 0; i < EDID_LENGTH; i++)
  142.                 csum += raw_edid[i];
  143.         if (csum) {
  144.                 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  145.                 goto bad;
  146.         }
  147.  
  148.         if (edid->version != 1) {
  149.                 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  150.                 goto bad;
  151.         }
  152.  
  153.         if (edid->revision > 4)
  154.                 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  155.  
  156.         return 1;
  157.  
  158. bad:
  159.         if (raw_edid) {
  160.                 DRM_ERROR("Raw EDID:\n");
  161. //       print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  162. //       printk("\n");
  163.         }
  164.         return 0;
  165. }
  166.  
  167. /**
  168.  * edid_vendor - match a string against EDID's obfuscated vendor field
  169.  * @edid: EDID to match
  170.  * @vendor: vendor string
  171.  *
  172.  * Returns true if @vendor is in @edid, false otherwise
  173.  */
  174. static bool edid_vendor(struct edid *edid, char *vendor)
  175. {
  176.         char edid_vendor[3];
  177.  
  178.         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  179.         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  180.                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  181.         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  182.  
  183.         return !strncmp(edid_vendor, vendor, 3);
  184. }
  185.  
  186. /**
  187.  * edid_get_quirks - return quirk flags for a given EDID
  188.  * @edid: EDID to process
  189.  *
  190.  * This tells subsequent routines what fixes they need to apply.
  191.  */
  192. static u32 edid_get_quirks(struct edid *edid)
  193. {
  194.         struct edid_quirk *quirk;
  195.         int i;
  196.  
  197.         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  198.                 quirk = &edid_quirk_list[i];
  199.  
  200.                 if (edid_vendor(edid, quirk->vendor) &&
  201.                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
  202.                         return quirk->quirks;
  203.         }
  204.  
  205.         return 0;
  206. }
  207.  
  208. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  209. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  210.  
  211.  
  212. /**
  213.  * edid_fixup_preferred - set preferred modes based on quirk list
  214.  * @connector: has mode list to fix up
  215.  * @quirks: quirks list
  216.  *
  217.  * Walk the mode list for @connector, clearing the preferred status
  218.  * on existing modes and setting it anew for the right mode ala @quirks.
  219.  */
  220. static void edid_fixup_preferred(struct drm_connector *connector,
  221.                                  u32 quirks)
  222. {
  223.         struct drm_display_mode *t, *cur_mode, *preferred_mode;
  224.         int target_refresh = 0;
  225.  
  226.         if (list_empty(&connector->probed_modes))
  227.                 return;
  228.  
  229.         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  230.                 target_refresh = 60;
  231.         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  232.                 target_refresh = 75;
  233.  
  234.         preferred_mode = list_first_entry(&connector->probed_modes,
  235.                                           struct drm_display_mode, head);
  236.  
  237.         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  238.                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  239.  
  240.                 if (cur_mode == preferred_mode)
  241.                         continue;
  242.  
  243.                 /* Largest mode is preferred */
  244.                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  245.                         preferred_mode = cur_mode;
  246.  
  247.                 /* At a given size, try to get closest to target refresh */
  248.                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  249.                     MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  250.                     MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  251.                         preferred_mode = cur_mode;
  252.                 }
  253.         }
  254.  
  255.         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  256. }
  257.  
  258. /*
  259.  * Add the Autogenerated from the DMT spec.
  260.  * This table is copied from xfree86/modes/xf86EdidModes.c.
  261.  * But the mode with Reduced blank feature is deleted.
  262.  */
  263. static struct drm_display_mode drm_dmt_modes[] = {
  264.         /* 640x350@85Hz */
  265.         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  266.                    736, 832, 0, 350, 382, 385, 445, 0,
  267.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  268.         /* 640x400@85Hz */
  269.         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  270.                    736, 832, 0, 400, 401, 404, 445, 0,
  271.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  272.         /* 720x400@85Hz */
  273.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  274.                    828, 936, 0, 400, 401, 404, 446, 0,
  275.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  276.         /* 640x480@60Hz */
  277.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  278.                    752, 800, 0, 480, 489, 492, 525, 0,
  279.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  280.         /* 640x480@72Hz */
  281.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  282.                    704, 832, 0, 480, 489, 492, 520, 0,
  283.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  284.         /* 640x480@75Hz */
  285.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  286.                    720, 840, 0, 480, 481, 484, 500, 0,
  287.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  288.         /* 640x480@85Hz */
  289.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  290.                    752, 832, 0, 480, 481, 484, 509, 0,
  291.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  292.         /* 800x600@56Hz */
  293.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  294.                    896, 1024, 0, 600, 601, 603, 625, 0,
  295.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  296.         /* 800x600@60Hz */
  297.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  298.                    968, 1056, 0, 600, 601, 605, 628, 0,
  299.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  300.         /* 800x600@72Hz */
  301.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  302.                    976, 1040, 0, 600, 637, 643, 666, 0,
  303.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  304.         /* 800x600@75Hz */
  305.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  306.                    896, 1056, 0, 600, 601, 604, 625, 0,
  307.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  308.         /* 800x600@85Hz */
  309.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  310.                    896, 1048, 0, 600, 601, 604, 631, 0,
  311.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  312.         /* 848x480@60Hz */
  313.         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  314.                    976, 1088, 0, 480, 486, 494, 517, 0,
  315.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  316.         /* 1024x768@43Hz, interlace */
  317.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  318.                    1208, 1264, 0, 768, 768, 772, 817, 0,
  319.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  320.                         DRM_MODE_FLAG_INTERLACE) },
  321.         /* 1024x768@60Hz */
  322.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  323.                    1184, 1344, 0, 768, 771, 777, 806, 0,
  324.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  325.         /* 1024x768@70Hz */
  326.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  327.                    1184, 1328, 0, 768, 771, 777, 806, 0,
  328.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  329.         /* 1024x768@75Hz */
  330.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  331.                    1136, 1312, 0, 768, 769, 772, 800, 0,
  332.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  333.         /* 1024x768@85Hz */
  334.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  335.                    1072, 1376, 0, 768, 769, 772, 808, 0,
  336.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  337.         /* 1152x864@75Hz */
  338.         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  339.                    1344, 1600, 0, 864, 865, 868, 900, 0,
  340.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  341.         /* 1280x768@60Hz */
  342.         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  343.                    1472, 1664, 0, 768, 771, 778, 798, 0,
  344.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  345.         /* 1280x768@75Hz */
  346.         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  347.                    1488, 1696, 0, 768, 771, 778, 805, 0,
  348.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  349.         /* 1280x768@85Hz */
  350.         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  351.                    1496, 1712, 0, 768, 771, 778, 809, 0,
  352.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  353.         /* 1280x800@60Hz */
  354.         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  355.                    1480, 1680, 0, 800, 803, 809, 831, 0,
  356.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  357.         /* 1280x800@75Hz */
  358.         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  359.                    1488, 1696, 0, 800, 803, 809, 838, 0,
  360.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  361.         /* 1280x800@85Hz */
  362.         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  363.                    1496, 1712, 0, 800, 803, 809, 843, 0,
  364.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  365.         /* 1280x960@60Hz */
  366.         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  367.                    1488, 1800, 0, 960, 961, 964, 1000, 0,
  368.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  369.         /* 1280x960@85Hz */
  370.         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  371.                    1504, 1728, 0, 960, 961, 964, 1011, 0,
  372.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  373.         /* 1280x1024@60Hz */
  374.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  375.                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  376.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  377.         /* 1280x1024@75Hz */
  378.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  379.                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  380.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  381.         /* 1280x1024@85Hz */
  382.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  383.                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  384.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  385.         /* 1360x768@60Hz */
  386.         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  387.                    1536, 1792, 0, 768, 771, 777, 795, 0,
  388.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  389.         /* 1440x1050@60Hz */
  390.         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  391.                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  392.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  393.         /* 1440x1050@75Hz */
  394.         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  395.                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  396.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  397.         /* 1440x1050@85Hz */
  398.         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  399.                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  400.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  401.         /* 1440x900@60Hz */
  402.         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  403.                    1672, 1904, 0, 900, 903, 909, 934, 0,
  404.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  405.         /* 1440x900@75Hz */
  406.         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  407.                    1688, 1936, 0, 900, 903, 909, 942, 0,
  408.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  409.         /* 1440x900@85Hz */
  410.         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  411.                    1696, 1952, 0, 900, 903, 909, 948, 0,
  412.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  413.         /* 1600x1200@60Hz */
  414.         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  415.                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  416.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  417.         /* 1600x1200@65Hz */
  418.         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  419.                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  420.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  421.         /* 1600x1200@70Hz */
  422.         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  423.                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  424.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  425.         /* 1600x1200@75Hz */
  426.         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  427.                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  428.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  429.         /* 1600x1200@85Hz */
  430.         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  431.                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  432.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  433.         /* 1680x1050@60Hz */
  434.         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  435.                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  436.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  437.         /* 1680x1050@75Hz */
  438.         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  439.                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  440.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  441.         /* 1680x1050@85Hz */
  442.         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  443.                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  444.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  445.         /* 1792x1344@60Hz */
  446.         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  447.                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  448.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  449.         /* 1729x1344@75Hz */
  450.         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  451.                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  452.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  453.         /* 1853x1392@60Hz */
  454.         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  455.                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  456.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  457.         /* 1856x1392@75Hz */
  458.         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  459.                    2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  460.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  461.         /* 1920x1200@60Hz */
  462.         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  463.                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  464.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  465.         /* 1920x1200@75Hz */
  466.         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  467.                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  468.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  469.         /* 1920x1200@85Hz */
  470.         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  471.                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  472.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  473.         /* 1920x1440@60Hz */
  474.         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  475.                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  476.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  477.         /* 1920x1440@75Hz */
  478.         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  479.                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  480.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  481.         /* 2560x1600@60Hz */
  482.         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  483.                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  484.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  485.         /* 2560x1600@75HZ */
  486.         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  487.                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  488.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  489.         /* 2560x1600@85HZ */
  490.         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  491.                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  492.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  493. };
  494. static const int drm_num_dmt_modes =
  495.         sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  496.  
  497. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  498.                         int hsize, int vsize, int fresh)
  499. {
  500.         int i;
  501.         struct drm_display_mode *ptr, *mode;
  502.  
  503.         mode = NULL;
  504.         for (i = 0; i < drm_num_dmt_modes; i++) {
  505.                 ptr = &drm_dmt_modes[i];
  506.                 if (hsize == ptr->hdisplay &&
  507.                         vsize == ptr->vdisplay &&
  508.                         fresh == drm_mode_vrefresh(ptr)) {
  509.                         /* get the expected default mode */
  510.                         mode = drm_mode_duplicate(dev, ptr);
  511.                         break;
  512.                 }
  513.         }
  514.         return mode;
  515. }
  516.  
  517. /*
  518.  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
  519.  * monitors fill with ascii space (0x20) instead.
  520.  */
  521. static int
  522. bad_std_timing(u8 a, u8 b)
  523. {
  524.         return (a == 0x00 && b == 0x00) ||
  525.                (a == 0x01 && b == 0x01) ||
  526.                (a == 0x20 && b == 0x20);
  527. }
  528.  
  529. /**
  530.  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  531.  * @t: standard timing params
  532.  * @timing_level: standard timing level
  533.  *
  534.  * Take the standard timing params (in this case width, aspect, and refresh)
  535.  * and convert them into a real mode using CVT/GTF/DMT.
  536.  *
  537.  * Punts for now, but should eventually use the FB layer's CVT based mode
  538.  * generation code.
  539.  */
  540. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  541.                                       struct std_timing *t,
  542.                                       int revision,
  543.                                       int timing_level)
  544. {
  545.         struct drm_display_mode *mode;
  546.         int hsize, vsize;
  547.         int vrefresh_rate;
  548.         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  549.                 >> EDID_TIMING_ASPECT_SHIFT;
  550.         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  551.                 >> EDID_TIMING_VFREQ_SHIFT;
  552.  
  553.         if (bad_std_timing(t->hsize, t->vfreq_aspect))
  554.                 return NULL;
  555.  
  556.         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  557.         hsize = t->hsize * 8 + 248;
  558.         /* vrefresh_rate = vfreq + 60 */
  559.         vrefresh_rate = vfreq + 60;
  560.         /* the vdisplay is calculated based on the aspect ratio */
  561.         if (aspect_ratio == 0) {
  562.                 if (revision < 3)
  563.                         vsize = hsize;
  564.                 else
  565.                 vsize = (hsize * 10) / 16;
  566.         } else if (aspect_ratio == 1)
  567.                 vsize = (hsize * 3) / 4;
  568.         else if (aspect_ratio == 2)
  569.                 vsize = (hsize * 4) / 5;
  570.         else
  571.                 vsize = (hsize * 9) / 16;
  572.         /* HDTV hack */
  573.         if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  574.                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  575.                                     false);
  576.                 mode->hdisplay = 1366;
  577.                 mode->vsync_start = mode->vsync_start - 1;
  578.                 mode->vsync_end = mode->vsync_end - 1;
  579.                 return mode;
  580.         }
  581.         mode = NULL;
  582.         /* check whether it can be found in default mode table */
  583.         mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  584.         if (mode)
  585.                 return mode;
  586.  
  587.         switch (timing_level) {
  588.         case LEVEL_DMT:
  589.                 break;
  590.         case LEVEL_GTF:
  591.                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  592.                 break;
  593.         case LEVEL_CVT:
  594.                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  595.                                     false);
  596.                 break;
  597.         }
  598.         return mode;
  599. }
  600.  
  601. /**
  602.  * drm_mode_detailed - create a new mode from an EDID detailed timing section
  603.  * @dev: DRM device (needed to create new mode)
  604.  * @edid: EDID block
  605.  * @timing: EDID detailed timing info
  606.  * @quirks: quirks to apply
  607.  *
  608.  * An EDID detailed timing block contains enough info for us to create and
  609.  * return a new struct drm_display_mode.
  610.  */
  611. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  612.                                                   struct edid *edid,
  613.                                                   struct detailed_timing *timing,
  614.                                                   u32 quirks)
  615. {
  616.         struct drm_display_mode *mode;
  617.         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  618.         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  619.         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  620.         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  621.         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  622.         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  623.         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  624.         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  625.         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  626.  
  627.         /* ignore tiny modes */
  628.         if (hactive < 64 || vactive < 64)
  629.                 return NULL;
  630.  
  631.         if (pt->misc & DRM_EDID_PT_STEREO) {
  632.                 printk(KERN_WARNING "stereo mode not supported\n");
  633.                 return NULL;
  634.         }
  635.         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  636.                 printk(KERN_WARNING "integrated sync not supported\n");
  637.                 return NULL;
  638.         }
  639.  
  640.         /* it is incorrect if hsync/vsync width is zero */
  641.         if (!hsync_pulse_width || !vsync_pulse_width) {
  642.                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
  643.                                 "Wrong Hsync/Vsync pulse width\n");
  644.                 return NULL;
  645.         }
  646.         mode = drm_mode_create(dev);
  647.         if (!mode)
  648.                 return NULL;
  649.  
  650.         mode->type = DRM_MODE_TYPE_DRIVER;
  651.  
  652.         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  653.                 timing->pixel_clock = cpu_to_le16(1088);
  654.  
  655.         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  656.  
  657.         mode->hdisplay = hactive;
  658.         mode->hsync_start = mode->hdisplay + hsync_offset;
  659.         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  660.         mode->htotal = mode->hdisplay + hblank;
  661.  
  662.         mode->vdisplay = vactive;
  663.         mode->vsync_start = mode->vdisplay + vsync_offset;
  664.         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  665.         mode->vtotal = mode->vdisplay + vblank;
  666.  
  667.         /* perform the basic check for the detailed timing */
  668.         if (mode->hsync_end > mode->htotal ||
  669.                 mode->vsync_end > mode->vtotal) {
  670.                 drm_mode_destroy(dev, mode);
  671.                 DRM_DEBUG_KMS("Incorrect detailed timing. "
  672.                                 "Sync is beyond the blank.\n");
  673.                 return NULL;
  674.         }
  675.  
  676.         /* Some EDIDs have bogus h/vtotal values */
  677.         if (mode->hsync_end > mode->htotal)
  678.                 mode->htotal = mode->hsync_end + 1;
  679.         if (mode->vsync_end > mode->vtotal)
  680.                 mode->vtotal = mode->vsync_end + 1;
  681.  
  682.         drm_mode_set_name(mode);
  683.  
  684.         if (pt->misc & DRM_EDID_PT_INTERLACED)
  685.                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
  686.  
  687.         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  688.                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  689.         }
  690.  
  691.         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  692.                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  693.         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  694.                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  695.  
  696.         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  697.         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  698.  
  699.         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  700.                 mode->width_mm *= 10;
  701.                 mode->height_mm *= 10;
  702.         }
  703.  
  704.         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  705.                 mode->width_mm = edid->width_cm * 10;
  706.                 mode->height_mm = edid->height_cm * 10;
  707.         }
  708.  
  709.         return mode;
  710. }
  711.  
  712. /*
  713.  * Detailed mode info for the EDID "established modes" data to use.
  714.  */
  715. static struct drm_display_mode edid_est_modes[] = {
  716.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  717.                    968, 1056, 0, 600, 601, 605, 628, 0,
  718.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  719.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  720.                    896, 1024, 0, 600, 601, 603,  625, 0,
  721.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  722.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  723.                    720, 840, 0, 480, 481, 484, 500, 0,
  724.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  725.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  726.                    704,  832, 0, 480, 489, 491, 520, 0,
  727.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  728.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  729.                    768,  864, 0, 480, 483, 486, 525, 0,
  730.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  731.         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  732.                    752, 800, 0, 480, 490, 492, 525, 0,
  733.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  734.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  735.                    846, 900, 0, 400, 421, 423,  449, 0,
  736.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  737.         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  738.                    846,  900, 0, 400, 412, 414, 449, 0,
  739.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  740.         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  741.                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  742.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  743.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  744.                    1136, 1312, 0,  768, 769, 772, 800, 0,
  745.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  746.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  747.                    1184, 1328, 0,  768, 771, 777, 806, 0,
  748.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  749.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  750.                    1184, 1344, 0,  768, 771, 777, 806, 0,
  751.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  752.         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  753.                    1208, 1264, 0, 768, 768, 776, 817, 0,
  754.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  755.         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  756.                    928, 1152, 0, 624, 625, 628, 667, 0,
  757.                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  758.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  759.                    896, 1056, 0, 600, 601, 604,  625, 0,
  760.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  761.         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  762.                    976, 1040, 0, 600, 637, 643, 666, 0,
  763.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  764.         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  765.                    1344, 1600, 0,  864, 865, 868, 900, 0,
  766.                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  767. };
  768.  
  769. #define EDID_EST_TIMINGS 16
  770. #define EDID_STD_TIMINGS 8
  771. #define EDID_DETAILED_TIMINGS 4
  772.  
  773. /**
  774.  * add_established_modes - get est. modes from EDID and add them
  775.  * @edid: EDID block to scan
  776.  *
  777.  * Each EDID block contains a bitmap of the supported "established modes" list
  778.  * (defined above).  Tease them out and add them to the global modes list.
  779.  */
  780. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  781. {
  782.         struct drm_device *dev = connector->dev;
  783.         unsigned long est_bits = edid->established_timings.t1 |
  784.                 (edid->established_timings.t2 << 8) |
  785.                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  786.         int i, modes = 0;
  787.  
  788.         for (i = 0; i <= EDID_EST_TIMINGS; i++)
  789.                 if (est_bits & (1<<i)) {
  790.                         struct drm_display_mode *newmode;
  791.                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  792.                         if (newmode) {
  793.                                 drm_mode_probed_add(connector, newmode);
  794.                                 modes++;
  795.                         }
  796.                 }
  797.  
  798.         return modes;
  799. }
  800. /**
  801.  * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  802.  * @edid: EDID block to scan
  803.  */
  804. static int standard_timing_level(struct edid *edid)
  805. {
  806.         if (edid->revision >= 2) {
  807.                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  808.                         return LEVEL_CVT;
  809.                 return LEVEL_GTF;
  810.         }
  811.         return LEVEL_DMT;
  812. }
  813.  
  814. /**
  815.  * add_standard_modes - get std. modes from EDID and add them
  816.  * @edid: EDID block to scan
  817.  *
  818.  * Standard modes can be calculated using the CVT standard.  Grab them from
  819.  * @edid, calculate them, and add them to the list.
  820.  */
  821. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  822. {
  823.         struct drm_device *dev = connector->dev;
  824.         int i, modes = 0;
  825.         int timing_level;
  826.  
  827.         timing_level = standard_timing_level(edid);
  828.  
  829.         for (i = 0; i < EDID_STD_TIMINGS; i++) {
  830.                 struct std_timing *t = &edid->standard_timings[i];
  831.                 struct drm_display_mode *newmode;
  832.  
  833.                 /* If std timings bytes are 1, 1 it's empty */
  834.                 if (t->hsize == 1 && t->vfreq_aspect == 1)
  835.                         continue;
  836.  
  837.                 newmode = drm_mode_std(dev, &edid->standard_timings[i],
  838.                                        edid->revision, timing_level);
  839.                 if (newmode) {
  840.                         drm_mode_probed_add(connector, newmode);
  841.                         modes++;
  842.                 }
  843.         }
  844.  
  845.         return modes;
  846. }
  847.  
  848. /*
  849.  * XXX fix this for:
  850.  * - GTF secondary curve formula
  851.  * - EDID 1.4 range offsets
  852.  * - CVT extended bits
  853.  */
  854. static bool
  855. mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
  856. {
  857.         struct detailed_data_monitor_range *range;
  858.         int hsync, vrefresh;
  859.  
  860.         range = &timing->data.other_data.data.range;
  861.  
  862.         hsync = drm_mode_hsync(mode);
  863.         vrefresh = drm_mode_vrefresh(mode);
  864.  
  865.         if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
  866.                 return false;
  867.  
  868.         if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
  869.                 return false;
  870.  
  871.         if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
  872.                 /* be forgiving since it's in units of 10MHz */
  873.                 int max_clock = range->pixel_clock_mhz * 10 + 9;
  874.                 max_clock *= 1000;
  875.                 if (mode->clock > max_clock)
  876.                         return false;
  877.         }
  878.  
  879.         return true;
  880. }
  881.  
  882. /*
  883.  * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
  884.  * need to account for them.
  885.  */
  886. static int drm_gtf_modes_for_range(struct drm_connector *connector,
  887.                                    struct detailed_timing *timing)
  888. {
  889.         int i, modes = 0;
  890.         struct drm_display_mode *newmode;
  891.         struct drm_device *dev = connector->dev;
  892.  
  893.         for (i = 0; i < drm_num_dmt_modes; i++) {
  894.                 if (mode_in_range(drm_dmt_modes + i, timing)) {
  895.                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
  896.                         if (newmode) {
  897.                                 drm_mode_probed_add(connector, newmode);
  898.                                 modes++;
  899.                         }
  900.                 }
  901.         }
  902.  
  903.         return modes;
  904. }
  905.  
  906. static int drm_cvt_modes(struct drm_connector *connector,
  907.                          struct detailed_timing *timing)
  908. {
  909.         int i, j, modes = 0;
  910.         struct drm_display_mode *newmode;
  911.         struct drm_device *dev = connector->dev;
  912.         struct cvt_timing *cvt;
  913.         const int rates[] = { 60, 85, 75, 60, 50 };
  914.  
  915.         for (i = 0; i < 4; i++) {
  916.                 int width, height;
  917.                 cvt = &(timing->data.other_data.data.cvt[i]);
  918.  
  919.                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 8) + 1) * 2;
  920.                 switch (cvt->code[1] & 0xc0) {
  921.                 case 0x00:
  922.                         width = height * 4 / 3;
  923.                         break;
  924.                 case 0x40:
  925.                         width = height * 16 / 9;
  926.                         break;
  927.                 case 0x80:
  928.                         width = height * 16 / 10;
  929.                         break;
  930.                 case 0xc0:
  931.                         width = height * 15 / 9;
  932.                         break;
  933.                 }
  934.  
  935.                 for (j = 1; j < 5; j++) {
  936.                         if (cvt->code[2] & (1 << j)) {
  937.                                 newmode = drm_cvt_mode(dev, width, height,
  938.                                                        rates[j], j == 0,
  939.                                                        false, false);
  940.                                 if (newmode) {
  941.                                         drm_mode_probed_add(connector, newmode);
  942.                                         modes++;
  943.                                 }
  944.                         }
  945.                 }
  946.         }
  947.  
  948.         return modes;
  949. }
  950.  
  951. static int add_detailed_modes(struct drm_connector *connector,
  952.                               struct detailed_timing *timing,
  953.                               struct edid *edid, u32 quirks, int preferred)
  954. {
  955.         int i, modes = 0;
  956.                 struct detailed_non_pixel *data = &timing->data.other_data;
  957.         int timing_level = standard_timing_level(edid);
  958.         int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
  959.                 struct drm_display_mode *newmode;
  960.         struct drm_device *dev = connector->dev;
  961.  
  962.         if (timing->pixel_clock) {
  963.                 newmode = drm_mode_detailed(dev, edid, timing, quirks);
  964.                 if (!newmode)
  965.                         return 0;
  966.  
  967.                 if (preferred)
  968.                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
  969.  
  970.                 drm_mode_probed_add(connector, newmode);
  971.                 return 1;
  972.         }
  973.  
  974.         /* other timing types */
  975.                 switch (data->type) {
  976.                 case EDID_DETAIL_MONITOR_RANGE:
  977.                 if (gtf)
  978.                         modes += drm_gtf_modes_for_range(connector, timing);
  979.                         break;
  980.                 case EDID_DETAIL_STD_MODES:
  981.                 /* Six modes per detailed section */
  982.                 for (i = 0; i < 6; i++) {
  983.                                 struct std_timing *std;
  984.                                 struct drm_display_mode *newmode;
  985.  
  986.                         std = &data->data.timings[i];
  987.                         newmode = drm_mode_std(dev, std, edid->revision,
  988.                                                                timing_level);
  989.                                 if (newmode) {
  990.                                         drm_mode_probed_add(connector, newmode);
  991.                                         modes++;
  992.                                 }
  993.                         }
  994.                         break;
  995.         case EDID_DETAIL_CVT_3BYTE:
  996.                 modes += drm_cvt_modes(connector, timing);
  997.                 break;
  998.                 default:
  999.                         break;
  1000.                 }
  1001.  
  1002.         return modes;
  1003. }
  1004.  
  1005. /**
  1006.  * add_detailed_info - get detailed mode info from EDID data
  1007.  * @connector: attached connector
  1008.  * @edid: EDID block to scan
  1009.  * @quirks: quirks to apply
  1010.  *
  1011.  * Some of the detailed timing sections may contain mode information.  Grab
  1012.  * it and add it to the list.
  1013.  */
  1014. static int add_detailed_info(struct drm_connector *connector,
  1015.                              struct edid *edid, u32 quirks)
  1016. {
  1017.         int i, modes = 0;
  1018.  
  1019.         for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  1020.                 struct detailed_timing *timing = &edid->detailed_timings[i];
  1021.                 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
  1022.  
  1023.                 /* In 1.0, only timings are allowed */
  1024.                 if (!timing->pixel_clock && edid->version == 1 &&
  1025.                         edid->revision == 0)
  1026.                                 continue;
  1027.  
  1028.                 modes += add_detailed_modes(connector, timing, edid, quirks,
  1029.                                             preferred);
  1030.         }
  1031.  
  1032.         return modes;
  1033. }
  1034.  
  1035. /**
  1036.  * add_detailed_mode_eedid - get detailed mode info from addtional timing
  1037.  *                      EDID block
  1038.  * @connector: attached connector
  1039.  * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  1040.  * @quirks: quirks to apply
  1041.  *
  1042.  * Some of the detailed timing sections may contain mode information.  Grab
  1043.  * it and add it to the list.
  1044.  */
  1045. static int add_detailed_info_eedid(struct drm_connector *connector,
  1046.                              struct edid *edid, u32 quirks)
  1047. {
  1048.         int i, modes = 0;
  1049.         char *edid_ext = NULL;
  1050.         struct detailed_timing *timing;
  1051.         int edid_ext_num;
  1052.         int start_offset, end_offset;
  1053.         int timing_level;
  1054.  
  1055.         if (edid->version == 1 && edid->revision < 3) {
  1056.                 /* If the EDID version is less than 1.3, there is no
  1057.                  * extension EDID.
  1058.                  */
  1059.                 return 0;
  1060.         }
  1061.         if (!edid->extensions) {
  1062.                 /* if there is no extension EDID, it is unnecessary to
  1063.                  * parse the E-EDID to get detailed info
  1064.                  */
  1065.                 return 0;
  1066.         }
  1067.  
  1068.         /* Chose real EDID extension number */
  1069.         edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  1070.                        MAX_EDID_EXT_NUM : edid->extensions;
  1071.  
  1072.         /* Find CEA extension */
  1073.         for (i = 0; i < edid_ext_num; i++) {
  1074.                 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1075.                 /* This block is CEA extension */
  1076.                 if (edid_ext[0] == 0x02)
  1077.                         break;
  1078.         }
  1079.  
  1080.         if (i == edid_ext_num) {
  1081.                 /* if there is no additional timing EDID block, return */
  1082.                 return 0;
  1083.         }
  1084.  
  1085.         /* Get the start offset of detailed timing block */
  1086.         start_offset = edid_ext[2];
  1087.         if (start_offset == 0) {
  1088.                 /* If the start_offset is zero, it means that neither detailed
  1089.                  * info nor data block exist. In such case it is also
  1090.                  * unnecessary to parse the detailed timing info.
  1091.                  */
  1092.                 return 0;
  1093.         }
  1094.  
  1095.         timing_level = standard_timing_level(edid);
  1096.         end_offset = EDID_LENGTH;
  1097.         end_offset -= sizeof(struct detailed_timing);
  1098.         for (i = start_offset; i < end_offset;
  1099.                         i += sizeof(struct detailed_timing)) {
  1100.                 timing = (struct detailed_timing *)(edid_ext + i);
  1101.                 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
  1102.         }
  1103.  
  1104.         return modes;
  1105. }
  1106.  
  1107. #define DDC_ADDR 0x50
  1108. /**
  1109.  * Get EDID information via I2C.
  1110.  *
  1111.  * \param adapter : i2c device adaptor
  1112.  * \param buf     : EDID data buffer to be filled
  1113.  * \param len     : EDID data buffer length
  1114.  * \return 0 on success or -1 on failure.
  1115.  *
  1116.  * Try to fetch EDID information by calling i2c driver function.
  1117.  */
  1118. int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
  1119.                           unsigned char *buf, int len)
  1120. {
  1121.         unsigned char start = 0x0;
  1122.         struct i2c_msg msgs[] = {
  1123.                 {
  1124.                         .addr   = DDC_ADDR,
  1125.                         .flags  = 0,
  1126.                         .len    = 1,
  1127.                         .buf    = &start,
  1128.                 }, {
  1129.                         .addr   = DDC_ADDR,
  1130.                         .flags  = I2C_M_RD,
  1131.                         .len    = len,
  1132.                         .buf    = buf,
  1133.                 }
  1134.         };
  1135.  
  1136.         if (i2c_transfer(adapter, msgs, 2) == 2)
  1137.                 return 0;
  1138.  
  1139.         return -1;
  1140. }
  1141. EXPORT_SYMBOL(drm_do_probe_ddc_edid);
  1142.  
  1143. static int drm_ddc_read_edid(struct drm_connector *connector,
  1144.                              struct i2c_adapter *adapter,
  1145.                              char *buf, int len)
  1146. {
  1147.         int i;
  1148.  
  1149.         for (i = 0; i < 4; i++) {
  1150.                 if (drm_do_probe_ddc_edid(adapter, buf, len))
  1151.                         return -1;
  1152.                 if (edid_is_valid((struct edid *)buf))
  1153.                         return 0;
  1154.         }
  1155.  
  1156.         /* repeated checksum failures; warn, but carry on */
  1157.                 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1158.                          drm_get_connector_name(connector));
  1159.         return -1;
  1160. }
  1161.  
  1162. /**
  1163.  * drm_get_edid - get EDID data, if available
  1164.  * @connector: connector we're probing
  1165.  * @adapter: i2c adapter to use for DDC
  1166.  *
  1167.  * Poke the given connector's i2c channel to grab EDID data if possible.
  1168.  *
  1169.  * Return edid data or NULL if we couldn't find any.
  1170.  */
  1171. struct edid *drm_get_edid(struct drm_connector *connector,
  1172.                           struct i2c_adapter *adapter)
  1173. {
  1174.         int ret;
  1175.         struct edid *edid;
  1176.  
  1177.         edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
  1178.                        GFP_KERNEL);
  1179.         if (edid == NULL) {
  1180.                 dev_warn(&connector->dev->pdev->dev,
  1181.                          "Failed to allocate EDID\n");
  1182.                 goto end;
  1183.         }
  1184.  
  1185.         /* Read first EDID block */
  1186.         ret = drm_ddc_read_edid(connector, adapter,
  1187.                                 (unsigned char *)edid, EDID_LENGTH);
  1188.         if (ret != 0)
  1189.                 goto clean_up;
  1190.  
  1191.         /* There are EDID extensions to be read */
  1192.         if (edid->extensions != 0) {
  1193.                 int edid_ext_num = edid->extensions;
  1194.  
  1195.                 if (edid_ext_num > MAX_EDID_EXT_NUM) {
  1196.                         dev_warn(&connector->dev->pdev->dev,
  1197.                                  "The number of extension(%d) is "
  1198.                                  "over max (%d), actually read number (%d)\n",
  1199.                                  edid_ext_num, MAX_EDID_EXT_NUM,
  1200.                                  MAX_EDID_EXT_NUM);
  1201.                         /* Reset EDID extension number to be read */
  1202.                         edid_ext_num = MAX_EDID_EXT_NUM;
  1203.                 }
  1204.                 /* Read EDID including extensions too */
  1205.                 ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
  1206.                                         EDID_LENGTH * (edid_ext_num + 1));
  1207.                 if (ret != 0)
  1208.                         goto clean_up;
  1209.  
  1210.         }
  1211.  
  1212.         connector->display_info.raw_edid = (char *)edid;
  1213.         goto end;
  1214.  
  1215. clean_up:
  1216.         kfree(edid);
  1217.         edid = NULL;
  1218. end:
  1219.         return edid;
  1220.  
  1221. }
  1222. EXPORT_SYMBOL(drm_get_edid);
  1223.  
  1224. #define HDMI_IDENTIFIER 0x000C03
  1225. #define VENDOR_BLOCK    0x03
  1226. /**
  1227.  * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1228.  * @edid: monitor EDID information
  1229.  *
  1230.  * Parse the CEA extension according to CEA-861-B.
  1231.  * Return true if HDMI, false if not or unknown.
  1232.  */
  1233. bool drm_detect_hdmi_monitor(struct edid *edid)
  1234. {
  1235.         char *edid_ext = NULL;
  1236.         int i, hdmi_id, edid_ext_num;
  1237.         int start_offset, end_offset;
  1238.         bool is_hdmi = false;
  1239.  
  1240.         /* No EDID or EDID extensions */
  1241.         if (edid == NULL || edid->extensions == 0)
  1242.                 goto end;
  1243.  
  1244.         /* Chose real EDID extension number */
  1245.         edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  1246.                        MAX_EDID_EXT_NUM : edid->extensions;
  1247.  
  1248.         /* Find CEA extension */
  1249.         for (i = 0; i < edid_ext_num; i++) {
  1250.                 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1251.                 /* This block is CEA extension */
  1252.                 if (edid_ext[0] == 0x02)
  1253.                         break;
  1254.         }
  1255.  
  1256.         if (i == edid_ext_num)
  1257.                 goto end;
  1258.  
  1259.         /* Data block offset in CEA extension block */
  1260.         start_offset = 4;
  1261.         end_offset = edid_ext[2];
  1262.  
  1263.         /*
  1264.          * Because HDMI identifier is in Vendor Specific Block,
  1265.          * search it from all data blocks of CEA extension.
  1266.          */
  1267.         for (i = start_offset; i < end_offset;
  1268.                 /* Increased by data block len */
  1269.                 i += ((edid_ext[i] & 0x1f) + 1)) {
  1270.                 /* Find vendor specific block */
  1271.                 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1272.                         hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1273.                                   edid_ext[i + 3] << 16;
  1274.                         /* Find HDMI identifier */
  1275.                         if (hdmi_id == HDMI_IDENTIFIER)
  1276.                                 is_hdmi = true;
  1277.                         break;
  1278.                 }
  1279.         }
  1280.  
  1281. end:
  1282.         return is_hdmi;
  1283. }
  1284. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1285.  
  1286. /**
  1287.  * drm_add_edid_modes - add modes from EDID data, if available
  1288.  * @connector: connector we're probing
  1289.  * @edid: edid data
  1290.  *
  1291.  * Add the specified modes to the connector's mode list.
  1292.  *
  1293.  * Return number of modes added or 0 if we couldn't find any.
  1294.  */
  1295. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1296. {
  1297.         int num_modes = 0;
  1298.         u32 quirks;
  1299.  
  1300.         if (edid == NULL) {
  1301.                 return 0;
  1302.         }
  1303.         if (!edid_is_valid(edid)) {
  1304.                 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1305.                          drm_get_connector_name(connector));
  1306.                 return 0;
  1307.         }
  1308.  
  1309.         quirks = edid_get_quirks(edid);
  1310.  
  1311.         num_modes += add_established_modes(connector, edid);
  1312.         num_modes += add_standard_modes(connector, edid);
  1313.         num_modes += add_detailed_info(connector, edid, quirks);
  1314.         num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1315.  
  1316.         if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1317.                 edid_fixup_preferred(connector, quirks);
  1318.  
  1319.         connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1320.         connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1321.         connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1322.         connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1323.         connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1324.         connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1325.         connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1326.         connector->display_info.width_mm = edid->width_cm * 10;
  1327.         connector->display_info.height_mm = edid->height_cm * 10;
  1328.         connector->display_info.gamma = edid->gamma;
  1329.         connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1330.         connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1331.         connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1332.         connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1333.         connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1334.         connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1335.         connector->display_info.gamma = edid->gamma;
  1336.  
  1337.         return num_modes;
  1338. }
  1339. EXPORT_SYMBOL(drm_add_edid_modes);
  1340.  
  1341. /**
  1342.  * drm_add_modes_noedid - add modes for the connectors without EDID
  1343.  * @connector: connector we're probing
  1344.  * @hdisplay: the horizontal display limit
  1345.  * @vdisplay: the vertical display limit
  1346.  *
  1347.  * Add the specified modes to the connector's mode list. Only when the
  1348.  * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1349.  *
  1350.  * Return number of modes added or 0 if we couldn't find any.
  1351.  */
  1352. int drm_add_modes_noedid(struct drm_connector *connector,
  1353.                         int hdisplay, int vdisplay)
  1354. {
  1355.         int i, count, num_modes = 0;
  1356.         struct drm_display_mode *mode, *ptr;
  1357.         struct drm_device *dev = connector->dev;
  1358.  
  1359.         count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1360.         if (hdisplay < 0)
  1361.                 hdisplay = 0;
  1362.         if (vdisplay < 0)
  1363.                 vdisplay = 0;
  1364.  
  1365.         for (i = 0; i < count; i++) {
  1366.                 ptr = &drm_dmt_modes[i];
  1367.                 if (hdisplay && vdisplay) {
  1368.                         /*
  1369.                          * Only when two are valid, they will be used to check
  1370.                          * whether the mode should be added to the mode list of
  1371.                          * the connector.
  1372.                          */
  1373.                         if (ptr->hdisplay > hdisplay ||
  1374.                                         ptr->vdisplay > vdisplay)
  1375.                                 continue;
  1376.                 }
  1377.                 if (drm_mode_vrefresh(ptr) > 61)
  1378.                         continue;
  1379.                 mode = drm_mode_duplicate(dev, ptr);
  1380.                 if (mode) {
  1381.                         drm_mode_probed_add(connector, mode);
  1382.                         num_modes++;
  1383.                 }
  1384.         }
  1385.         return num_modes;
  1386. }
  1387. EXPORT_SYMBOL(drm_add_modes_noedid);
  1388.