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  1. /**************************************************************************
  2.  *
  3.  * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
  4.  * All Rights Reserved.
  5.  *
  6.  * Permission is hereby granted, free of charge, to any person obtaining a
  7.  * copy of this software and associated documentation files (the
  8.  * "Software"), to deal in the Software without restriction, including
  9.  * without limitation the rights to use, copy, modify, merge, publish,
  10.  * distribute, sub license, and/or sell copies of the Software, and to
  11.  * permit persons to whom the Software is furnished to do so, subject to
  12.  * the following conditions:
  13.  *
  14.  * The above copyright notice and this permission notice (including the
  15.  * next paragraph) shall be included in all copies or substantial portions
  16.  * of the Software.
  17.  *
  18.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21.  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22.  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23.  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24.  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25.  *
  26.  **************************************************************************/
  27. /*
  28.  * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  29.  */
  30.  
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33.  
  34. extern int x86_clflush_size;
  35.  
  36. #if defined(CONFIG_X86)
  37.  
  38. /*
  39.  * clflushopt is an unordered instruction which needs fencing with mfence or
  40.  * sfence to avoid ordering issues.  For drm_clflush_page this fencing happens
  41.  * in the caller.
  42.  */
  43. static void
  44. drm_clflush_page(struct page *page)
  45. {
  46.         uint8_t *page_virtual;
  47.         unsigned int i;
  48.         const int size = boot_cpu_data.x86_clflush_size;
  49.  
  50.         if (unlikely(page == NULL))
  51.                 return;
  52.  
  53.         page_virtual = kmap_atomic(page);
  54.         for (i = 0; i < PAGE_SIZE; i += size)
  55.                 clflush(page_virtual + i);
  56.         kunmap_atomic(page_virtual);
  57. }
  58.  
  59. static void drm_cache_flush_clflush(struct page *pages[],
  60.                                     unsigned long num_pages)
  61. {
  62.         unsigned long i;
  63.  
  64.         mb();
  65.         for (i = 0; i < num_pages; i++)
  66.                 drm_clflush_page(*pages++);
  67.         mb();
  68. }
  69. #endif
  70.  
  71. void
  72. drm_clflush_pages(struct page *pages[], unsigned long num_pages)
  73. {
  74.  
  75. #if defined(CONFIG_X86)
  76.         drm_cache_flush_clflush(pages, num_pages);
  77.         return;
  78.  
  79. #elif defined(__powerpc__)
  80.         unsigned long i;
  81.         for (i = 0; i < num_pages; i++) {
  82.                 struct page *page = pages[i];
  83.                 void *page_virtual;
  84.  
  85.                 if (unlikely(page == NULL))
  86.                         continue;
  87.  
  88.                 page_virtual = kmap_atomic(page);
  89.                 flush_dcache_range((unsigned long)page_virtual,
  90.                                    (unsigned long)page_virtual + PAGE_SIZE);
  91.                 kunmap_atomic(page_virtual);
  92.         }
  93. #else
  94.         printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  95.         WARN_ON_ONCE(1);
  96. #endif
  97. }
  98. EXPORT_SYMBOL(drm_clflush_pages);
  99.  
  100. void
  101. drm_clflush_sg(struct sg_table *st)
  102. {
  103. #if defined(CONFIG_X86)
  104.         if (cpu_has_clflush) {
  105.                 struct sg_page_iter sg_iter;
  106.  
  107.                 mb();
  108.                 for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
  109.                         drm_clflush_page(sg_page_iter_page(&sg_iter));
  110.                 mb();
  111.  
  112.                 return;
  113.         }
  114.  
  115.         if (wbinvd_on_all_cpus())
  116.                 printk(KERN_ERR "Timed out waiting for cache flush.\n");
  117. #else
  118.         printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  119.         WARN_ON_ONCE(1);
  120. #endif
  121. }
  122. EXPORT_SYMBOL(drm_clflush_sg);
  123.  
  124. void
  125. drm_clflush_virt_range(void *addr, unsigned long length)
  126. {
  127. #if defined(CONFIG_X86)
  128.         if (1) {
  129.                 const int size = x86_clflush_size;
  130.                 void *end = addr + length;
  131.                 addr = (void *)(((unsigned long)addr) & -size);
  132.                 mb();
  133.                 for (; addr < end; addr += size)
  134.                         clflush(addr);
  135.                 mb();
  136.                 return;
  137.         }
  138.  
  139. #else
  140.         printk(KERN_ERR "Architecture has no drm_cache.c support\n");
  141.         WARN_ON_ONCE(1);
  142. #endif
  143. }
  144. EXPORT_SYMBOL(drm_clflush_virt_range);
  145.