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  1. /*
  2.  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  3.  * All Rights Reserved.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  */
  26. #ifndef _I915_DRM_H_
  27. #define _I915_DRM_H_
  28.  
  29. #include <drm/i915_pciids.h>
  30. #include <uapi/drm/i915_drm.h>
  31.  
  32. /* For use by IPS driver */
  33. extern unsigned long i915_read_mch_val(void);
  34. extern bool i915_gpu_raise(void);
  35. extern bool i915_gpu_lower(void);
  36. extern bool i915_gpu_busy(void);
  37. extern bool i915_gpu_turbo_disable(void);
  38.  
  39. /*
  40.  * The Bridge device's PCI config space has information about the
  41.  * fb aperture size and the amount of pre-reserved memory.
  42.  * This is all handled in the intel-gtt.ko module. i915.ko only
  43.  * cares about the vga bit for the vga rbiter.
  44.  */
  45. #define INTEL_GMCH_CTRL         0x52
  46. #define INTEL_GMCH_VGA_DISABLE  (1 << 1)
  47. #define SNB_GMCH_CTRL           0x50
  48. #define    SNB_GMCH_GGMS_SHIFT  8 /* GTT Graphics Memory Size */
  49. #define    SNB_GMCH_GGMS_MASK   0x3
  50. #define    SNB_GMCH_GMS_SHIFT   3 /* Graphics Mode Select */
  51. #define    SNB_GMCH_GMS_MASK    0x1f
  52.  
  53. #define I830_GMCH_CTRL                  0x52
  54.  
  55. #define I855_GMCH_GMS_MASK              0xF0
  56. #define I855_GMCH_GMS_STOLEN_0M         0x0
  57. #define I855_GMCH_GMS_STOLEN_1M         (0x1 << 4)
  58. #define I855_GMCH_GMS_STOLEN_4M         (0x2 << 4)
  59. #define I855_GMCH_GMS_STOLEN_8M         (0x3 << 4)
  60. #define I855_GMCH_GMS_STOLEN_16M        (0x4 << 4)
  61. #define I855_GMCH_GMS_STOLEN_32M        (0x5 << 4)
  62. #define I915_GMCH_GMS_STOLEN_48M        (0x6 << 4)
  63. #define I915_GMCH_GMS_STOLEN_64M        (0x7 << 4)
  64. #define G33_GMCH_GMS_STOLEN_128M        (0x8 << 4)
  65. #define G33_GMCH_GMS_STOLEN_256M        (0x9 << 4)
  66. #define INTEL_GMCH_GMS_STOLEN_96M       (0xa << 4)
  67. #define INTEL_GMCH_GMS_STOLEN_160M      (0xb << 4)
  68. #define INTEL_GMCH_GMS_STOLEN_224M      (0xc << 4)
  69. #define INTEL_GMCH_GMS_STOLEN_352M      (0xd << 4)
  70.  
  71. #endif                          /* _I915_DRM_H_ */
  72.