Subversion Repositories Kolibri OS

Rev

Go to most recent revision | Blame | Compare with Previous | Last modification | View Log | RSS feed

  1. /* Interface definition for configurable Xtensa ISA support.
  2.    Copyright 2003, 2004, 2005, 2006, 2008, 2010 Free Software Foundation, Inc.
  3.  
  4.    This file is part of BFD, the Binary File Descriptor library.
  5.  
  6.    This program is free software; you can redistribute it and/or modify
  7.    it under the terms of the GNU General Public License as published by
  8.    the Free Software Foundation; either version 3 of the License, or
  9.    (at your option) any later version.
  10.  
  11.    This program is distributed in the hope that it will be useful,
  12.    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13.    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14.    GNU General Public License for more details.
  15.  
  16.    You should have received a copy of the GNU General Public License
  17.    along with this program; if not, write to the Free Software
  18.    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
  19.    USA.  */
  20.  
  21. #ifndef XTENSA_LIBISA_H
  22. #define XTENSA_LIBISA_H
  23.  
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27.  
  28. /* Version number: This is intended to help support code that works with
  29.    versions of this library from multiple Xtensa releases.  */
  30.  
  31. #define XTENSA_ISA_VERSION 7000
  32.  
  33. #ifndef uint32
  34. #define uint32 unsigned int
  35. #endif
  36.  
  37. /* This file defines the interface to the Xtensa ISA library.  This
  38.    library contains most of the ISA-specific information for a
  39.    particular Xtensa processor.  For example, the set of valid
  40.    instructions, their opcode encodings and operand fields are all
  41.    included here.
  42.  
  43.    This interface basically defines a number of abstract data types.
  44.  
  45.    . an instruction buffer - for holding the raw instruction bits
  46.    . ISA info - information about the ISA as a whole
  47.    . instruction formats - instruction size and slot structure
  48.    . opcodes - information about individual instructions
  49.    . operands - information about register and immediate instruction operands
  50.    . stateOperands - information about processor state instruction operands
  51.    . interfaceOperands - information about interface instruction operands
  52.    . register files - register file information
  53.    . processor states - internal processor state information
  54.    . system registers - "special registers" and "user registers"
  55.    . interfaces - TIE interfaces that are external to the processor
  56.    . functional units - TIE shared functions
  57.  
  58.    The interface defines a set of functions to access each data type.
  59.    With the exception of the instruction buffer, the internal
  60.    representations of the data structures are hidden.  All accesses must
  61.    be made through the functions defined here.  */
  62.  
  63. typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
  64.  
  65.  
  66. /* Most of the Xtensa ISA entities (e.g., opcodes, regfiles, etc.) are
  67.    represented here using sequential integers beginning with 0.  The
  68.    specific values are only fixed for a particular instantiation of an
  69.    xtensa_isa structure, so these values should only be used
  70.    internally.  */
  71.  
  72. typedef int xtensa_opcode;
  73. typedef int xtensa_format;
  74. typedef int xtensa_regfile;
  75. typedef int xtensa_state;
  76. typedef int xtensa_sysreg;
  77. typedef int xtensa_interface;
  78. typedef int xtensa_funcUnit;
  79.  
  80.  
  81. /* Define a unique value for undefined items.  */
  82.  
  83. #define XTENSA_UNDEFINED -1
  84.  
  85.  
  86. /* Overview of using this interface to decode/encode instructions:
  87.  
  88.    Each Xtensa instruction is associated with a particular instruction
  89.    format, where the format defines a fixed number of slots for
  90.    operations.  The formats for the core Xtensa ISA have only one slot,
  91.    but FLIX instructions may have multiple slots.  Within each slot,
  92.    there is a single opcode and some number of associated operands.
  93.  
  94.    The encoding and decoding functions operate on instruction buffers,
  95.    not on the raw bytes of the instructions.  The same instruction
  96.    buffer data structure is used for both entire instructions and
  97.    individual slots in those instructions -- the contents of a slot need
  98.    to be extracted from or inserted into the buffer for the instruction
  99.    as a whole.
  100.  
  101.    Decoding an instruction involves first finding the format, which
  102.    identifies the number of slots, and then decoding each slot
  103.    separately.  A slot is decoded by finding the opcode and then using
  104.    the opcode to determine how many operands there are.  For example:
  105.  
  106.    xtensa_insnbuf_from_chars
  107.    xtensa_format_decode
  108.    for each slot {
  109.      xtensa_format_get_slot
  110.      xtensa_opcode_decode
  111.      for each operand {
  112.        xtensa_operand_get_field
  113.        xtensa_operand_decode
  114.      }
  115.    }
  116.  
  117.    Encoding an instruction is roughly the same procedure in reverse:
  118.  
  119.    xtensa_format_encode
  120.    for each slot {
  121.      xtensa_opcode_encode
  122.      for each operand {
  123.        xtensa_operand_encode
  124.        xtensa_operand_set_field
  125.      }
  126.      xtensa_format_set_slot
  127.    }
  128.    xtensa_insnbuf_to_chars
  129. */
  130.  
  131. /* Error handling.  */
  132.  
  133. /* Error codes.  The code for the most recent error condition can be
  134.    retrieved with the "errno" function.  For any result other than
  135.    xtensa_isa_ok, an error message containing additional information
  136.    about the problem can be retrieved using the "error_msg" function.
  137.    The error messages are stored in an internal buffer, which should
  138.    not be freed and may be overwritten by subsequent operations.  */
  139.  
  140. typedef enum xtensa_isa_status_enum
  141. {
  142.   xtensa_isa_ok = 0,
  143.   xtensa_isa_bad_format,
  144.   xtensa_isa_bad_slot,
  145.   xtensa_isa_bad_opcode,
  146.   xtensa_isa_bad_operand,
  147.   xtensa_isa_bad_field,
  148.   xtensa_isa_bad_iclass,
  149.   xtensa_isa_bad_regfile,
  150.   xtensa_isa_bad_sysreg,
  151.   xtensa_isa_bad_state,
  152.   xtensa_isa_bad_interface,
  153.   xtensa_isa_bad_funcUnit,
  154.   xtensa_isa_wrong_slot,
  155.   xtensa_isa_no_field,
  156.   xtensa_isa_out_of_memory,
  157.   xtensa_isa_buffer_overflow,
  158.   xtensa_isa_internal_error,
  159.   xtensa_isa_bad_value
  160. } xtensa_isa_status;
  161.  
  162. extern xtensa_isa_status
  163. xtensa_isa_errno (xtensa_isa isa);
  164.  
  165. extern char *
  166. xtensa_isa_error_msg (xtensa_isa isa);
  167.  
  168.  
  169. /* Instruction buffers.  */
  170.  
  171. typedef uint32 xtensa_insnbuf_word;
  172. typedef xtensa_insnbuf_word *xtensa_insnbuf;
  173.  
  174.  
  175. /* Get the size in "insnbuf_words" of the xtensa_insnbuf array.  */
  176.  
  177. extern int
  178. xtensa_insnbuf_size (xtensa_isa isa);
  179.  
  180.  
  181. /* Allocate an xtensa_insnbuf of the right size.  */
  182.  
  183. extern xtensa_insnbuf
  184. xtensa_insnbuf_alloc (xtensa_isa isa);
  185.  
  186.  
  187. /* Release an xtensa_insnbuf.  */
  188.  
  189. extern void
  190. xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
  191.  
  192.  
  193. /* Conversion between raw memory (char arrays) and our internal
  194.    instruction representation.  This is complicated by the Xtensa ISA's
  195.    variable instruction lengths.  When converting to chars, the buffer
  196.    must contain a valid instruction so we know how many bytes to copy;
  197.    thus, the "to_chars" function returns the number of bytes copied or
  198.    XTENSA_UNDEFINED on error.  The "from_chars" function first reads the
  199.    minimal number of bytes required to decode the instruction length and
  200.    then proceeds to copy the entire instruction into the buffer; if the
  201.    memory does not contain a valid instruction, it copies the maximum
  202.    number of bytes required for the longest Xtensa instruction.  The
  203.    "num_chars" argument may be used to limit the number of bytes that
  204.    can be read or written.  Otherwise, if "num_chars" is zero, the
  205.    functions may read or write past the end of the code.  */
  206.  
  207. extern int
  208. xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
  209.                          unsigned char *cp, int num_chars);
  210.  
  211. extern void
  212. xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
  213.                            const unsigned char *cp, int num_chars);
  214.  
  215.  
  216. /* ISA information.  */
  217.  
  218. /* Initialize the ISA information.  */
  219.  
  220. extern xtensa_isa
  221. xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
  222.  
  223.  
  224. /* Deallocate an xtensa_isa structure.  */
  225.  
  226. extern void
  227. xtensa_isa_free (xtensa_isa isa);
  228.  
  229.  
  230. /* Get the maximum instruction size in bytes.  */
  231.  
  232. extern int
  233. xtensa_isa_maxlength (xtensa_isa isa);
  234.  
  235.  
  236. /* Decode the length in bytes of an instruction in raw memory (not an
  237.    insnbuf).  This function reads only the minimal number of bytes
  238.    required to decode the instruction length.  Returns
  239.    XTENSA_UNDEFINED on error.  */
  240.  
  241. extern int
  242. xtensa_isa_length_from_chars (xtensa_isa isa, const unsigned char *cp);
  243.  
  244.  
  245. /* Get the number of stages in the processor's pipeline.  The pipeline
  246.    stage values returned by other functions in this library will range
  247.    from 0 to N-1, where N is the value returned by this function.
  248.    Note that the stage numbers used here may not correspond to the
  249.    actual processor hardware, e.g., the hardware may have additional
  250.    stages before stage 0.  Returns XTENSA_UNDEFINED on error.  */
  251.  
  252. extern int
  253. xtensa_isa_num_pipe_stages (xtensa_isa isa);
  254.  
  255.  
  256. /* Get the number of various entities that are defined for this processor.  */
  257.  
  258. extern int
  259. xtensa_isa_num_formats (xtensa_isa isa);
  260.  
  261. extern int
  262. xtensa_isa_num_opcodes (xtensa_isa isa);
  263.  
  264. extern int
  265. xtensa_isa_num_regfiles (xtensa_isa isa);
  266.  
  267. extern int
  268. xtensa_isa_num_states (xtensa_isa isa);
  269.  
  270. extern int
  271. xtensa_isa_num_sysregs (xtensa_isa isa);
  272.  
  273. extern int
  274. xtensa_isa_num_interfaces (xtensa_isa isa);
  275.  
  276. extern int
  277. xtensa_isa_num_funcUnits (xtensa_isa isa);
  278.  
  279.  
  280. /* Instruction formats.  */
  281.  
  282. /* Get the name of a format.  Returns null on error.  */
  283.  
  284. extern const char *
  285. xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
  286.  
  287.  
  288. /* Given a format name, return the format number.  Returns
  289.    XTENSA_UNDEFINED if the name is not a valid format.  */
  290.  
  291. extern xtensa_format
  292. xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
  293.  
  294.  
  295. /* Decode the instruction format from a binary instruction buffer.
  296.    Returns XTENSA_UNDEFINED if the format is not recognized.  */
  297.  
  298. extern xtensa_format
  299. xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
  300.  
  301.  
  302. /* Set the instruction format field(s) in a binary instruction buffer.
  303.    All the other fields are set to zero.  Returns non-zero on error.  */
  304.  
  305. extern int
  306. xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
  307.  
  308.  
  309. /* Find the length (in bytes) of an instruction.  Returns
  310.    XTENSA_UNDEFINED on error.  */
  311.  
  312. extern int
  313. xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
  314.  
  315.  
  316. /* Get the number of slots in an instruction.  Returns XTENSA_UNDEFINED
  317.    on error.  */
  318.  
  319. extern int
  320. xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
  321.  
  322.  
  323. /* Get the opcode for a no-op in a particular slot.
  324.    Returns XTENSA_UNDEFINED on error.  */
  325.  
  326. extern xtensa_opcode
  327. xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
  328.  
  329.  
  330. /* Get the bits for a specified slot out of an insnbuf for the
  331.    instruction as a whole and put them into an insnbuf for that one
  332.    slot, and do the opposite to set a slot.  Return non-zero on error.  */
  333.  
  334. extern int
  335. xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
  336.                         const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
  337.  
  338. extern int
  339. xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
  340.                         xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
  341.  
  342.  
  343. /* Opcode information.  */
  344.  
  345. /* Translate a mnemonic name to an opcode.  Returns XTENSA_UNDEFINED if
  346.    the name is not a valid opcode mnemonic.  */
  347.  
  348. extern xtensa_opcode
  349. xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
  350.  
  351.  
  352. /* Decode the opcode for one instruction slot from a binary instruction
  353.    buffer.  Returns the opcode or XTENSA_UNDEFINED if the opcode is
  354.    illegal.  */
  355.  
  356. extern xtensa_opcode
  357. xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
  358.                       const xtensa_insnbuf slotbuf);
  359.  
  360.  
  361. /* Set the opcode field(s) for an instruction slot.  All other fields
  362.    in the slot are set to zero.  Returns non-zero if the opcode cannot
  363.    be encoded.  */
  364.  
  365. extern int
  366. xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
  367.                       xtensa_insnbuf slotbuf, xtensa_opcode opc);
  368.  
  369.  
  370. /* Get the mnemonic name for an opcode.  Returns null on error.  */
  371.  
  372. extern const char *
  373. xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
  374.  
  375.  
  376. /* Check various properties of opcodes.  These functions return 0 if
  377.    the condition is false, 1 if the condition is true, and
  378.    XTENSA_UNDEFINED on error.  The instructions are classified as
  379.    follows:
  380.  
  381.    branch: conditional branch; may fall through to next instruction (B*)
  382.    jump: unconditional branch (J, JX, RET*, RF*)
  383.    loop: zero-overhead loop (LOOP*)
  384.    call: unconditional call; control returns to next instruction (CALL*)
  385.  
  386.    For the opcodes that affect control flow in some way, the branch
  387.    target may be specified by an immediate operand or it may be an
  388.    address stored in a register.  You can distinguish these by
  389.    checking if the instruction has a PC-relative immediate
  390.    operand.  */
  391.  
  392. extern int
  393. xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
  394.  
  395. extern int
  396. xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
  397.  
  398. extern int
  399. xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
  400.  
  401. extern int
  402. xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
  403.  
  404.  
  405. /* Find the number of ordinary operands, state operands, and interface
  406.    operands for an instruction.  These return XTENSA_UNDEFINED on
  407.    error.  */
  408.  
  409. extern int
  410. xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
  411.  
  412. extern int
  413. xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
  414.  
  415. extern int
  416. xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
  417.  
  418.  
  419. /* Get functional unit usage requirements for an opcode.  Each "use"
  420.    is identified by a <functional unit, pipeline stage> pair.  The
  421.    "num_funcUnit_uses" function returns the number of these "uses" or
  422.    XTENSA_UNDEFINED on error.  The "funcUnit_use" function returns
  423.    a pointer to a "use" pair or null on error.  */
  424.  
  425. typedef struct xtensa_funcUnit_use_struct
  426. {
  427.   xtensa_funcUnit unit;
  428.   int stage;
  429. } xtensa_funcUnit_use;
  430.  
  431. extern int
  432. xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
  433.  
  434. extern xtensa_funcUnit_use *
  435. xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
  436.  
  437.  
  438. /* Operand information.  */
  439.  
  440. /* Get the name of an operand.  Returns null on error.  */
  441.  
  442. extern const char *
  443. xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
  444.  
  445.  
  446. /* Some operands are "invisible", i.e., not explicitly specified in
  447.    assembly language.  When assembling an instruction, you need not set
  448.    the values of invisible operands, since they are either hardwired or
  449.    derived from other field values.  The values of invisible operands
  450.    can be examined in the same way as other operands, but remember that
  451.    an invisible operand may get its value from another visible one, so
  452.    the entire instruction must be available before examining the
  453.    invisible operand values.  This function returns 1 if an operand is
  454.    visible, 0 if it is invisible, or XTENSA_UNDEFINED on error.  Note
  455.    that whether an operand is visible is orthogonal to whether it is
  456.    "implicit", i.e., whether it is encoded in a field in the
  457.    instruction.  */
  458.  
  459. extern int
  460. xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
  461.  
  462.  
  463. /* Check if an operand is an input ('i'), output ('o'), or inout ('m')
  464.    operand.  Note: The output operand of a conditional assignment
  465.    (e.g., movnez) appears here as an inout ('m') even if it is declared
  466.    in the TIE code as an output ('o'); this allows the compiler to
  467.    properly handle register allocation for conditional assignments.
  468.    Returns 0 on error.  */
  469.  
  470. extern char
  471. xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
  472.  
  473.  
  474. /* Get and set the raw (encoded) value of the field for the specified
  475.    operand.  The "set" function does not check if the value fits in the
  476.    field; that is done by the "encode" function below.  Both of these
  477.    functions return non-zero on error, e.g., if the field is not defined
  478.    for the specified slot.  */
  479.  
  480. extern int
  481. xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
  482.                           xtensa_format fmt, int slot,
  483.                           const xtensa_insnbuf slotbuf, uint32 *valp);
  484.  
  485. extern int
  486. xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
  487.                           xtensa_format fmt, int slot,
  488.                           xtensa_insnbuf slotbuf, uint32 val);
  489.  
  490.  
  491. /* Encode and decode operands.  The raw bits in the operand field may
  492.    be encoded in a variety of different ways.  These functions hide
  493.    the details of that encoding.  The result values are returned through
  494.    the argument pointer.  The return value is non-zero on error.  */
  495.  
  496. extern int
  497. xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
  498.                        uint32 *valp);
  499.  
  500. extern int
  501. xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
  502.                        uint32 *valp);
  503.  
  504.  
  505. /* An operand may be either a register operand or an immediate of some
  506.    sort (e.g., PC-relative or not).  The "is_register" function returns
  507.    0 if the operand is an immediate, 1 if it is a register, and
  508.    XTENSA_UNDEFINED on error.  The "regfile" function returns the
  509.    regfile for a register operand, or XTENSA_UNDEFINED on error.  */
  510.  
  511. extern int
  512. xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
  513.  
  514. extern xtensa_regfile
  515. xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
  516.  
  517.  
  518. /* Register operands may span multiple consecutive registers, e.g., a
  519.    64-bit data type may occupy two 32-bit registers.  Only the first
  520.    register is encoded in the operand field.  This function specifies
  521.    the number of consecutive registers occupied by this operand.  For
  522.    non-register operands, the return value is undefined.  Returns
  523.    XTENSA_UNDEFINED on error.  */
  524.  
  525. extern int
  526. xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
  527.                                  
  528.  
  529. /* Some register operands do not completely identify the register being
  530.    accessed.  For example, the operand value may be added to an internal
  531.    state value.  By definition, this implies that the corresponding
  532.    regfile is not allocatable.  Unknown registers should generally be
  533.    treated with worst-case assumptions.  The function returns 0 if the
  534.    register value is unknown, 1 if known, and XTENSA_UNDEFINED on
  535.    error.  */
  536.  
  537. extern int
  538. xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
  539.  
  540.  
  541. /* Check if an immediate operand is PC-relative.  Returns 0 for register
  542.    operands and non-PC-relative immediates, 1 for PC-relative
  543.    immediates, and XTENSA_UNDEFINED on error.  */
  544.  
  545. extern int
  546. xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
  547.  
  548.  
  549. /* For PC-relative offset operands, the interpretation of the offset may
  550.    vary between opcodes, e.g., is it relative to the current PC or that
  551.    of the next instruction?  The following functions are defined to
  552.    perform PC-relative relocations and to undo them (as in the
  553.    disassembler).  The "do_reloc" function takes the desired address
  554.    value and the PC of the current instruction and sets the value to the
  555.    corresponding PC-relative offset (which can then be encoded and
  556.    stored into the operand field).  The "undo_reloc" function takes the
  557.    unencoded offset value and the current PC and sets the value to the
  558.    appropriate address.  The return values are non-zero on error.  Note
  559.    that these functions do not replace the encode/decode functions; the
  560.    operands must be encoded/decoded separately and the encode functions
  561.    are responsible for detecting invalid operand values.  */
  562.  
  563. extern int
  564. xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
  565.                          uint32 *valp, uint32 pc);
  566.  
  567. extern int
  568. xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
  569.                            uint32 *valp, uint32 pc);
  570.  
  571.  
  572. /* State Operands.  */
  573.  
  574. /* Get the state accessed by a state operand.  Returns XTENSA_UNDEFINED
  575.    on error.  */
  576.  
  577. extern xtensa_state
  578. xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
  579.  
  580.  
  581. /* Check if a state operand is an input ('i'), output ('o'), or inout
  582.    ('m') operand.  Returns 0 on error.  */
  583.  
  584. extern char
  585. xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
  586.  
  587.  
  588. /* Interface Operands.  */
  589.  
  590. /* Get the external interface accessed by an interface operand.
  591.    Returns XTENSA_UNDEFINED on error.  */
  592.  
  593. extern xtensa_interface
  594. xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
  595.                                    int ifOp);
  596.  
  597.  
  598. /* Register Files.  */
  599.  
  600. /* Regfiles include both "real" regfiles and "views", where a view
  601.    allows a group of adjacent registers in a real "parent" regfile to be
  602.    viewed as a single register.  A regfile view has all the same
  603.    properties as its parent except for its (long) name, bit width, number
  604.    of entries, and default ctype.  You can use the parent function to
  605.    distinguish these two classes.  */
  606.  
  607. /* Look up a regfile by either its name or its abbreviated "short name".
  608.    Returns XTENSA_UNDEFINED on error.  The "lookup_shortname" function
  609.    ignores "view" regfiles since they always have the same shortname as
  610.    their parents.  */
  611.  
  612. extern xtensa_regfile
  613. xtensa_regfile_lookup (xtensa_isa isa, const char *name);
  614.  
  615. extern xtensa_regfile
  616. xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
  617.  
  618.  
  619. /* Get the name or abbreviated "short name" of a regfile.
  620.    Returns null on error.  */
  621.  
  622. extern const char *
  623. xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
  624.  
  625. extern const char *
  626. xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
  627.  
  628.  
  629. /* Get the parent regfile of a "view" regfile.  If the regfile is not a
  630.    view, the result is the same as the input parameter.  Returns
  631.    XTENSA_UNDEFINED on error.  */
  632.  
  633. extern xtensa_regfile
  634. xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
  635.  
  636.  
  637. /* Get the bit width of a regfile or regfile view.
  638.    Returns XTENSA_UNDEFINED on error.  */
  639.  
  640. extern int
  641. xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
  642.  
  643.  
  644. /* Get the number of regfile entries.  Returns XTENSA_UNDEFINED on
  645.    error.  */
  646.  
  647. extern int
  648. xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
  649.  
  650.  
  651. /* Processor States.  */
  652.  
  653. /* Look up a state by name.  Returns XTENSA_UNDEFINED on error.  */
  654.  
  655. extern xtensa_state
  656. xtensa_state_lookup (xtensa_isa isa, const char *name);
  657.  
  658.  
  659. /* Get the name for a processor state.  Returns null on error.  */
  660.  
  661. extern const char *
  662. xtensa_state_name (xtensa_isa isa, xtensa_state st);
  663.  
  664.  
  665. /* Get the bit width for a processor state.
  666.    Returns XTENSA_UNDEFINED on error.  */
  667.  
  668. extern int
  669. xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
  670.  
  671.  
  672. /* Check if a state is exported from the processor core.  Returns 0 if
  673.    the condition is false, 1 if the condition is true, and
  674.    XTENSA_UNDEFINED on error.  */
  675.  
  676. extern int
  677. xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
  678.  
  679.  
  680. /* Check for a "shared_or" state.  Returns 0 if the condition is false,
  681.    1 if the condition is true, and XTENSA_UNDEFINED on error.  */
  682.  
  683. extern int
  684. xtensa_state_is_shared_or (xtensa_isa isa, xtensa_state st);
  685.  
  686.  
  687. /* Sysregs ("special registers" and "user registers").  */
  688.  
  689. /* Look up a register by its number and whether it is a "user register"
  690.    or a "special register".  Returns XTENSA_UNDEFINED if the sysreg does
  691.    not exist.  */
  692.  
  693. extern xtensa_sysreg
  694. xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
  695.  
  696.  
  697. /* Check if there exists a sysreg with a given name.
  698.    If not, this function returns XTENSA_UNDEFINED.  */
  699.  
  700. extern xtensa_sysreg
  701. xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
  702.  
  703.  
  704. /* Get the name of a sysreg.  Returns null on error.  */
  705.  
  706. extern const char *
  707. xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
  708.  
  709.  
  710. /* Get the register number.  Returns XTENSA_UNDEFINED on error.  */
  711.  
  712. extern int
  713. xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
  714.  
  715.  
  716. /* Check if a sysreg is a "special register" or a "user register".
  717.    Returns 0 for special registers, 1 for user registers and
  718.    XTENSA_UNDEFINED on error.  */
  719.  
  720. extern int
  721. xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
  722.  
  723.  
  724. /* Interfaces.  */
  725.  
  726. /* Find an interface by name.  The return value is XTENSA_UNDEFINED if
  727.    the specified interface is not found.  */
  728.  
  729. extern xtensa_interface
  730. xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
  731.  
  732.  
  733. /* Get the name of an interface.  Returns null on error.  */
  734.  
  735. extern const char *
  736. xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
  737.  
  738.  
  739. /* Get the bit width for an interface.
  740.    Returns XTENSA_UNDEFINED on error.  */
  741.  
  742. extern int
  743. xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
  744.  
  745.  
  746. /* Check if an interface is an input ('i') or output ('o') with respect
  747.    to the Xtensa processor core.  Returns 0 on error.  */
  748.  
  749. extern char
  750. xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
  751.  
  752.  
  753. /* Check if accessing an interface has potential side effects.
  754.    Currently "data" interfaces have side effects and "control"
  755.    interfaces do not.  Returns 1 if there are side effects, 0 if not,
  756.    and XTENSA_UNDEFINED on error.  */
  757.  
  758. extern int
  759. xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
  760.  
  761.  
  762. /* Some interfaces may be related such that accessing one interface
  763.    has side effects on a set of related interfaces.  The interfaces
  764.    are partitioned into equivalence classes of related interfaces, and
  765.    each class is assigned a unique identifier number.  This function
  766.    returns the class identifier for an interface, or XTENSA_UNDEFINED
  767.    on error.  These identifiers can be compared to determine if two
  768.    interfaces are related; the specific values of the identifiers have
  769.    no particular meaning otherwise.  */
  770.  
  771. extern int
  772. xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf);
  773.  
  774.  
  775. /* Functional Units.  */
  776.  
  777. /* Find a functional unit by name.  The return value is XTENSA_UNDEFINED if
  778.    the specified unit is not found.  */
  779.  
  780. extern xtensa_funcUnit
  781. xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
  782.  
  783.  
  784. /* Get the name of a functional unit.  Returns null on error.  */
  785.  
  786. extern const char *
  787. xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
  788.  
  789.  
  790. /* Functional units may be replicated.  See how many instances of a
  791.    particular function unit exist.  Returns XTENSA_UNDEFINED on error.  */
  792.  
  793. extern int
  794. xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
  795.  
  796.  
  797. #ifdef __cplusplus
  798. }
  799. #endif
  800. #endif /* XTENSA_LIBISA_H */
  801.