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  1. /*
  2.  * Copyright © <2010>, Intel Corporation.
  3.  *
  4.  * This program is licensed under the terms and conditions of the
  5.  * Eclipse Public License (EPL), version 1.0.  The full text of the EPL is at
  6.  * http://www.opensource.org/licenses/eclipse-1.0.php.
  7.  *
  8.  */
  9. // Modual name: IntraFrame_gen8.asm
  10. //
  11. // Make intra predition estimation for Intra frame on Gen8
  12. //
  13.  
  14. //
  15. //  Now, begin source code....
  16. //
  17.  
  18. /*
  19.  * __START
  20.  */
  21. __INTRA_START:
  22. mov  (16) tmp_reg0.0<1>:UD      0x0:UD {align1};
  23. mov  (16) tmp_reg2.0<1>:UD      0x0:UD {align1};
  24. mov  (16) tmp_reg4.0<1>:UD      0x0:UD {align1} ;
  25. mov  (16) tmp_reg6.0<1>:UD      0x0:UD {align1} ;
  26.  
  27. shl  (2) read0_header.0<1>:D    orig_xy_ub<2,2,1>:UB 4:UW {align1};    /* (x, y) * 16 */
  28. add  (1) read0_header.0<1>:D    read0_header.0<0,1,0>:D -8:W {align1};     /* X offset */
  29. add  (1) read0_header.4<1>:D    read0_header.4<0,1,0>:D -1:W {align1};     /* Y offset */
  30. mov  (1) read0_header.8<1>:UD   BLOCK_32X1 {align1};
  31. mov  (1) read0_header.20<1>:UB  thread_id_ub {align1};                  /* dispatch id */
  32.  
  33. shl  (2) read1_header.0<1>:D    orig_xy_ub<2,2,1>:UB 4:UW {align1};    /* (x, y) * 16 */
  34. add  (1) read1_header.0<1>:D    read1_header.0<0,1,0>:D -4:W {align1};     /* X offset */
  35. mov  (1) read1_header.8<1>:UD   BLOCK_4X16 {align1};
  36. mov  (1) read1_header.20<1>:UB  thread_id_ub {align1};                  /* dispatch id */
  37.        
  38. shl  (2) vme_m0.8<1>:UW         orig_xy_ub<2,2,1>:UB 4:UW {align1};    /* (x, y) * 16 */
  39. mov  (1) vme_m0.20<1>:UB        thread_id_ub {align1};                  /* dispatch id */
  40.  
  41. mul  (1) obw_m0.8<1>:UD         w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1};
  42. add  (1) obw_m0.8<1>:UD         obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1};
  43. mul  (1) obw_m0.8<1>:UD         obw_m0.8<0,1,0>:UD 0x02:UD {align1};
  44. mov  (1) obw_m0.20<1>:UB        thread_id_ub {align1};                  /* dispatch id */
  45.        
  46. /*
  47.  * Media Read Message -- fetch Luma neighbor edge pixels
  48.  */
  49. /* ROW */
  50. mov  (8) msg_reg0.0<1>:UD       read0_header.0<8,8,1>:UD {align1};        
  51. send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1};
  52.  
  53. /* COL */
  54. mov  (8) msg_reg0.0<1>:UD       read1_header.0<8,8,1>:UD {align1};                
  55. send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1};
  56.        
  57. /*
  58.  * Media Read Message -- fetch Chroma neighbor edge pixels
  59.  */
  60. /* ROW */
  61. shl  (2) read0_header.0<1>:D    orig_xy_ub<2,2,1>:UB 3:UW {align1};    /* x * 16 , y * 8 */
  62. mul  (1) read0_header.0<1>:D    read0_header.0<0,1,0>:D  2:W {align1};
  63. add  (1) read0_header.0<1>:D    read0_header.0<0,1,0>:D -8:W {align1};     /* X offset */
  64. add  (1) read0_header.4<1>:D    read0_header.4<0,1,0>:D -1:W {align1};     /* Y offset */
  65. mov  (8) msg_reg0.0<1>:UD       read0_header.0<8,8,1>:UD {align1};        
  66. send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
  67.  
  68. /* COL */
  69. shl  (2) read1_header.0<1>:D    orig_xy_ub<2,2,1>:UB 3:UW {align1};    /* x * 16, y * 8 */
  70. mul  (1) read1_header.0<1>:D    read1_header.0<0,1,0>:D  2:W {align1};
  71. add  (1) read1_header.0<1>:D    read1_header.0<0,1,0>:D -4:W {align1};     /* X offset */
  72. mov  (1) read1_header.8<1>:UD   BLOCK_8X4 {align1};
  73. mov  (8) msg_reg0.0<1>:UD       read1_header.0<8,8,1>:UD {align1};                
  74. send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
  75.  
  76. /* m2, get the MV/Mb cost passed by constant buffer
  77. when creating EU thread by MEDIA_OBJECT */      
  78. mov (8) vme_msg_2<1>:UD         r1.0<8,8,1>:UD {align1};
  79.  
  80. /* m3. This is changed for FWD/BWD cost center */
  81. mov (8) vme_msg_3<1>:UD         0x0:UD {align1};               
  82.  
  83. /* m4.*/
  84. mov (8) vme_msg_4<1>:ud         0x0:ud  {align1};
  85.  
  86. /* m5 */
  87. mov  (1) INEP_ROW.0<1>:UD       0x0:UD {align1};
  88. and  (1) INEP_ROW.4<1>:UD       INEP_ROW.4<0,1,0>:UD            0xFF000000:UD {align1};
  89. mov  (8) vme_msg_5<1>:UD         INEP_ROW.0<8,8,1>:UD {align1};
  90.  
  91. mov  (1) tmp_reg0.0<1>:UW       LUMA_CHROMA_MODE:UW {align1};
  92. /* Use the Luma mode */
  93. mov  (1) vme_msg_5.5<1>:UB      tmp_reg0.0<0,1,0>:UB {align1};
  94.  
  95. /* m6 */        
  96. mov  (8) vme_msg_6<1>:UD         0x0:UD {align1};
  97. mov (16) vme_msg_6.0<1>:UB       INEP_COL0.3<32,8,4>:UB {align1};
  98. mov  (1) vme_msg_6.16<1>:UD      INTRA_PREDICTORE_MODE {align1};
  99.  
  100. /* the penalty for Intra mode */
  101. mov  (1) vme_msg_6.28<1>:UD     0x010101:UD {align1};
  102. mov  (1) vme_msg_6.20<1>:UW      CHROMA_ROW.6<0,1,0>:UW {align1};
  103.  
  104.  
  105. /* m7 */
  106.  
  107. mov  (4) vme_msg_7.16<1>:UD      CHROMA_ROW.8<4,4,1>:UD {align1};
  108. mov  (8) vme_msg_7.0<1>:UW       CHROMA_COL.2<16,8,2>:UW {align1};
  109.  
  110. /*
  111.  * VME message
  112.  */
  113.  
  114. /* m1 */
  115. mov  (1) intra_flag<1>:UW       0x0:UW {align1}                     ;
  116. and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1};
  117. (f0.0) mov  (1) intra_part_mask_ub<1>:UB  LUMA_INTRA_8x8_DISABLE {align1};
  118.  
  119. /* assign MB intra struct from the thread payload*/
  120. mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1};
  121.                            
  122. /* Disable DC HAAR component when calculating HARR SATD block */
  123. mov  (1) tmp_reg0.0<1>:UW       DC_HARR_DISABLE:UW              {align1};
  124. mov  (1) vme_m1.30<1>:UB        tmp_reg0.0<0,1,0>:UB  {align1};
  125.  
  126. mov  (8) vme_msg_1<1>:UD        vme_m1.0<8,8,1>:UD {align1};
  127. /* m0 */        
  128. /* 16x16 Source, Intra_harr */
  129. add  (1) vme_m0.12<1>:UD        vme_m0.12<0,1,0>:ud     INTRA_SAD_HAAR:UD {align1};
  130. mov  (8) vme_msg_0<1>:UD        vme_m0.0<8,8,1>:UD {align1};
  131.  
  132. /* after verification it will be passed by using payload */
  133. send (8)
  134.         vme_msg_ind
  135.         vme_wb<1>:UD
  136.         null
  137.         cre(
  138.                 BIND_IDX_VME,
  139.                 VME_SIC_MESSAGE_TYPE
  140.         )
  141.         mlen sic_vme_msg_length
  142.         rlen vme_wb_length
  143.         {align1};
  144. /*
  145.  * Oword Block Write message
  146.  */
  147. mov  (8) msg_reg0.0<1>:UD       obw_m0<8,8,1>:UD {align1};
  148.        
  149. mov  (1) msg_reg1.0<1>:UD       vme_wb.0<0,1,0>:UD      {align1};
  150. mov  (1) msg_reg1.4<1>:UD       vme_wb.16<0,1,0>:UD     {align1};
  151. mov  (1) msg_reg1.8<1>:UD       vme_wb.20<0,1,0>:UD     {align1};
  152. mov  (1) msg_reg1.12<1>:UD      vme_wb.24<0,1,0>:UD     {align1};
  153.  
  154. /* Distortion, Intra (17-16), */
  155. mov  (1) msg_reg1.16<1>:UW      vme_wb.12<0,1,0>:UW     {align1};
  156.  
  157. mov  (1) msg_reg1.20<1>:UD      vme_wb.8<0,1,0>:UD     {align1};
  158. /* VME clock counts */
  159. mov  (1) msg_reg1.24<1>:UD      vme_wb.28<0,1,0>:UD     {align1};
  160.  
  161. mov  (1) msg_reg1.28<1>:UD      obw_m0.8<0,1,0>:UD     {align1};
  162.  
  163. /* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */
  164. send (16)
  165.         msg_ind
  166.         obw_wb
  167.         null
  168.         data_port(
  169.                 OBW_CACHE_TYPE,
  170.                 OBW_MESSAGE_TYPE,
  171.                 OBW_CONTROL_2,
  172.                 OBW_BIND_IDX,
  173.                 OBW_WRITE_COMMIT_CATEGORY,
  174.                 OBW_HEADER_PRESENT
  175.         )
  176.         mlen 2
  177.         rlen obw_wb_length
  178.         {align1};
  179.  
  180. __EXIT:
  181. /*
  182.  * kill thread
  183.  */        
  184. mov  (8) ts_msg_reg0<1>:UD         r0<8,8,1>:UD {align1};
  185. send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
  186.