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  1. /*
  2.  * MLP DSP functions x86-optimized
  3.  * Copyright (c) 2009 Ramiro Polla
  4.  *
  5.  * This file is part of FFmpeg.
  6.  *
  7.  * FFmpeg is free software; you can redistribute it and/or
  8.  * modify it under the terms of the GNU Lesser General Public
  9.  * License as published by the Free Software Foundation; either
  10.  * version 2.1 of the License, or (at your option) any later version.
  11.  *
  12.  * FFmpeg is distributed in the hope that it will be useful,
  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15.  * Lesser General Public License for more details.
  16.  *
  17.  * You should have received a copy of the GNU Lesser General Public
  18.  * License along with FFmpeg; if not, write to the Free Software
  19.  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  20.  */
  21.  
  22. #include "libavutil/attributes.h"
  23. #include "libavutil/cpu.h"
  24. #include "libavutil/x86/asm.h"
  25. #include "libavutil/x86/cpu.h"
  26. #include "libavcodec/mlpdsp.h"
  27. #include "libavcodec/mlp.h"
  28.  
  29. #if HAVE_7REGS && HAVE_INLINE_ASM
  30.  
  31. extern char ff_mlp_firorder_8;
  32. extern char ff_mlp_firorder_7;
  33. extern char ff_mlp_firorder_6;
  34. extern char ff_mlp_firorder_5;
  35. extern char ff_mlp_firorder_4;
  36. extern char ff_mlp_firorder_3;
  37. extern char ff_mlp_firorder_2;
  38. extern char ff_mlp_firorder_1;
  39. extern char ff_mlp_firorder_0;
  40.  
  41. extern char ff_mlp_iirorder_4;
  42. extern char ff_mlp_iirorder_3;
  43. extern char ff_mlp_iirorder_2;
  44. extern char ff_mlp_iirorder_1;
  45. extern char ff_mlp_iirorder_0;
  46.  
  47. static const void *firtable[9] = { &ff_mlp_firorder_0, &ff_mlp_firorder_1,
  48.                                    &ff_mlp_firorder_2, &ff_mlp_firorder_3,
  49.                                    &ff_mlp_firorder_4, &ff_mlp_firorder_5,
  50.                                    &ff_mlp_firorder_6, &ff_mlp_firorder_7,
  51.                                    &ff_mlp_firorder_8 };
  52. static const void *iirtable[5] = { &ff_mlp_iirorder_0, &ff_mlp_iirorder_1,
  53.                                    &ff_mlp_iirorder_2, &ff_mlp_iirorder_3,
  54.                                    &ff_mlp_iirorder_4 };
  55.  
  56. #if ARCH_X86_64
  57.  
  58. #define MLPMUL(label, offset, offs, offc)   \
  59.     LABEL_MANGLE(label)":             \n\t" \
  60.     "movslq "offset"+"offs"(%0), %%rax\n\t" \
  61.     "movslq "offset"+"offc"(%1), %%rdx\n\t" \
  62.     "imul                 %%rdx, %%rax\n\t" \
  63.     "add                  %%rax, %%rsi\n\t"
  64.  
  65. #define FIRMULREG(label, offset, firc)\
  66.     LABEL_MANGLE(label)":       \n\t" \
  67.     "movslq "#offset"(%0), %%rax\n\t" \
  68.     "imul        %"#firc", %%rax\n\t" \
  69.     "add            %%rax, %%rsi\n\t"
  70.  
  71. #define CLEAR_ACCUM                   \
  72.     "xor            %%rsi, %%rsi\n\t"
  73.  
  74. #define SHIFT_ACCUM                   \
  75.     "shr     %%cl,         %%rsi\n\t"
  76.  
  77. #define ACCUM    "%%rdx"
  78. #define RESULT   "%%rsi"
  79. #define RESULT32 "%%esi"
  80.  
  81. #else /* if ARCH_X86_32 */
  82.  
  83. #define MLPMUL(label, offset, offs, offc)  \
  84.     LABEL_MANGLE(label)":            \n\t" \
  85.     "mov   "offset"+"offs"(%0), %%eax\n\t" \
  86.     "imull "offset"+"offc"(%1)       \n\t" \
  87.     "add                %%eax , %%esi\n\t" \
  88.     "adc                %%edx , %%ecx\n\t"
  89.  
  90. #define FIRMULREG(label, offset, firc)  \
  91.     MLPMUL(label, #offset, "0", "0")
  92.  
  93. #define CLEAR_ACCUM                  \
  94.     "xor           %%esi, %%esi\n\t" \
  95.     "xor           %%ecx, %%ecx\n\t"
  96.  
  97. #define SHIFT_ACCUM                  \
  98.     "mov           %%ecx, %%edx\n\t" \
  99.     "mov           %%esi, %%eax\n\t" \
  100.     "movzbl        %7   , %%ecx\n\t" \
  101.     "shrd    %%cl, %%edx, %%eax\n\t" \
  102.  
  103. #define ACCUM    "%%edx"
  104. #define RESULT   "%%eax"
  105. #define RESULT32 "%%eax"
  106.  
  107. #endif /* !ARCH_X86_64 */
  108.  
  109. #define BINC  AV_STRINGIFY(4* MAX_CHANNELS)
  110. #define IOFFS AV_STRINGIFY(4*(MAX_FIR_ORDER + MAX_BLOCKSIZE))
  111. #define IOFFC AV_STRINGIFY(4* MAX_FIR_ORDER)
  112.  
  113. #define FIRMUL(label, offset) MLPMUL(label, #offset,   "0",   "0")
  114. #define IIRMUL(label, offset) MLPMUL(label, #offset, IOFFS, IOFFC)
  115.  
  116. static void mlp_filter_channel_x86(int32_t *state, const int32_t *coeff,
  117.                                    int firorder, int iirorder,
  118.                                    unsigned int filter_shift, int32_t mask,
  119.                                    int blocksize, int32_t *sample_buffer)
  120. {
  121.     const void *firjump = firtable[firorder];
  122.     const void *iirjump = iirtable[iirorder];
  123.  
  124.     blocksize = -blocksize;
  125.  
  126.     __asm__ volatile(
  127.         "1:                           \n\t"
  128.         CLEAR_ACCUM
  129.         "jmp  *%5                     \n\t"
  130.         FIRMUL   (ff_mlp_firorder_8, 0x1c   )
  131.         FIRMUL   (ff_mlp_firorder_7, 0x18   )
  132.         FIRMUL   (ff_mlp_firorder_6, 0x14   )
  133.         FIRMUL   (ff_mlp_firorder_5, 0x10   )
  134.         FIRMUL   (ff_mlp_firorder_4, 0x0c   )
  135.         FIRMULREG(ff_mlp_firorder_3, 0x08,10)
  136.         FIRMULREG(ff_mlp_firorder_2, 0x04, 9)
  137.         FIRMULREG(ff_mlp_firorder_1, 0x00, 8)
  138.         LABEL_MANGLE(ff_mlp_firorder_0)":\n\t"
  139.         "jmp  *%6                     \n\t"
  140.         IIRMUL   (ff_mlp_iirorder_4, 0x0c   )
  141.         IIRMUL   (ff_mlp_iirorder_3, 0x08   )
  142.         IIRMUL   (ff_mlp_iirorder_2, 0x04   )
  143.         IIRMUL   (ff_mlp_iirorder_1, 0x00   )
  144.         LABEL_MANGLE(ff_mlp_iirorder_0)":\n\t"
  145.         SHIFT_ACCUM
  146.         "mov  "RESULT"  ,"ACCUM"      \n\t"
  147.         "add  (%2)      ,"RESULT"     \n\t"
  148.         "and   %4       ,"RESULT"     \n\t"
  149.         "sub   $4       ,  %0         \n\t"
  150.         "mov  "RESULT32", (%0)        \n\t"
  151.         "mov  "RESULT32", (%2)        \n\t"
  152.         "add $"BINC"    ,  %2         \n\t"
  153.         "sub  "ACCUM"   ,"RESULT"     \n\t"
  154.         "mov  "RESULT32","IOFFS"(%0)  \n\t"
  155.         "incl              %3         \n\t"
  156.         "js 1b                        \n\t"
  157.         : /* 0*/"+r"(state),
  158.           /* 1*/"+r"(coeff),
  159.           /* 2*/"+r"(sample_buffer),
  160. #if ARCH_X86_64
  161.           /* 3*/"+r"(blocksize)
  162.         : /* 4*/"r"((x86_reg)mask), /* 5*/"r"(firjump),
  163.           /* 6*/"r"(iirjump)      , /* 7*/"c"(filter_shift)
  164.         , /* 8*/"r"((int64_t)coeff[0])
  165.         , /* 9*/"r"((int64_t)coeff[1])
  166.         , /*10*/"r"((int64_t)coeff[2])
  167.         : "rax", "rdx", "rsi"
  168. #else /* ARCH_X86_32 */
  169.           /* 3*/"+m"(blocksize)
  170.         : /* 4*/"m"(         mask), /* 5*/"m"(firjump),
  171.           /* 6*/"m"(iirjump)      , /* 7*/"m"(filter_shift)
  172.         : "eax", "edx", "esi", "ecx"
  173. #endif /* !ARCH_X86_64 */
  174.     );
  175. }
  176.  
  177. #endif /* HAVE_7REGS && HAVE_INLINE_ASM */
  178.  
  179. av_cold void ff_mlpdsp_init_x86(MLPDSPContext *c)
  180. {
  181. #if HAVE_7REGS && HAVE_INLINE_ASM
  182.     int cpu_flags = av_get_cpu_flags();
  183.     if (INLINE_MMX(cpu_flags))
  184.         c->mlp_filter_channel = mlp_filter_channel_x86;
  185. #endif
  186. }
  187.