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  1. /*
  2.  * Copyright © 2011 Intel Corporation
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8.  * and/or sell copies of the Software, and to permit persons to whom the
  9.  * Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18.  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19.  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20.  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21.  * IN THE SOFTWARE.
  22.  */
  23.  
  24. #include "brw_context.h"
  25. #include "brw_state.h"
  26. #include "brw_defines.h"
  27. #include "brw_util.h"
  28. #include "program/prog_parameter.h"
  29. #include "program/prog_statevars.h"
  30. #include "intel_batchbuffer.h"
  31.  
  32. static void
  33. upload_vs_state(struct brw_context *brw)
  34. {
  35.    struct gl_context *ctx = &brw->ctx;
  36.    uint32_t floating_point_mode = 0;
  37.    const int max_threads_shift = brw->is_haswell ?
  38.       HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT;
  39.  
  40.    gen7_emit_vs_workaround_flush(brw);
  41.  
  42.    /* BRW_NEW_VS_BINDING_TABLE */
  43.    BEGIN_BATCH(2);
  44.    OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_VS << 16 | (2 - 2));
  45.    OUT_BATCH(brw->vs.bind_bo_offset);
  46.    ADVANCE_BATCH();
  47.  
  48.    /* CACHE_NEW_SAMPLER */
  49.    BEGIN_BATCH(2);
  50.    OUT_BATCH(_3DSTATE_SAMPLER_STATE_POINTERS_VS << 16 | (2 - 2));
  51.    OUT_BATCH(brw->sampler.offset);
  52.    ADVANCE_BATCH();
  53.  
  54.    if (brw->vs.push_const_size == 0) {
  55.       /* Disable the push constant buffers. */
  56.       BEGIN_BATCH(7);
  57.       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2));
  58.       OUT_BATCH(0);
  59.       OUT_BATCH(0);
  60.       OUT_BATCH(0);
  61.       OUT_BATCH(0);
  62.       OUT_BATCH(0);
  63.       OUT_BATCH(0);
  64.       ADVANCE_BATCH();
  65.    } else {
  66.       uint8_t mocs = brw->is_haswell ? GEN7_MOCS_L3 : 0;
  67.  
  68.       BEGIN_BATCH(7);
  69.       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2));
  70.       OUT_BATCH(brw->vs.push_const_size);
  71.       OUT_BATCH(0);
  72.       /* Pointer to the VS constant buffer.  Covered by the set of
  73.        * state flags from gen6_prepare_wm_contants
  74.        */
  75.       OUT_BATCH(brw->vs.push_const_offset | mocs);
  76.       OUT_BATCH(0);
  77.       OUT_BATCH(0);
  78.       OUT_BATCH(0);
  79.       ADVANCE_BATCH();
  80.    }
  81.  
  82.    /* Use ALT floating point mode for ARB vertex programs, because they
  83.     * require 0^0 == 1.
  84.     */
  85.    if (ctx->Shader.CurrentVertexProgram == NULL)
  86.       floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
  87.  
  88.    BEGIN_BATCH(6);
  89.    OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
  90.    OUT_BATCH(brw->vs.prog_offset);
  91.    OUT_BATCH(floating_point_mode |
  92.              ((ALIGN(brw->sampler.count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT));
  93.  
  94.    if (brw->vs.prog_data->base.total_scratch) {
  95.       OUT_RELOC(brw->vs.scratch_bo,
  96.                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
  97.                 ffs(brw->vs.prog_data->base.total_scratch) - 11);
  98.    } else {
  99.       OUT_BATCH(0);
  100.    }
  101.  
  102.    OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |
  103.              (brw->vs.prog_data->base.urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
  104.              (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
  105.  
  106.    OUT_BATCH(((brw->max_vs_threads - 1) << max_threads_shift) |
  107.              GEN6_VS_STATISTICS_ENABLE |
  108.              GEN6_VS_ENABLE);
  109.    ADVANCE_BATCH();
  110. }
  111.  
  112. const struct brw_tracked_state gen7_vs_state = {
  113.    .dirty = {
  114.       .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
  115.       .brw   = (BRW_NEW_CONTEXT |
  116.                 BRW_NEW_VERTEX_PROGRAM |
  117.                 BRW_NEW_VS_BINDING_TABLE |
  118.                 BRW_NEW_BATCH),
  119.       .cache = CACHE_NEW_VS_PROG | CACHE_NEW_SAMPLER
  120.    },
  121.    .emit = upload_vs_state,
  122. };
  123.