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  1. /*
  2.  * Copyright 2010 Marek Olšák <maraeo@gmail.com
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * on the rights to use, copy, modify, merge, publish, distribute, sub
  8.  * license, and/or sell copies of the Software, and to permit persons to whom
  9.  * the Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18.  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19.  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20.  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21.  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22.  */
  23. #ifndef R600_RESOURCE_H
  24. #define R600_RESOURCE_H
  25.  
  26. #include "../../winsys/radeon/drm/radeon_winsys.h"
  27. #include "util/u_range.h"
  28.  
  29. struct r600_screen;
  30.  
  31. /* flag to indicate a resource is to be used as a transfer so should not be tiled */
  32. #define R600_RESOURCE_FLAG_TRANSFER             PIPE_RESOURCE_FLAG_DRV_PRIV
  33. #define R600_RESOURCE_FLAG_FLUSHED_DEPTH        (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
  34. #define R600_RESOURCE_FLAG_FORCE_TILING         (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
  35.  
  36. struct r600_resource {
  37.         struct u_resource               b;
  38.  
  39.         /* Winsys objects. */
  40.         struct pb_buffer                *buf;
  41.         struct radeon_winsys_cs_handle  *cs_buf;
  42.  
  43.         /* Resource state. */
  44.         enum radeon_bo_domain           domains;
  45.  
  46.         /* The buffer range which is initialized (with a write transfer,
  47.          * streamout, DMA, or as a random access target). The rest of
  48.          * the buffer is considered invalid and can be mapped unsynchronized.
  49.          *
  50.          * This allows unsychronized mapping of a buffer range which hasn't
  51.          * been used yet. It's for applications which forget to use
  52.          * the unsynchronized map flag and expect the driver to figure it out.
  53.          */
  54.         struct util_range               valid_buffer_range;
  55. };
  56.  
  57. struct r600_transfer {
  58.         struct pipe_transfer            transfer;
  59.         struct r600_resource            *staging;
  60.         unsigned                        offset;
  61. };
  62.  
  63. struct compute_memory_item;
  64.  
  65. struct r600_resource_global {
  66.         struct r600_resource base;
  67.         struct compute_memory_item *chunk;
  68. };
  69.  
  70. struct r600_texture {
  71.         struct r600_resource            resource;
  72.  
  73.         unsigned                        array_mode[PIPE_MAX_TEXTURE_LEVELS];
  74.         unsigned                        pitch_override;
  75.         unsigned                        size;
  76.         bool                            non_disp_tiling;
  77.         bool                            is_depth;
  78.         bool                            is_rat;
  79.         unsigned                        dirty_level_mask; /* each bit says if that mipmap is compressed */
  80.         struct r600_texture             *flushed_depth_texture;
  81.         boolean                         is_flushing_texture;
  82.         struct radeon_surface           surface;
  83.  
  84.         /* FMASK and CMASK can only be used with MSAA textures for now.
  85.          * MSAA textures cannot have mipmaps. */
  86.         unsigned                        fmask_offset, fmask_size, fmask_bank_height;
  87.         unsigned                        fmask_slice_tile_max;
  88.         unsigned                        cmask_offset, cmask_size;
  89.         unsigned                        cmask_slice_tile_max;
  90.  
  91.         struct r600_resource            *htile;
  92.         /* use htile only for first level */
  93.         float                           depth_clear;
  94.  
  95.         unsigned                        color_clear_value[2];
  96. };
  97.  
  98. #define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)
  99.  
  100. struct r600_fmask_info {
  101.         unsigned size;
  102.         unsigned alignment;
  103.         unsigned bank_height;
  104.         unsigned slice_tile_max;
  105. };
  106.  
  107. struct r600_cmask_info {
  108.         unsigned size;
  109.         unsigned alignment;
  110.         unsigned slice_tile_max;
  111. };
  112.  
  113. struct r600_surface {
  114.         struct pipe_surface             base;
  115.  
  116.         bool color_initialized;
  117.         bool depth_initialized;
  118.  
  119.         /* Misc. color flags. */
  120.         bool alphatest_bypass;
  121.         bool export_16bpc;
  122.  
  123.         /* Color registers. */
  124.         unsigned cb_color_info;
  125.         unsigned cb_color_base;
  126.         unsigned cb_color_view;
  127.         unsigned cb_color_size;         /* R600 only */
  128.         unsigned cb_color_dim;          /* EG only */
  129.         unsigned cb_color_pitch;        /* EG only */
  130.         unsigned cb_color_slice;        /* EG only */
  131.         unsigned cb_color_attrib;       /* EG only */
  132.         unsigned cb_color_fmask;        /* CB_COLORn_FMASK (EG) or CB_COLORn_FRAG (r600) */
  133.         unsigned cb_color_fmask_slice;  /* EG only */
  134.         unsigned cb_color_cmask;        /* CB_COLORn_CMASK (EG) or CB_COLORn_TILE (r600) */
  135.         unsigned cb_color_cmask_slice;  /* EG only */
  136.         unsigned cb_color_mask;         /* R600 only */
  137.         struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
  138.         struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
  139.  
  140.         /* DB registers. */
  141.         unsigned db_depth_info;         /* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
  142.         unsigned db_depth_base;         /* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
  143.         unsigned db_depth_view;
  144.         unsigned db_depth_size;
  145.         unsigned db_depth_slice;        /* EG only */
  146.         unsigned db_stencil_base;       /* EG only */
  147.         unsigned db_stencil_info;       /* EG only */
  148.         unsigned db_prefetch_limit;     /* R600 only */
  149.         unsigned pa_su_poly_offset_db_fmt_cntl;
  150.  
  151.         unsigned                        htile_enabled;
  152.         unsigned                        db_htile_surface;
  153.         unsigned                        db_htile_data_base;
  154.         unsigned                        db_preload_control;
  155. };
  156.  
  157. /* Return if the depth format can be read without the DB->CB copy on r6xx-r7xx. */
  158. static INLINE bool r600_can_read_depth(struct r600_texture *rtex)
  159. {
  160.         return rtex->resource.b.b.nr_samples <= 1 &&
  161.                (rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM ||
  162.                 rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT);
  163. }
  164.  
  165. void r600_resource_destroy(struct pipe_screen *screen, struct pipe_resource *res);
  166. void r600_init_screen_resource_functions(struct pipe_screen *screen);
  167.  
  168. /* r600_texture */
  169. void r600_texture_get_fmask_info(struct r600_screen *rscreen,
  170.                                  struct r600_texture *rtex,
  171.                                  unsigned nr_samples,
  172.                                  struct r600_fmask_info *out);
  173. void r600_texture_get_cmask_info(struct r600_screen *rscreen,
  174.                                  struct r600_texture *rtex,
  175.                                  struct r600_cmask_info *out);
  176. struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
  177.                                         const struct pipe_resource *templ);
  178. struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
  179.                                                 const struct pipe_resource *base,
  180.                                                 struct winsys_handle *whandle);
  181.  
  182. static INLINE struct r600_resource *r600_resource(struct pipe_resource *r)
  183. {
  184.         return (struct r600_resource*)r;
  185. }
  186.  
  187. bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
  188.                                      struct pipe_resource *texture,
  189.                                      struct r600_texture **staging);
  190.  
  191. #endif
  192.