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  1. /*
  2.  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the "Software"),
  6.  * to deal in the Software without restriction, including without limitation
  7.  * on the rights to use, copy, modify, merge, publish, distribute, sub
  8.  * license, and/or sell copies of the Software, and to permit persons to whom
  9.  * the Software is furnished to do so, subject to the following conditions:
  10.  *
  11.  * The above copyright notice and this permission notice (including the next
  12.  * paragraph) shall be included in all copies or substantial portions of the
  13.  * Software.
  14.  *
  15.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16.  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17.  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18.  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19.  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20.  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21.  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22.  
  23. #ifndef R300_CONTEXT_H
  24. #define R300_CONTEXT_H
  25.  
  26. #define R300_BUFFER_ALIGNMENT 64
  27.  
  28. #include "draw/draw_vertex.h"
  29.  
  30. #include "util/u_blitter.h"
  31.  
  32. #include "pipe/p_context.h"
  33. #include "util/u_inlines.h"
  34. #include "util/u_transfer.h"
  35.  
  36. #include "r300_defines.h"
  37. #include "r300_screen.h"
  38. #include "compiler/radeon_regalloc.h"
  39. #include "../../winsys/radeon/drm/radeon_winsys.h"
  40.  
  41. struct u_upload_mgr;
  42. struct r300_context;
  43. struct r300_fragment_shader;
  44. struct r300_vertex_shader;
  45. struct r300_stencilref_context;
  46.  
  47. enum colormask_swizzle {
  48.     COLORMASK_BGRA,
  49.     COLORMASK_RGBA,
  50.     COLORMASK_RRRR,
  51.     COLORMASK_AAAA,
  52.     COLORMASK_GRRG,
  53.     COLORMASK_ARRA,
  54.     COLORMASK_BGRX,
  55.     COLORMASK_RGBX,
  56.     COLORMASK_NUM_SWIZZLES
  57. };
  58.  
  59. struct r300_atom {
  60.     /* Name, for debugging. */
  61.     const char* name;
  62.     /* Opaque state. */
  63.     void* state;
  64.     /* Emit the state to the context. */
  65.     void (*emit)(struct r300_context*, unsigned, void*);
  66.     /* Upper bound on number of dwords to emit. */
  67.     unsigned size;
  68.     /* Whether this atom should be emitted. */
  69.     boolean dirty;
  70.     /* Whether this atom may be emitted with state == NULL. */
  71.     boolean allow_null_state;
  72. };
  73.  
  74. struct r300_aa_state {
  75.     struct r300_surface *dest;
  76.  
  77.     uint32_t aa_config;
  78. };
  79.  
  80. struct r300_blend_state {
  81.     struct pipe_blend_state state;
  82.  
  83.     uint32_t cb_clamp[COLORMASK_NUM_SWIZZLES][8];
  84.     uint32_t cb_noclamp[8];
  85.     uint32_t cb_noclamp_noalpha[8];
  86.     uint32_t cb_no_readwrite[8];
  87. };
  88.  
  89. struct r300_blend_color_state {
  90.     struct pipe_blend_color state;
  91.     uint32_t cb[3];
  92. };
  93.  
  94. struct r300_clip_state {
  95.     uint32_t cb[29];
  96. };
  97.  
  98. struct r300_dsa_state {
  99.     struct pipe_depth_stencil_alpha_state dsa;
  100.  
  101.     /* This is actually a command buffer with named dwords. */
  102.     uint32_t cb_begin;
  103.     uint32_t z_buffer_control;  /* R300_ZB_CNTL: 0x4f00 */
  104.     uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */
  105.     uint32_t stencil_ref_mask;  /* R300_ZB_STENCILREFMASK: 0x4f08 */
  106.     uint32_t cb_reg;
  107.     uint32_t stencil_ref_bf;    /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */
  108.     uint32_t cb_reg1;
  109.     uint32_t alpha_value;       /* R500_FG_ALPHA_VALUE: 0x4be0 */
  110.  
  111.     /* Same, but without ZB reads and writes. */
  112.     uint32_t cb_zb_no_readwrite[8]; /* ZB not bound */
  113.  
  114.     /* Emitted separately: */
  115.     uint32_t alpha_function;
  116.  
  117.     /* Whether a two-sided stencil is enabled. */
  118.     boolean two_sided;
  119.     /* Whether a fallback should be used for a two-sided stencil ref value. */
  120.     boolean two_sided_stencil_ref;
  121. };
  122.  
  123. struct r300_hyperz_state {
  124.     int flush;
  125.     /* This is actually a command buffer with named dwords. */
  126.     uint32_t cb_flush_begin;
  127.     uint32_t zb_zcache_ctlstat;     /* R300_ZB_CACHE_CNTL */
  128.     uint32_t cb_begin;
  129.     uint32_t zb_bw_cntl;            /* R300_ZB_BW_CNTL */
  130.     uint32_t cb_reg1;
  131.     uint32_t zb_depthclearvalue;    /* R300_ZB_DEPTHCLEARVALUE */
  132.     uint32_t cb_reg2;
  133.     uint32_t sc_hyperz;             /* R300_SC_HYPERZ */
  134.     uint32_t cb_reg3;
  135.     uint32_t gb_z_peq_config;       /* R300_GB_Z_PEQ_CONFIG: 0x4028 */
  136. };
  137.  
  138. struct r300_gpu_flush {
  139.     uint32_t cb_flush_clean[6];
  140. };
  141.  
  142. #define RS_STATE_MAIN_SIZE 27
  143.  
  144. struct r300_rs_state {
  145.     /* Original rasterizer state. */
  146.     struct pipe_rasterizer_state rs;
  147.     /* Draw-specific rasterizer state. */
  148.     struct pipe_rasterizer_state rs_draw;
  149.  
  150.     /* Command buffers. */
  151.     uint32_t cb_main[RS_STATE_MAIN_SIZE];
  152.     uint32_t cb_poly_offset_zb16[5];
  153.     uint32_t cb_poly_offset_zb24[5];
  154.  
  155.     /* The index to cb_main where the cull_mode register value resides. */
  156.     unsigned cull_mode_index;
  157.  
  158.     /* Whether polygon offset is enabled. */
  159.     boolean polygon_offset_enable;
  160.  
  161.     /* This is emitted in the draw function. */
  162.     uint32_t color_control;         /* R300_GA_COLOR_CONTROL: 0x4278 */
  163. };
  164.  
  165. struct r300_rs_block {
  166.     uint32_t vap_vtx_state_cntl;  /* R300_VAP_VTX_STATE_CNTL: 0x2180 */
  167.     uint32_t vap_vsm_vtx_assm;    /* R300_VAP_VSM_VTX_ASSM: 0x2184 */
  168.     uint32_t vap_out_vtx_fmt[2];  /* R300_VAP_OUTPUT_VTX_FMT_[0-1]: 0x2090 */
  169.     uint32_t gb_enable;
  170.  
  171.     uint32_t ip[8]; /* R300_RS_IP_[0-7], R500_RS_IP_[0-7] */
  172.     uint32_t count; /* R300_RS_COUNT */
  173.     uint32_t inst_count; /* R300_RS_INST_COUNT */
  174.     uint32_t inst[8]; /* R300_RS_INST_[0-7] */
  175. };
  176.  
  177. struct r300_sampler_state {
  178.     struct pipe_sampler_state state;
  179.  
  180.     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
  181.     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
  182.  
  183.     /* Min/max LOD must be clamped to [0, last_level], thus
  184.      * it's dependent on a currently bound texture */
  185.     unsigned min_lod, max_lod;
  186. };
  187.  
  188. struct r300_texture_format_state {
  189.     uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */
  190.     uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */
  191.     uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */
  192.     uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */
  193.     uint32_t us_format0;   /* R500_US_FORMAT0_0: 0x4640 (through 15) */
  194. };
  195.  
  196. struct r300_sampler_view {
  197.     struct pipe_sampler_view base;
  198.  
  199.     /* For resource_copy_region. */
  200.     unsigned width0_override;
  201.     unsigned height0_override;
  202.  
  203.     /* Swizzles in the UTIL_FORMAT_SWIZZLE_* representation,
  204.      * derived from base. */
  205.     unsigned char swizzle[4];
  206.  
  207.     /* Copy of r300_texture::texture_format_state with format-specific bits
  208.      * added. */
  209.     struct r300_texture_format_state format;
  210.  
  211.     /* The texture cache region for this texture. */
  212.     uint32_t texcache_region;
  213. };
  214.  
  215. struct r300_texture_sampler_state {
  216.     struct r300_texture_format_state format;
  217.     uint32_t filter0;      /* R300_TX_FILTER0: 0x4400 */
  218.     uint32_t filter1;      /* R300_TX_FILTER1: 0x4440 */
  219.     uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */
  220. };
  221.  
  222. struct r300_textures_state {
  223.     /* Textures. */
  224.     struct r300_sampler_view *sampler_views[16];
  225.     int sampler_view_count;
  226.     /* Sampler states. */
  227.     struct r300_sampler_state *sampler_states[16];
  228.     int sampler_state_count;
  229.  
  230.     /* This is the merge of the texture and sampler states. */
  231.     unsigned count;
  232.     uint32_t tx_enable;         /* R300_TX_ENABLE: 0x4101 */
  233.     struct r300_texture_sampler_state regs[16];
  234. };
  235.  
  236. struct r300_vertex_stream_state {
  237.     /* R300_VAP_PROG_STREAK_CNTL_[0-7] */
  238.     uint32_t vap_prog_stream_cntl[8];
  239.     /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */
  240.     uint32_t vap_prog_stream_cntl_ext[8];
  241.  
  242.     unsigned count;
  243. };
  244.  
  245. struct r300_invariant_state {
  246.     uint32_t cb[24];
  247. };
  248.  
  249. struct r300_vap_invariant_state {
  250.     uint32_t cb[11];
  251. };
  252.  
  253. struct r300_viewport_state {
  254.     float xscale;         /* R300_VAP_VPORT_XSCALE:  0x2098 */
  255.     float xoffset;        /* R300_VAP_VPORT_XOFFSET: 0x209c */
  256.     float yscale;         /* R300_VAP_VPORT_YSCALE:  0x20a0 */
  257.     float yoffset;        /* R300_VAP_VPORT_YOFFSET: 0x20a4 */
  258.     float zscale;         /* R300_VAP_VPORT_ZSCALE:  0x20a8 */
  259.     float zoffset;        /* R300_VAP_VPORT_ZOFFSET: 0x20ac */
  260.     uint32_t vte_control; /* R300_VAP_VTE_CNTL:      0x20b0 */
  261. };
  262.  
  263. struct r300_ztop_state {
  264.     uint32_t z_buffer_top;      /* R300_ZB_ZTOP: 0x4f14 */
  265. };
  266.  
  267. /* The next several objects are not pure Radeon state; they inherit from
  268.  * various Gallium classes. */
  269.  
  270. struct r300_constant_buffer {
  271.     /* Buffer of constants */
  272.     uint32_t *ptr;
  273.     /* Remapping table. */
  274.     unsigned *remap_table;
  275.     /* const buffer base */
  276.     uint32_t buffer_base;
  277. };
  278.  
  279. /* Query object.
  280.  *
  281.  * This is not a subclass of pipe_query because pipe_query is never
  282.  * actually fully defined. So, rather than have it as a member, and do
  283.  * subclass-style casting, we treat pipe_query as an opaque, and just
  284.  * trust that our state tracker does not ever mess up query objects.
  285.  */
  286. struct r300_query {
  287.     /* The kind of query. Currently only OQ is supported. */
  288.     unsigned type;
  289.     /* The number of pipes where query results are stored. */
  290.     unsigned num_pipes;
  291.     /* How many results have been written, in dwords. It's incremented
  292.      * after end_query and flush. */
  293.     unsigned num_results;
  294.     /* if begin has been emitted */
  295.     boolean begin_emitted;
  296.  
  297.     /* The buffer where query results are stored. */
  298.     struct pb_buffer *buf;
  299.     struct radeon_winsys_cs_handle *cs_buf;
  300. };
  301.  
  302. struct r300_surface {
  303.     struct pipe_surface base;
  304.  
  305.     /* Winsys buffer backing the texture. */
  306.     struct pb_buffer *buf;
  307.     struct radeon_winsys_cs_handle *cs_buf;
  308.  
  309.     enum radeon_bo_domain domain;
  310.  
  311.     uint32_t offset;    /* COLOROFFSET or DEPTHOFFSET. */
  312.     uint32_t pitch;     /* COLORPITCH or DEPTHPITCH. */
  313.     uint32_t pitch_zmask; /* ZMASK_PITCH */
  314.     uint32_t pitch_hiz;   /* HIZ_PITCH */
  315.     uint32_t pitch_cmask; /* CMASK_PITCH */
  316.     uint32_t format;    /* US_OUT_FMT or ZB_FORMAT. */
  317.  
  318.     /* Parameters dedicated to the CBZB clear. */
  319.     uint32_t cbzb_width;            /* Aligned width. */
  320.     uint32_t cbzb_height;           /* Half of the height. */
  321.     uint32_t cbzb_midpoint_offset;  /* DEPTHOFFSET. */
  322.     uint32_t cbzb_pitch;            /* DEPTHPITCH. */
  323.     uint32_t cbzb_format;           /* ZB_FORMAT. */
  324.  
  325.     /* Whether the CBZB clear is allowed on the surface. */
  326.     boolean cbzb_allowed;
  327.  
  328.     unsigned colormask_swizzle;
  329. };
  330.  
  331. struct r300_texture_desc {
  332.     /* Width, height, and depth.
  333.      * Most of the time, these are equal to pipe_texture::width0, height0,
  334.      * and depth0. However, NPOT 3D textures must have dimensions aligned
  335.      * to POT, and this is the only case when these variables differ from
  336.      * pipe_texture. */
  337.     unsigned width0, height0, depth0;
  338.  
  339.     /* Buffer tiling.
  340.      * Macrotiling is specified per-level because small mipmaps cannot
  341.      * be macrotiled. */
  342.     enum radeon_bo_layout microtile;
  343.     enum radeon_bo_layout macrotile[R300_MAX_TEXTURE_LEVELS];
  344.  
  345.     /* Offsets into the buffer. */
  346.     unsigned offset_in_bytes[R300_MAX_TEXTURE_LEVELS];
  347.  
  348.     /* Strides for each mip-level. */
  349.     unsigned stride_in_bytes[R300_MAX_TEXTURE_LEVELS];
  350.  
  351.     /* Size of one zslice or face or 2D image based on the texture target. */
  352.     unsigned layer_size_in_bytes[R300_MAX_TEXTURE_LEVELS];
  353.  
  354.     /* Total size of this texture, in bytes,
  355.      * derived from the texture properties. */
  356.     unsigned size_in_bytes;
  357.  
  358.     /**
  359.      * If non-zero, override the natural texture layout with
  360.      * a custom stride (in bytes).
  361.      *
  362.      * \note Mipmapping fails for textures with a non-natural layout!
  363.      *
  364.      * \sa r300_texture_get_stride
  365.      */
  366.     unsigned stride_in_bytes_override;
  367.  
  368.     /* Whether this texture has non-power-of-two dimensions.
  369.      * It can be either a regular texture or a rectangle one. */
  370.     boolean is_npot;
  371.  
  372.     /* This flag says that hardware must use the stride for addressing
  373.      * instead of the width. */
  374.     boolean uses_stride_addressing;
  375.  
  376.     /* Whether CBZB fast color clear is allowed on the miplevel. */
  377.     boolean cbzb_allowed[R300_MAX_TEXTURE_LEVELS];
  378.  
  379.     /* Zbuffer compression info for each miplevel. */
  380.     boolean zcomp8x8[R300_MAX_TEXTURE_LEVELS];
  381.     /* If zero, then disable Z compression/HiZ. */
  382.     unsigned zmask_dwords[R300_MAX_TEXTURE_LEVELS];
  383.     unsigned hiz_dwords[R300_MAX_TEXTURE_LEVELS];
  384.     /* Zmask/HiZ strides for each miplevel. */
  385.     unsigned zmask_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
  386.     unsigned hiz_stride_in_pixels[R300_MAX_TEXTURE_LEVELS];
  387.  
  388.     /* CMASK info for AA buffers (no mipmapping). */
  389.     unsigned cmask_dwords;
  390.     unsigned cmask_stride_in_pixels;
  391. };
  392.  
  393. struct r300_resource
  394. {
  395.     struct u_resource b;
  396.  
  397.     /* Winsys buffer backing this resource. */
  398.     struct pb_buffer *buf;
  399.     struct radeon_winsys_cs_handle *cs_buf;
  400.     enum radeon_bo_domain domain;
  401.  
  402.     /* Constant buffers and SWTCL vertex and index buffers are in user
  403.      * memory. */
  404.     uint8_t *malloced_buffer;
  405.  
  406.     /* Texture description (addressing, layout, special features). */
  407.     struct r300_texture_desc tex;
  408.  
  409.     /* This is the level tiling flags were last time set for.
  410.      * It's used to prevent redundant tiling-flags changes from happening.*/
  411.     unsigned surface_level;
  412. };
  413.  
  414. struct r300_vertex_element_state {
  415.     unsigned count;
  416.     struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
  417.     unsigned format_size[PIPE_MAX_ATTRIBS];
  418.  
  419.     /* The size of the vertex, in dwords. */
  420.     unsigned vertex_size_dwords;
  421.  
  422.     struct r300_vertex_stream_state vertex_stream;
  423. };
  424.  
  425. enum r300_hiz_func {
  426.     HIZ_FUNC_NONE,
  427.  
  428.     /* The function, when determined, is set in stone
  429.      * until the next HiZ clear. */
  430.  
  431.     /* MAX is written to the HiZ buffer.
  432.      * Used for LESS, LEQUAL. */
  433.     HIZ_FUNC_MAX,
  434.  
  435.     /* MIN is written to the HiZ buffer.
  436.      * Used for GREATER, GEQUAL. */
  437.     HIZ_FUNC_MIN,
  438. };
  439.  
  440. /* For deferred fragment shader state validation. */
  441. enum r300_fs_validity_status {
  442.     FRAGMENT_SHADER_VALID,      /* No need to change/validate the FS. */
  443.     FRAGMENT_SHADER_MAYBE_DIRTY,/* Validate the FS if external state was changed. */
  444.     FRAGMENT_SHADER_DIRTY       /* Always validate the FS (if the FS was changed) */
  445. };
  446.  
  447. struct r300_context {
  448.     /* Parent class */
  449.     struct pipe_context context;
  450.  
  451.     /* The interface to the windowing system, etc. */
  452.     struct radeon_winsys *rws;
  453.     /* The command stream. */
  454.     struct radeon_winsys_cs *cs;
  455.     /* Screen. */
  456.     struct r300_screen *screen;
  457.  
  458.     /* Draw module. Used mostly for SW TCL. */
  459.     struct draw_context* draw;
  460.     /* Vertex buffer for SW TCL. */
  461.     struct pb_buffer *vbo;
  462.     struct radeon_winsys_cs_handle *vbo_cs;
  463.     /* Offset and size into the SW TCL VBO. */
  464.     size_t draw_vbo_offset;
  465.  
  466.     /* Accelerated blit support. */
  467.     struct blitter_context* blitter;
  468.     /* Stencil two-sided reference value fallback. */
  469.     struct r300_stencilref_context *stencilref_fallback;
  470.  
  471.     /* The KIL opcode needs the first texture unit to be enabled
  472.      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
  473.      * dummy texture there. */
  474.     struct r300_sampler_view *texkill_sampler;
  475.  
  476.     /* When no vertex buffer is set, this one is used instead to prevent
  477.      * hardlocks. */
  478.     struct pipe_vertex_buffer dummy_vb;
  479.  
  480.     /* The currently active query. */
  481.     struct r300_query *query_current;
  482.     /* The saved query for blitter operations. */
  483.     struct r300_query *blitter_saved_query;
  484.     /* Query list. */
  485.     struct r300_query query_list;
  486.  
  487.     /* Various CSO state objects. */
  488.  
  489.     /* Each atom is emitted in the order it appears here, which can affect
  490.      * performance and stability if not handled with care. */
  491.     /* GPU flush. */
  492.     struct r300_atom gpu_flush;
  493.     /* Clears must be emitted immediately after the flush. */
  494.     /* HiZ clear */
  495.     struct r300_atom hiz_clear;
  496.     /* zmask clear */
  497.     struct r300_atom zmask_clear;
  498.     /* cmask clear */
  499.     struct r300_atom cmask_clear;
  500.     /* Anti-aliasing (MSAA) state. */
  501.     struct r300_atom aa_state;
  502.     /* Framebuffer state. */
  503.     struct r300_atom fb_state;
  504.     /* HyperZ state (various SC/ZB bits). */
  505.     struct r300_atom hyperz_state;
  506.     /* ZTOP state. */
  507.     struct r300_atom ztop_state;
  508.     /* Depth, stencil, and alpha state. */
  509.     struct r300_atom dsa_state;
  510.     /* Blend state. */
  511.     struct r300_atom blend_state;
  512.     /* Blend color state. */
  513.     struct r300_atom blend_color_state;
  514.     /* Scissor state. */
  515.     struct r300_atom scissor_state;
  516.     /* Sample mask. */
  517.     struct r300_atom sample_mask;
  518.     /* Invariant state. This must be emitted to get the engine started. */
  519.     struct r300_atom invariant_state;
  520.     /* Viewport state. */
  521.     struct r300_atom viewport_state;
  522.     /* PVS flush. */
  523.     struct r300_atom pvs_flush;
  524.     /* VAP invariant state. */
  525.     struct r300_atom vap_invariant_state;
  526.     /* Vertex stream formatting state. */
  527.     struct r300_atom vertex_stream_state;
  528.     /* Vertex shader. */
  529.     struct r300_atom vs_state;
  530.     /* User clip planes. */
  531.     struct r300_atom clip_state;
  532.     /* RS block state + VAP (vertex shader) output mapping state. */
  533.     struct r300_atom rs_block_state;
  534.     /* Rasterizer state. */
  535.     struct r300_atom rs_state;
  536.     /* Framebuffer state (pipelined regs). */
  537.     struct r300_atom fb_state_pipelined;
  538.     /* Fragment shader. */
  539.     struct r300_atom fs;
  540.     /* Fragment shader RC_CONSTANT_STATE variables. */
  541.     struct r300_atom fs_rc_constant_state;
  542.     /* Fragment shader constant buffer. */
  543.     struct r300_atom fs_constants;
  544.     /* Vertex shader constant buffer. */
  545.     struct r300_atom vs_constants;
  546.     /* Texture cache invalidate. */
  547.     struct r300_atom texture_cache_inval;
  548.     /* Textures state. */
  549.     struct r300_atom textures_state;
  550.     /* Occlusion query. */
  551.     struct r300_atom query_start;
  552.  
  553.     /* The pointers to the first and the last atom. */
  554.     struct r300_atom *first_dirty, *last_dirty;
  555.  
  556.     /* Vertex elements for Gallium. */
  557.     struct r300_vertex_element_state *velems;
  558.  
  559.     /* Vertex info for Draw. */
  560.     struct vertex_info vertex_info;
  561.  
  562.     struct pipe_stencil_ref stencil_ref;
  563.     struct pipe_viewport_state viewport;
  564.  
  565.     /* Stream locations for SWTCL. */
  566.     int stream_loc_notcl[16];
  567.  
  568.     /* Flag indicating whether or not the HW is dirty. */
  569.     uint32_t dirty_hw;
  570.     /* Whether polygon offset is enabled. */
  571.     boolean polygon_offset_enabled;
  572.     /* Z buffer bit depth. */
  573.     uint32_t zbuffer_bpp;
  574.     /* Whether rendering is conditional and should be skipped. */
  575.     boolean skip_rendering;
  576.     /* The flag above saved by blitter. */
  577.     unsigned char blitter_saved_skip_rendering;
  578.     /* Point sprites texcoord index,  1 bit per texcoord */
  579.     int sprite_coord_enable;
  580.     /* Whether two-sided color selection is enabled (AKA light_twoside). */
  581.     boolean two_sided_color;
  582.     boolean flatshade;
  583.     /* Whether fast color clear is enabled. */
  584.     boolean cbzb_clear;
  585.     /* Whether fragment shader needs to be validated. */
  586.     enum r300_fs_validity_status fs_status;
  587.     /* Framebuffer multi-write. */
  588.     boolean fb_multiwrite;
  589.     unsigned num_samples;
  590.     boolean msaa_enable;
  591.     boolean alpha_to_one;
  592.     boolean alpha_to_coverage;
  593.  
  594.     void *dsa_decompress_zmask;
  595.  
  596.     struct pipe_index_buffer index_buffer;
  597.     struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
  598.     unsigned nr_vertex_buffers;
  599.     struct u_upload_mgr *uploader;
  600.  
  601.     struct util_slab_mempool pool_transfers;
  602.  
  603.     /* Stat counter. */
  604.     uint64_t flush_counter;
  605.  
  606.     /* const tracking for VS */
  607.     int vs_const_base;
  608.  
  609.     /* Vertex array state info */
  610.     boolean vertex_arrays_dirty;
  611.     boolean vertex_arrays_indexed;
  612.     int vertex_arrays_offset;
  613.     int vertex_arrays_instance_id;
  614.     boolean instancing_enabled;
  615.  
  616.     /* Hyper-Z stats. */
  617.     boolean hyperz_enabled;     /* Whether it owns Hyper-Z access. */
  618.     int64_t hyperz_time_of_last_flush; /* Time of the last flush with Z clear. */
  619.     unsigned num_z_clears;      /* Since the last flush. */
  620.  
  621.     /* ZMask state. */
  622.     boolean zmask_in_use;       /* Whether ZMASK is enabled. */
  623.     boolean zmask_decompress;   /* Whether ZMASK is being decompressed. */
  624.     struct pipe_surface *locked_zbuffer; /* Unbound zbuffer which still has data in ZMASK. */
  625.  
  626.     /* HiZ state. */
  627.     boolean hiz_in_use;         /* Whether HIZ is enabled. */
  628.     enum r300_hiz_func hiz_func; /* HiZ function. Can be either MIN or MAX. */
  629.     uint32_t hiz_clear_value;   /* HiZ clear value. */
  630.  
  631.     /* CMASK state. */
  632.     boolean cmask_access;
  633.     boolean cmask_in_use;
  634.     uint32_t color_clear_value; /* RGBA8 or RGBA1010102 */
  635.     uint32_t color_clear_value_ar; /* RGBA16F */
  636.     uint32_t color_clear_value_gb; /* RGBA16F */
  637.  
  638.     /* Compiler state. */
  639.     struct rc_regalloc_state fs_regalloc_state; /* Register allocator info for
  640.                                                  * fragment shaders. */
  641. };
  642.  
  643. #define foreach_atom(r300, atom) \
  644.     for (atom = &r300->gpu_flush; atom != (&r300->query_start)+1; atom++)
  645.  
  646. #define foreach_dirty_atom(r300, atom) \
  647.     for (atom = r300->first_dirty; atom != r300->last_dirty; atom++)
  648.  
  649. /* Convenience cast wrappers. */
  650. static INLINE struct r300_query* r300_query(struct pipe_query* q)
  651. {
  652.     return (struct r300_query*)q;
  653. }
  654.  
  655. static INLINE struct r300_surface* r300_surface(struct pipe_surface* surf)
  656. {
  657.     return (struct r300_surface*)surf;
  658. }
  659.  
  660. static INLINE struct r300_resource* r300_resource(struct pipe_resource* tex)
  661. {
  662.     return (struct r300_resource*)tex;
  663. }
  664.  
  665. static INLINE struct r300_context* r300_context(struct pipe_context* context)
  666. {
  667.     return (struct r300_context*)context;
  668. }
  669.  
  670. static INLINE struct r300_fragment_shader *r300_fs(struct r300_context *r300)
  671. {
  672.     return (struct r300_fragment_shader*)r300->fs.state;
  673. }
  674.  
  675. static INLINE void r300_mark_atom_dirty(struct r300_context *r300,
  676.                                         struct r300_atom *atom)
  677. {
  678.     atom->dirty = TRUE;
  679.  
  680.     if (!r300->first_dirty) {
  681.         r300->first_dirty = atom;
  682.         r300->last_dirty = atom+1;
  683.     } else {
  684.         if (atom < r300->first_dirty)
  685.             r300->first_dirty = atom;
  686.         else if (atom+1 > r300->last_dirty)
  687.             r300->last_dirty = atom+1;
  688.     }
  689. }
  690.  
  691. struct pipe_context* r300_create_context(struct pipe_screen* screen,
  692.                                          void *priv);
  693.  
  694. /* Context initialization. */
  695. struct draw_stage* r300_draw_stage(struct r300_context* r300);
  696. void r300_init_blit_functions(struct r300_context *r300);
  697. void r300_init_flush_functions(struct r300_context* r300);
  698. void r300_init_query_functions(struct r300_context* r300);
  699. void r300_init_render_functions(struct r300_context *r300);
  700. void r300_init_state_functions(struct r300_context* r300);
  701. void r300_init_resource_functions(struct r300_context* r300);
  702.  
  703. /* r300_blit.c */
  704. void r300_decompress_zmask(struct r300_context *r300);
  705. void r300_decompress_zmask_locked_unsafe(struct r300_context *r300);
  706. void r300_decompress_zmask_locked(struct r300_context *r300);
  707. bool r300_is_blit_supported(enum pipe_format format);
  708.  
  709. /* r300_flush.c */
  710. void r300_flush(struct pipe_context *pipe,
  711.                 unsigned flags,
  712.                 struct pipe_fence_handle **fence);
  713.  
  714. /* r300_hyperz.c */
  715. void r300_update_hyperz_state(struct r300_context* r300);
  716.  
  717. /* r300_query.c */
  718. void r300_resume_query(struct r300_context *r300,
  719.                        struct r300_query *query);
  720. void r300_stop_query(struct r300_context *r300);
  721.  
  722. /* r300_render_translate.c */
  723. void r300_translate_index_buffer(struct r300_context *r300,
  724.                                  struct pipe_index_buffer *ib,
  725.                                  struct pipe_resource **out_index_buffer,
  726.                                  unsigned *index_size, unsigned index_offset,
  727.                                  unsigned *start, unsigned count);
  728.  
  729. /* r300_render_stencilref.c */
  730. void r300_plug_in_stencil_ref_fallback(struct r300_context *r300);
  731.  
  732. /* r300_render.c */
  733. void r500_emit_index_bias(struct r300_context *r300, int index_bias);
  734. void r300_blitter_draw_rectangle(struct blitter_context *blitter,
  735.                                  int x1, int y1, int x2, int y2,
  736.                                  float depth,
  737.                                  enum blitter_attrib_type type,
  738.                                  const union pipe_color_union *attrib);
  739.  
  740. /* r300_state.c */
  741. enum r300_fb_state_change {
  742.     R300_CHANGED_FB_STATE = 0,
  743.     R300_CHANGED_HYPERZ_FLAG,
  744.     R300_CHANGED_MULTIWRITE,
  745.     R300_CHANGED_CMASK_ENABLE,
  746. };
  747.  
  748. void r300_mark_fb_state_dirty(struct r300_context *r300,
  749.                               enum r300_fb_state_change change);
  750. void r300_mark_fs_code_dirty(struct r300_context *r300);
  751.  
  752. struct pipe_sampler_view *
  753. r300_create_sampler_view_custom(struct pipe_context *pipe,
  754.                          struct pipe_resource *texture,
  755.                          const struct pipe_sampler_view *templ,
  756.                          unsigned width0_override,
  757.                          unsigned height0_override);
  758.  
  759. /* r300_state_derived.c */
  760. void r300_update_derived_state(struct r300_context* r300);
  761.  
  762. /* r300_debug.c */
  763. void r500_dump_rs_block(struct r300_rs_block *rs);
  764.  
  765.  
  766. static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags)
  767. {
  768.     return SCREEN_DBG_ON(ctx->screen, flags);
  769. }
  770.  
  771. static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags,
  772.                        const char * fmt, ...)
  773. {
  774.     if (CTX_DBG_ON(ctx, flags)) {
  775.         va_list va;
  776.         va_start(va, fmt);
  777.         vfprintf(stderr, fmt, va);
  778.         va_end(va);
  779.     }
  780. }
  781.  
  782. #define DBG_ON  CTX_DBG_ON
  783. #define DBG     CTX_DBG
  784.  
  785. #endif /* R300_CONTEXT_H */
  786.