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  1. #ifndef _PXA255_UART_H_
  2. #define _PXA255_UART_H_
  3.  
  4. #include "mem.h"
  5. #include "CPU.h"
  6. #include "pxa255_IC.h"
  7.  
  8.  
  9. /*
  10.         PXA255 UARTs
  11.        
  12.         PXA255 has three. they are identical, but at diff base addresses. this implements one. instanciate more than one of this struct to make all 3 work if needed.
  13.         PURRPOSE: this is how linux talks to us :)
  14.  
  15.  
  16.         by default we read nothing and write nowhere (buffer drains fast into nothingness)
  17.         this can be changed by addidng appropriate callbacks
  18.  
  19. */
  20.  
  21. #define PXA255_FFUART_BASE      0x40100000UL
  22. #define PXA255_BTUART_BASE      0x40200000UL
  23. #define PXA255_STUART_BASE      0x40700000UL
  24. #define PXA255_UART_SIZE        0x00010000UL
  25.  
  26. #define UART_FIFO_DEPTH         64
  27.  
  28.  
  29. #define UART_CHAR_BREAK         0x800
  30. #define UART_CHAR_FRAME_ERR     0x400
  31. #define UART_CHAR_PAR_ERR       0x200
  32. #define UART_CHAR_NONE          0x100
  33.  
  34. typedef UInt16  (*Pxa255UartReadF)(void* userData);
  35. typedef void    (*Pxa255UartWriteF)(UInt16 chr, void* userData);
  36.  
  37. #define UART_FIFO_EMPTY 0xFF
  38.  
  39. typedef struct{
  40.  
  41.         UInt8 read;
  42.         UInt8 write;
  43.         UInt16 buf[UART_FIFO_DEPTH];
  44.  
  45. }UartFifo;
  46.  
  47. typedef struct{
  48.  
  49.         Pxa255ic* ic;
  50.         UInt32 baseAddr;
  51.        
  52.         Pxa255UartReadF readF;
  53.         Pxa255UartWriteF writeF;
  54.         void* accessFuncsData;
  55.        
  56.         UartFifo TX, RX;
  57.        
  58.         UInt16 transmitShift;   //char currently "sending"
  59.         UInt16 transmitHolding; //holding register for no-fifo mode
  60.        
  61.         UInt16 receiveHolding;  //char just received
  62.        
  63.         UInt8 irq:5;
  64.         UInt8 cyclesSinceRecv:3;
  65.        
  66.         UInt8 IER;              //interrupt enable register
  67.         UInt8 IIR;              //interrupt information register
  68.         UInt8 FCR;              //fifo control register
  69.         UInt8 LCR;              //line control register
  70.         UInt8 LSR;              //line status register
  71.         UInt8 MCR;              //modem control register
  72.         UInt8 MSR;              //modem status register
  73.         UInt8 SPR;              //scratchpad register
  74.         UInt8 DLL;              //divisor latch low
  75.         UInt8 DLH;              //divior latch high;
  76.         UInt8 ISR;              //infrared selection register
  77.        
  78.        
  79.        
  80. }Pxa255uart;
  81.  
  82. Boolean pxa255uartInit(Pxa255uart* uart, ArmMem* physMem, Pxa255ic* ic, UInt32 baseAddr, UInt8 irq);
  83. void pxa255uartProcess(Pxa255uart* uart);               //write out data in TX fifo and read data into RX fifo
  84.  
  85. void pxa255uartSetFuncs(Pxa255uart* uart, Pxa255UartReadF readF, Pxa255UartWriteF writeF, void* userData);
  86.  
  87. #endif
  88.  
  89.