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  1.  
  2. #include "pci.h"
  3. #include "rhd_regs.h"
  4.  
  5. #define IS_R300_3D   0
  6. #define IS_R500_3D   1
  7.  
  8. #define R300_PIO     0
  9.  
  10. enum RHD_CHIPSETS {
  11.     RHD_UNKNOWN = 0,
  12.     RHD_R300,
  13.     RHD_R350,
  14.     RHD_RV350,
  15.     RHD_RV370,
  16.     RHD_RV380,
  17.     /* R500 */
  18.     RHD_RV505,
  19.     RHD_RV515,
  20.     RHD_RV516,
  21.     RHD_R520,
  22.     RHD_RV530,
  23.     RHD_RV535,
  24.     RHD_RV550,
  25.     RHD_RV560,
  26.     RHD_RV570,
  27.     RHD_R580,
  28.     /* R500 Mobility */
  29.     RHD_M52,
  30.     RHD_M54,
  31.     RHD_M56,
  32.     RHD_M58,
  33.     RHD_M62,
  34.     RHD_M64,
  35.     RHD_M66,
  36.     RHD_M68,
  37.     RHD_M71,
  38.     /* R500 integrated */
  39.     RHD_RS600,
  40.     RHD_RS690,
  41.     RHD_RS740,
  42.     /* R600 */
  43.     RHD_R600,
  44.     RHD_RV610,
  45.     RHD_RV630,
  46.     /* R600 Mobility */
  47.     RHD_M72,
  48.     RHD_M74,
  49.     RHD_M76,
  50.     /* RV670 came into existence after RV6x0 and M7x */
  51.     RHD_RV670,
  52.     RHD_R680,
  53.     RHD_RV620,
  54.     RHD_M82,
  55.     RHD_RV635,
  56.     RHD_M86,
  57.     RHD_RS780,
  58.     RHD_CHIP_END
  59. };
  60.  
  61. enum RHD_FAMILIES {
  62.     RHD_FAMILY_UNKNOWN = 0,
  63.  
  64.     RHD_FAMILY_RADEON,
  65.  
  66.     RHD_FAMILY_RV100,
  67.     RHD_FAMILY_RS100,    /* U1 (IGP320M) or A3 (IGP320)*/
  68.     RHD_FAMILY_RV200,
  69.     RHD_FAMILY_RS200,    /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
  70.     RHD_FAMILY_R200,
  71.     RHD_FAMILY_RV250,
  72.     RHD_FAMILY_RS300,    /* RS300/RS350 */
  73.     RHD_FAMILY_RV280,
  74.  
  75.     RHD_FAMILY_R300,
  76.     RHD_FAMILY_R350,
  77.     RHD_FAMILY_RV350,
  78.     RHD_FAMILY_RV380,    /* RV370/RV380/M22/M24 */
  79.     RHD_FAMILY_R420,     /* R420/R423/M18 */
  80.     RHD_FAMILY_RV410,    /* RV410, M26 */
  81.     RHD_FAMILY_RS400,    /* xpress 200, 200m (RS400) Intel */
  82.     RHD_FAMILY_RS480,    /* xpress 200, 200m (RS410/480/482/485) AMD */
  83.  
  84.     RHD_FAMILY_RV515,
  85.     RHD_FAMILY_R520,
  86.     RHD_FAMILY_RV530,
  87.     RHD_FAMILY_RV560,
  88.     RHD_FAMILY_RV570,
  89.     RHD_FAMILY_R580,
  90.     RHD_FAMILY_RS690,
  91.     RHD_FAMILY_R600,
  92.     RHD_FAMILY_RV610,
  93.     RHD_FAMILY_RV630,
  94.     RHD_FAMILY_RV670,
  95.     RHD_FAMILY_RV620,
  96.     RHD_FAMILY_RV635,
  97.     RHD_FAMILY_RS780
  98. };
  99.  
  100. #define RHD_FB_BAR         0
  101. #define RHD_MMIO_BAR       2
  102.  
  103. #define RHD_MEM_GART       1
  104. #define RHD_MEM_FB         2
  105.  
  106. typedef struct RHDRec
  107. {
  108.   CARD32            MMIOBase;
  109.   CARD32            MMIOMapSize;
  110.   CARD32            videoRam;
  111.  
  112.   CARD32            FbBase;            /* map base of fb   */
  113.   CARD32            PhisBase;
  114.   CARD32            FbIntAddress;      /* card internal address of FB */
  115.   CARD32            FbMapSize;
  116.  
  117.   CARD32            FbFreeStart;
  118.   CARD32            FbFreeSize;
  119.  
  120.   /* visible part of the framebuffer */
  121.   unsigned int      FbScanoutStart;
  122.   unsigned int      FbScanoutSize;
  123.  
  124.   enum RHD_CHIPSETS ChipSet;
  125.   enum RHD_FAMILIES ChipFamily;
  126.  
  127.   char              *ChipName;
  128.  
  129.   Bool              IsIGP;
  130.  
  131.   CARD32            bus;
  132.   CARD32            devfn;
  133.  
  134.   PCITAG            PciTag;
  135.   CARD16            PciDeviceID;
  136.  
  137.   CARD16            subvendor_id;
  138.   CARD16            subdevice_id;
  139.  
  140.   CARD32            memBase[6];
  141.   CARD32            ioBase[6];
  142.   CARD32            memtype[6];
  143.   CARD32            memsize[6];
  144.  
  145.   struct mem_block  *fb_heap;
  146.   struct mem_block  *gart_heap;
  147.  
  148.   CARD32            displayWidth;
  149.   CARD32            displayHeight;
  150.  
  151.   CARD32            __xmin;
  152.   CARD32            __ymin;
  153.   CARD32            __xmax;
  154.   CARD32            __ymax;
  155.  
  156.   CARD32            gui_control;
  157.   CARD32            dst_pitch_offset;
  158.   CARD32            surface_cntl;
  159.  
  160.   u32               *ring_base;
  161.   u32               ring_rp;
  162.   u32               ring_wp;
  163.  
  164.   int               num_gb_pipes;
  165.   Bool              has_tcl;
  166. }RHD_t, *RHDPtr;
  167.  
  168. extern RHD_t rhd;
  169.  
  170. typedef struct
  171. {
  172.   int xmin;
  173.   int ymin;
  174.   int xmax;
  175.   int ymax;
  176. }clip_t, *PTRclip;
  177.  
  178. typedef struct {
  179.     int                 token;          /* id of the token */
  180.     const char *        name;           /* token name */
  181. } SymTabRec, *SymTabPtr;
  182.  
  183.  
  184.  
  185. extern inline void
  186. OUTREG8(CARD16 offset, u8 value)
  187. {
  188.   *(volatile CARD8 *)((CARD8 *)(rhd.MMIOBase + offset)) = value;
  189. }
  190.  
  191.  
  192. extern inline CARD32 INREG(CARD16 offset)
  193. {
  194.   return *(volatile CARD32 *)((CARD8*)(rhd.MMIOBase + offset));
  195. }
  196.  
  197. //#define INREG(offset) *(volatile CARD32 *)((CARD8*)(rhd.MMIOBase + (offset)))
  198.  
  199. extern inline void
  200. OUTREG(CARD16 offset, CARD32 value)
  201. {
  202.   *(volatile CARD32 *)((CARD8 *)(rhd.MMIOBase + offset)) = value;
  203. }
  204.  
  205. extern inline CARD32 _RHDRegRead(RHDPtr rhdPtr, CARD16 offset)
  206. {
  207.   return *(volatile CARD32 *)((CARD8*)(rhdPtr->MMIOBase + offset));
  208. }
  209.  
  210. extern inline void
  211. MASKREG(CARD16 offset, CARD32 value, CARD32 mask)
  212. {
  213.   CARD32 tmp;
  214.  
  215.   tmp = INREG(offset);
  216.   tmp &= ~mask;
  217.   tmp |= (value & mask);
  218.   OUTREG(offset, tmp);
  219. };
  220.  
  221. extern inline void
  222. _RHDRegWrite(RHDPtr rhdPtr, CARD16 offset, CARD32 value)
  223. {
  224.   *(volatile CARD32 *)((CARD8 *)(rhdPtr->MMIOBase + offset)) = value;
  225. }
  226.  
  227. extern inline void
  228. _RHDRegMask(RHDPtr rhdPtr, CARD16 offset, CARD32 value, CARD32 mask)
  229. {
  230.   CARD32 tmp;
  231.  
  232.   tmp = _RHDRegRead(rhdPtr, offset);
  233.   tmp &= ~mask;
  234.   tmp |= (value & mask);
  235.   _RHDRegWrite(rhdPtr, offset, tmp);
  236. };
  237.  
  238. enum RHD_FAMILIES RHDFamily(enum RHD_CHIPSETS chipset);
  239.  
  240. #define RHDRegRead(ptr, offset) _RHDRegRead((ptr)->rhdPtr, (offset))
  241. #define RHDRegWrite(ptr, offset, value) _RHDRegWrite((ptr)->rhdPtr, (offset), (value))
  242. #define RHDRegMask(ptr, offset, value, mask) _RHDRegMask((ptr)->rhdPtr, (offset), (value), (mask))
  243.  
  244.  
  245. RHDPtr FindPciDevice();
  246.  
  247. Bool RHDPreInit();
  248. int rhdInitHeap(RHDPtr rhdPtr);
  249.  
  250. #define RHDFUNC(ptr)
  251.  
  252. #define DBG(x) x
  253. //  #define DBG(x)
  254.  
  255. #pragma pack (push,1)
  256. typedef struct s_cursor
  257. {
  258.    u32   magic;                           // 'CURS'
  259.    void  (*destroy)(struct s_cursor*);    // destructor
  260.    u32   fd;                              // next object in list
  261.    u32   bk;                              // prev object in list
  262.    u32   pid;                             // owner id
  263.  
  264.    void *base;                            // allocated memory
  265.    u32   hot_x;                           // hotspot coords
  266.    u32   hot_y;
  267. }cursor_t;
  268. #pragma pack (pop)
  269.  
  270. #define LOAD_FROM_FILE   0
  271. #define LOAD_FROM_MEM    1
  272. #define LOAD_INDIRECT    2
  273.  
  274. cursor_t *create_cursor(u32 pid, void *src, u32 flags);
  275. void __stdcall copy_cursor(void *img, void *src);
  276. void destroy_cursor(cursor_t *cursor);
  277. void __destroy_cursor(cursor_t *cursor);                // wrap
  278.  
  279. void __stdcall r500_SelectCursor(cursor_t *cursor);
  280. void __stdcall r500_SetCursor(cursor_t *cursor, int x, int y);
  281. void __stdcall r500_CursorRestore(int x, int y);
  282.  
  283. void  R5xx2DInit();
  284.  
  285.  
  286. typedef struct {
  287.     u32_t x ;
  288.     u32_t y ;
  289. } xPointFixed;
  290.  
  291. typedef u32_t   xFixed_16_16;
  292.  
  293. typedef xFixed_16_16  xFixed;
  294.  
  295. #define XFIXED_BITS 16
  296.  
  297. #define xFixedToInt(f)  (int) ((f) >> XFIXED_BITS)
  298. #define IntToxFixed(i)  ((xFixed) (i) << XFIXED_BITS)
  299.  
  300. #define xFixedToFloat(f) (((float) (f)) / 65536)
  301.  
  302. #define PICT_FORMAT(bpp,type,a,r,g,b) (((bpp) << 24) |  \
  303.                                          ((type) << 16) | \
  304.                                          ((a) << 12) | \
  305.                                          ((r) << 8) | \
  306.                                          ((g) << 4) | \
  307.                                          ((b)))
  308.  
  309. #define PICT_FORMAT_A(f)  (((f) >> 12) & 0x0f)
  310. #define PICT_FORMAT_RGB(f)  (((f)      ) & 0xfff)
  311.  
  312. #define PICT_TYPE_OTHER 0
  313. #define PICT_TYPE_A     1
  314. #define PICT_TYPE_ARGB  2
  315. #define PICT_TYPE_ABGR  3
  316. #define PICT_TYPE_COLOR 4
  317. #define PICT_TYPE_GRAY  5
  318.  
  319. typedef enum _PictFormatShort {
  320.    PICT_a8r8g8b8 =      PICT_FORMAT(32,PICT_TYPE_ARGB,8,8,8,8),
  321.    PICT_x8r8g8b8 =      PICT_FORMAT(32,PICT_TYPE_ARGB,0,8,8,8),
  322.    PICT_a8b8g8r8 =      PICT_FORMAT(32,PICT_TYPE_ABGR,8,8,8,8),
  323.    PICT_x8b8g8r8 =      PICT_FORMAT(32,PICT_TYPE_ABGR,0,8,8,8),
  324.  
  325. /* 24bpp formats */
  326.    PICT_r8g8b8 =        PICT_FORMAT(24,PICT_TYPE_ARGB,0,8,8,8),
  327.    PICT_b8g8r8 =        PICT_FORMAT(24,PICT_TYPE_ABGR,0,8,8,8),
  328.  
  329. /* 16bpp formats */
  330.    PICT_r5g6b5 =        PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,6,5),
  331.    PICT_b5g6r5 =        PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,6,5),
  332.  
  333.    PICT_a1r5g5b5 =      PICT_FORMAT(16,PICT_TYPE_ARGB,1,5,5,5),
  334.    PICT_x1r5g5b5 =      PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,5,5),
  335.    PICT_a1b5g5r5 =      PICT_FORMAT(16,PICT_TYPE_ABGR,1,5,5,5),
  336.    PICT_x1b5g5r5 =      PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,5,5),
  337.    PICT_a4r4g4b4 =      PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4),
  338.    PICT_x4r4g4b4 =      PICT_FORMAT(16,PICT_TYPE_ARGB,0,4,4,4),
  339.    PICT_a4b4g4r4 =      PICT_FORMAT(16,PICT_TYPE_ABGR,4,4,4,4),
  340.    PICT_x4b4g4r4 =      PICT_FORMAT(16,PICT_TYPE_ABGR,0,4,4,4),
  341.  
  342. /* 8bpp formats */
  343.    PICT_a8 =            PICT_FORMAT(8,PICT_TYPE_A,8,0,0,0),
  344.    PICT_r3g3b2 =        PICT_FORMAT(8,PICT_TYPE_ARGB,0,3,3,2),
  345.    PICT_b2g3r3 =        PICT_FORMAT(8,PICT_TYPE_ABGR,0,3,3,2),
  346.    PICT_a2r2g2b2 =      PICT_FORMAT(8,PICT_TYPE_ARGB,2,2,2,2),
  347.    PICT_a2b2g2r2 =      PICT_FORMAT(8,PICT_TYPE_ABGR,2,2,2,2),
  348.  
  349.    PICT_c8 =            PICT_FORMAT(8,PICT_TYPE_COLOR,0,0,0,0),
  350.    PICT_g8 =            PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0),
  351.  
  352.    PICT_x4a4 =          PICT_FORMAT(8,PICT_TYPE_A,4,0,0,0),
  353.  
  354.    PICT_x4c4 =          PICT_FORMAT(8,PICT_TYPE_COLOR,0,0,0,0),
  355.    PICT_x4g4 =          PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0),
  356.  
  357. /* 4bpp formats */
  358.    PICT_a4 =            PICT_FORMAT(4,PICT_TYPE_A,4,0,0,0),
  359.    PICT_r1g2b1 =        PICT_FORMAT(4,PICT_TYPE_ARGB,0,1,2,1),
  360.    PICT_b1g2r1 =        PICT_FORMAT(4,PICT_TYPE_ABGR,0,1,2,1),
  361.    PICT_a1r1g1b1 =      PICT_FORMAT(4,PICT_TYPE_ARGB,1,1,1,1),
  362.    PICT_a1b1g1r1 =      PICT_FORMAT(4,PICT_TYPE_ABGR,1,1,1,1),
  363.  
  364.    PICT_c4 =            PICT_FORMAT(4,PICT_TYPE_COLOR,0,0,0,0),
  365.    PICT_g4 =            PICT_FORMAT(4,PICT_TYPE_GRAY,0,0,0,0),
  366.  
  367. /* 1bpp formats */
  368.    PICT_a1 =            PICT_FORMAT(1,PICT_TYPE_A,1,0,0,0),
  369.  
  370.    PICT_g1 =            PICT_FORMAT(1,PICT_TYPE_GRAY,0,0,0,0),
  371. } PictFormatShort;
  372.  
  373.