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  1. /*
  2.  * All Video Processing kernels
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40.  
  41. #define DI_ENABLE
  42.  
  43.     #include "DNDI.inc"
  44.  
  45.     #ifdef DI_ONLY
  46.                 #undef  nSMPL_RESP_LEN
  47.                 #define nSMPL_RESP_LEN          nSMPL_RESP_LEN_DI               // set the number of GRF
  48.         #else
  49.                 #undef  nSMPL_RESP_LEN
  50.                 #define nSMPL_RESP_LEN          nSMPL_RESP_LEN_DNDI               // set the number of GRF
  51.         #endif
  52.        
  53.     #undef  nDPW_BLOCK_SIZE_HIST
  54.     #define nDPW_BLOCK_SIZE_HIST    nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1    // HIST Block Size for Write is 4x2
  55.     #undef  nDPW_BLOCK_SIZE_DN
  56.     #define nDPW_BLOCK_SIZE_DN      nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4   // DN Block Size for Write is 16x4
  57.    
  58. ////////////////////////////////////// Run the DN Algorithm ///////////////////////////////////////
  59.     #include "DNDI_Command.asm"
  60.  
  61. ////////////////////////////////////// Rearrange for Internal Planar //////////////////////////////
  62.  
  63. ////////////////////////////////////// Save the STMM Data for Next Run /////////////////////////
  64.     // Write STMM to memory
  65.     shr (1)     rMSGSRC.0<1>:ud        wORIX<0;1,0>:w            1:w  NODDCLR_NODDCHK             // X origin / 2
  66.     mov (1)     rMSGSRC.1<1>:ud        wORIY<0;1,0>:w                 NODDCLR_NODDCHK    // Y origin
  67.     mov (1)     rMSGSRC.2<1>:ud        nDPW_BLOCK_SIZE_STMM:ud        NODDCHK             // block width and height (8x4)
  68.     mov (8)     mudMSGHDR_STMM(0)<1>   rMSGSRC.0<8;8,1>:ud               // message header  
  69.     mov (8)     mudMSGHDR_STMM(1)<1>   udRESP(nDI_STMM_OFFSET,0)         // Move STMM to MRF
  70.     send (8)    dNULLREG               mMSGHDR_STMM              udDUMMY_NULL    nDATAPORT_WRITE     nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud      
  71.  
  72. #ifdef DI_ONLY
  73. #else
  74.  
  75. ////////////////////////////////////// Save the History Data for Next Run /////////////////////////
  76.     #include "DI_Hist_Save.asm"
  77.  
  78. ////////////////////////////////////// Save the DN Curr Frame for Next Run ////////////////////////
  79.    
  80.         //set the save DN parameters
  81.     mov (2)     rMSGSRC.0<1>:ud        wORIX<2;2,1>:w              NODDCLR             // X origin and Y origin
  82.     mov (1)     rMSGSRC.2<1>:ud        nDPW_BLOCK_SIZE_DN:ud       NODDCLR_NODDCHK     // block width and height (16x4)
  83.     mov (8)     mudMSGHDR_DN(0)<1>     rMSGSRC.0<8;8,1>:ud                    
  84.        
  85.     // check top/bottom field first
  86.     cmp.e.f0.0 (1)  null<1>:w               ubTFLD_FIRST<0;1,0>:ub     1:w
  87.     (f0.0) jmpi (1) TOP_FIELD_FIRST
  88.  
  89. BOTTOM_FIELD_FIRST:
  90.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  91.         mov (4)     mudMSGHDR_DN(1,%1*4)<1>     udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2)
  92.     }
  93.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  94.         mov (4)     mudMSGHDR_DN(1,%1*4+4)<1>   udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3)
  95.     }
  96.        
  97.     jmpi (1) SAVE_DN_CURR
  98.    
  99. TOP_FIELD_FIRST:
  100.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  101.         mov (4)     mudMSGHDR_DN(1,%1*4)<1>     udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2)
  102.     }
  103.     $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) {
  104.         mov (4)     mudMSGHDR_DN(1,%1*4+4)<1>   udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3)
  105.     }
  106.        
  107. SAVE_DN_CURR:
  108.     send (8)    dNULLREG    mMSGHDR_DN   udDUMMY_NULL    nDATAPORT_WRITE    nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud
  109. #endif
  110.  
  111. // Save Processed frames
  112. #include "DI_Save_PA.asm"      
  113.  
  114.  
  115.  
  116.