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  1. /*
  2.  * All Video Processing kernels
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40.  
  41. //Module name: PL8x4_Save_NV12.inc
  42. //
  43. // Setup for storing planar data
  44. //
  45.  
  46. #include "undefall.inc"                 //Undefine the SRC and DEST sysmbols
  47. #undef nDPW_BLOCK_SIZE_Y
  48. #undef nDPW_MSG_SIZE_Y
  49. #undef nDPW_BLOCK_SIZE_UV
  50. #undef nDPW_MSG_SIZE_UV
  51.  
  52. #define nDPW_BLOCK_SIZE_Y   nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8   // Y block size 16x8
  53. #define nDPW_MSG_SIZE_Y     nMSGLEN_4                         // # of MRF's to hold Y block data (4)
  54. #define nDPW_BLOCK_SIZE_UV  nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4    // U/V interleaved block width and height (16x4)
  55. #define nDPW_MSG_SIZE_UV    nMSGLEN_2                         // # of MRF's to hold U/V block data (2)
  56.  
  57. // For masking
  58. #undef  nDPR_MSG_SIZE_Y
  59. #define nDPR_MSG_SIZE_Y        nRESLEN_4                          // # of MRF's to hold Y block data (4)
  60. #undef  nDPR_MSG_SIZE_UV
  61. #define nDPR_MSG_SIZE_UV       nRESLEN_2  
  62. #define     rMASK_TEMP     REG(r,nTEMP0)
  63. .declare    uwMASK_TEMP    Base=rMASK_TEMP    ElementSize=2    SrcRegion=<8;8,1>    Type=uw        //1 GRF
  64. #define     rMASK_TEMP1     REG(r,nTEMP1)
  65. .declare    udMASK_TEMP1    Base=rMASK_TEMP1    ElementSize=4    SrcRegion=<4;4,1>    Type=ud        //1 GRF
  66. .declare    uwMASK_TEMP1    Base=rMASK_TEMP1    ElementSize=2    SrcRegion=<8;8,1>    Type=uw        //1 GRF
  67.  
  68.  
  69. #if (nSRC_REGION==nREGION_1)
  70.        #define udSRC_Y                 udBOT_Y_IO
  71.        #define udSRC_U                 udBOT_U_IO
  72.        #define udSRC_V                 udBOT_V_IO
  73.        #define ubSRC_Y                 ubBOT_Y
  74.        #define ubSRC_U                 ubBOT_U
  75.        #define ubSRC_V                 ubBOT_V
  76.  
  77.        #define uwSRC_U                 uwBOT_U  //For masking operation
  78.        #define uwSRC_V                 uwBOT_V
  79.  
  80.        #define ub2DEST_Y               ub2TOP_Y
  81.        #define ub2DEST_U               ub2TOP_U
  82.        #define ub2DEST_V               ub2TOP_V
  83.        
  84.               #define ubDEST_Y                      ubTOP_Y    
  85.         #define ubDEST_U                            ubTOP_U    
  86.         #define ubDEST_V                            ubTOP_V
  87.        
  88.         #define ub2SRC_U                                  ub2BOT_U
  89. #elif (nSRC_REGION==nREGION_2)
  90.        #define udSRC_Y                 udTOP_Y_IO
  91.        #define udSRC_U                 udTOP_U_IO
  92.        #define udSRC_V                 udTOP_V_IO
  93.        #define ubSRC_Y                 ubTOP_Y
  94.        #define ubSRC_U                 ubTOP_U
  95.        #define ubSRC_V                 ubTOP_V
  96.  
  97.        #define uwSRC_U                 uwTOP_U  //For masking operation
  98.        #define uwSRC_V                 uwTOP_V
  99.  
  100.        #define ub2DEST_Y               ub2BOT_Y
  101.        #define ub2DEST_U               ub2BOT_U
  102.        #define ub2DEST_V               ub2BOT_V
  103.  
  104.               #define ubDEST_Y                      ubBOT_Y    
  105.         #define ubDEST_U                            ubBOT_U    
  106.         #define ubDEST_V                            ubBOT_V        
  107.        
  108.         #define ub2SRC_U                                  ub2TOP_U
  109. #endif
  110.  
  111. ///* Yoni - masking is not relevant for ILK?!?
  112. //#define         TEMP0   REG(r,54)
  113. //.declare    TEMP        Base=TEMP0      ElementSize=2   SrcRegion=<8;8,1>       Type=uw
  114. ///* Yoni - masking is not relevant for ILK?!?
  115.  
  116.