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  1. /*
  2.  * Load all reference U/V samples from neighboring macroblocks
  3.  * Copyright © <2010>, Intel Corporation.
  4.  *
  5.  * Permission is hereby granted, free of charge, to any person obtaining a
  6.  * copy of this software and associated documentation files (the
  7.  * "Software"), to deal in the Software without restriction, including
  8.  * without limitation the rights to use, copy, modify, merge, publish,
  9.  * distribute, sub license, and/or sell copies of the Software, and to
  10.  * permit persons to whom the Software is furnished to do so, subject to
  11.  * the following conditions:
  12.  *
  13.  * The above copyright notice and this permission notice (including the
  14.  * next paragraph) shall be included in all copies or substantial portions
  15.  * of the Software.
  16.  *
  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  20.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  21.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24.  *
  25.  * This file was originally licensed under the following license
  26.  *
  27.  *  Licensed under the Apache License, Version 2.0 (the "License");
  28.  *  you may not use this file except in compliance with the License.
  29.  *  You may obtain a copy of the License at
  30.  *
  31.  *      http://www.apache.org/licenses/LICENSE-2.0
  32.  *
  33.  *  Unless required by applicable law or agreed to in writing, software
  34.  *  distributed under the License is distributed on an "AS IS" BASIS,
  35.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  36.  *  See the License for the specific language governing permissions and
  37.  *  limitations under the License.
  38.  *
  39.  */
  40. #if !defined(__LOAD_INTRA_REF_UV__)             // Make sure this is only included once
  41. #define __LOAD_INTRA_REF_UV__
  42.  
  43. // Module name: load_Intra_Ref_UV.asm
  44. //
  45. // Load all reference U/V samples from neighboring macroblocks
  46. //
  47. // Note: Since loading of U/V data always follows writing of Y, the message descriptor is manipulated
  48. // to avoid recalculating due to frame/field variztions.
  49.  
  50. // First load top 20x1 row U/V reference samples
  51. // 4 from macroblock D (actually use 2), 16 from macroblock B
  52. //
  53.     shr (1)     I_ORIY<1>:w             I_ORIY<0;1,0>:w 1:w             // Adjust I_ORIY for NV12 format
  54.     add (2)     MSGSRC.0<1>:d   I_ORIX<2;2,1>:w TOP_REF_OFFSET<2;2,1>:b {NoDDClr}       // Reference samples positioned at (-4, -1)
  55.     mov (1)     MSGSRC.2:ud             0x00000013:ud {NoDDChk}                 // Block width and height (20x1)
  56.  
  57. //  Update message descriptor based on previous Y block write
  58. //
  59. #ifdef DEV_ILK
  60.     add (1)     MSGDSC  MSGDSC  RESP_LEN(1)+DWBRMSGDSC_RC+DESTUV-DWBWMSGDSC_WC-0x10000000-DESTY:ud  // Set message descriptor
  61. #else
  62.     add (1)     MSGDSC  MSGDSC  RESP_LEN(1)+DWBRMSGDSC_RC+DESTUV-DWBWMSGDSC_WC-0x00800000-DESTY:ud  // Set message descriptor
  63. #endif  // DEV_ILK
  64.  
  65.     send (8)    INTRA_REF_TOP_D(0)      MSGHDR  MSGSRC<8;8,1>:ud        DAPREAD MSGDSC
  66.  
  67. // Then load left 4x8 reference samples (actually use 1x8 column)
  68. //
  69.     add (1)     MSGSRC.1<1>:d   MSGSRC.1<0;1,0>:d       1:w {NoDDClr}   // Reference samples positioned next row
  70.     mov (1)     MSGSRC.2:ud             0x00070003:ud {NoDDChk}                 // Block width and height (4x8)
  71.     send (8)    INTRA_REF_LEFT_D(0)     MSGHDRUV        MSGSRC<8;8,1>:ud        DAPREAD MSGDSC
  72.  
  73. // End of load_Intra_Ref_UV
  74. #endif  // !defined(__LOAD_INTRA_REF_UV__)
  75.