/*
* Copyright © <2010>, Intel Corporation.
*
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* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* This file was originally licensed under the following license
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
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* distributed under the License is distributed on an "AS IS" BASIS,
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*/
// Module name: load_Cur_UV_8x8T.asm
//
// Load and transpose UV 8x8 block (NV12: 8x8U and 8x8V mixed)
//
//----------------------------------------------------------------
// Symbols need to be defined before including this module
//
// Source region in :ud
// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud (U+V for NV12) // 4 GRFs
//
// Binding table index:
// BI_SRC_UV: Binding table index of UV surface (NV12)
//
//----------------------------------------------------------------
#if defined(_DEBUG)
mov (1) EntrySignatureC:w 0xDDD1:w
#endif
// Read U+V blk
#if defined(_PROGRESSIVE)
mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8 bytes)
//send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DWBRMSGDSC_SC+0x00040000+BI_SRC_UV
mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC+BI_SRC_UV:ud
#endif
#if defined(_FIELD)
// cmp.z.f0.0 (1) NULLREGW PicTypeC:w 0:w // Get pic type flag
and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
// they are used later in this file
mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8 bytes)
// Set message descriptor
// Frame picture
// (f0.0) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV
// (f0.0) jmpi load_UV_8x8T
// Field picture
(f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_BF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV bottom field
(-f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_TF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV top field
//load_UV_8x8T:
#endif
send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
// #include "Transpose_Cur_UV_8x8.asm"
// End of load_UV_8x8T