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  1. /*
  2.  * Copyright © <2010>, Intel Corporation.
  3.  *
  4.  * Permission is hereby granted, free of charge, to any person obtaining a
  5.  * copy of this software and associated documentation files (the
  6.  * "Software"), to deal in the Software without restriction, including
  7.  * without limitation the rights to use, copy, modify, merge, publish,
  8.  * distribute, sub license, and/or sell copies of the Software, and to
  9.  * permit persons to whom the Software is furnished to do so, subject to
  10.  * the following conditions:
  11.  *
  12.  * The above copyright notice and this permission notice (including the
  13.  * next paragraph) shall be included in all copies or substantial portions
  14.  * of the Software.
  15.  *
  16.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17.  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  18.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  19.  * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
  20.  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  21.  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  22.  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23.  *
  24.  * This file was originally licensed under the following license
  25.  *
  26.  *  Licensed under the Apache License, Version 2.0 (the "License");
  27.  *  you may not use this file except in compliance with the License.
  28.  *  You may obtain a copy of the License at
  29.  *
  30.  *      http://www.apache.org/licenses/LICENSE-2.0
  31.  *
  32.  *  Unless required by applicable law or agreed to in writing, software
  33.  *  distributed under the License is distributed on an "AS IS" BASIS,
  34.  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  35.  *  See the License for the specific language governing permissions and
  36.  *  limitations under the License.
  37.  *
  38.  */
  39. ////////// AVC ILDB filter horizontal UV ///////////////////////////////////////////////////////
  40. //
  41. //      This filter code prepares the src data and control data for ILDB filtering on all horizontal edges of UV.
  42. //
  43. //      It sssumes the data for horizontal de-blocking is already transposed.  
  44. //
  45. //              Chroma:
  46. //
  47. //              +-------+-------+               H0 Edge
  48. //              |               |               |
  49. //              |               |               |
  50. //              |               |               |
  51. //              +-------+-------+               H1 Edge
  52. //              |               |               |
  53. //              |               |               |
  54. //              |               |               |
  55. //              +-------+-------+
  56. //
  57. /////////////////////////////////////////////////////////////////////////////
  58.  
  59. #if defined(_DEBUG)
  60.         mov             (1)             EntrySignatureC:w                       0xBBBC:w
  61. #endif 
  62.  
  63. //=============== Chroma deblocking ================
  64.  
  65. //---------- Deblock U external top edge ----------
  66.         and.z.f0.0  (1) null:w          r[ECM_AddrReg, BitFlags]:ub             FilterTopMbEdgeFlag:w           // Check for FilterTopMbEdgeFlag
  67. //    (f0.0)    jmpi    BYPASS_EXT_TOP_EDGE_UV 
  68.  
  69.         // Get horizontal border edge control data.
  70.        
  71.         //***** Need to take every other bit to form U maskA and mask B
  72.         // Get Luma maskA and maskB    
  73.         shr (16)        TempRow0(0)<1>          r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<0;1,0>:uw             RRampW(0)
  74.         shr (16)        TempRow1(0)<1>          r[ECM_AddrReg, wEdgeCntlMapB_ExtTopHorz0]<0;1,0>:uw             RRampW(0)
  75.                
  76.     (f0.0)      jmpi    ILDB_LABEL(BYPASS_EXT_TOP_EDGE_UV)                     
  77.  
  78.         // Extract UV MaskA and MaskB from every other bit of Y masks
  79.         and.nz.f0.0 (8) null:w                  TempRow0(0)<16;8,2>             1:w
  80.         and.nz.f0.1 (8) null:w                  TempRow1(0)<16;8,2>             1:w
  81.  
  82. //---------- Deblock U external edge ----------
  83.         //      p1 = Prev MB U row 0
  84.         //      p0 = Prev MB U row 1
  85.         //      q0 = Cur MB U row 0
  86.         //      q1 = Cur MB U row 1
  87. //      mov (1) P_AddrReg:w             PREV_MB_U_BASE:w                                                                        { NoDDClr }
  88.         mov (1) P_AddrReg:w             TOP_MB_U_BASE:w                                                                         { NoDDClr }
  89.         mov (1) Q_AddrReg:w             SRC_MB_U_BASE:w                                                                         { NoDDChk }
  90.  
  91.         // alpha = bAlphaTop0_Cb, beta = bBetaTop0_Cb
  92.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaTop0_Cb]<2;2,1>:ub                                 { NoDDClr }
  93.         // tc0 has bTc0_h03_0_Cb + bTc0_h02_0_Cb + bTc0_h01_0_Cb + bTc0_h00_0_Cb
  94.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_h00_0_Cb]<4;4,1>:ub                                 { NoDDChk }
  95.                
  96.         // UV MaskA and MaskB
  97.         mov (2)         MaskA<1>:uw                     f0.0<2;2,1>:uw
  98.  
  99.         CALL(FILTER_UV, 1)     
  100.  
  101. //---------- Deblock V external top edge ----------
  102.         //      p1 = Prev MB V row 0
  103.         //      p0 = Prev MB V row 1
  104.         //      q0 = Cur MB V row 0
  105.         //      q1 = Cur MB V row 1
  106. //      mov (1) P_AddrReg:w             PREV_MB_V_BASE:w                { NoDDClr }
  107.         mov (1) P_AddrReg:w             TOP_MB_V_BASE:w         { NoDDClr }
  108.         mov (1) Q_AddrReg:w             SRC_MB_V_BASE:w                 { NoDDChk }
  109.  
  110.         // alpha = bAlphaTop0_Cr, beta = bBetaTop0_Cr
  111.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaTop0_Cr]<2;2,1>:ub         { NoDDClr }
  112.        
  113.         // tc0 has bTc0_h03_0_Cr + bTc0_h02_0_Cr + bTc0_h01_0_Cr + bTc0_h00_0_Cr
  114.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_h00_0_Cr]<4;4,1>:ub         { NoDDChk }
  115.  
  116.         // UV MaskA and MaskB
  117.         mov (2)         f0.0<1>:uw              MaskA<2;2,1>:uw
  118.  
  119.         CALL(FILTER_UV, 1)     
  120.  
  121. ILDB_LABEL(BYPASS_EXT_TOP_EDGE_UV):
  122.  
  123.         // Set EdgeCntlMap2 = 0, so it always uses bS < 4 algorithm.
  124.  
  125.         // Bypass deblocking if FilterInternal4x4EdgesFlag = 0  
  126. //      and.z.f0.0 (1) null:w   r[ECM_AddrReg, BitFlags]:ub             FilterInternal4x4EdgesFlag:w            // Check for FilterInternal4x4EdgesFlag
  127. //    (f0.0)    jmpi    BYPASS_4x4_DEBLOCK_H
  128.  
  129. //---------- Deblock U internal horz middle edge ----------
  130.  
  131.         //***** Need to take every other bit to form U maskA
  132.         // Get Luma maskA and maskB    
  133.         shr (16)        TempRow0(0)<1>          r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]<0;1,0>:uw               RRampW(0)
  134.  
  135.         //      p1 = Cur MB U row 2
  136.         //      p0 = Cur MB U row 3
  137.         //      q0 = Cur MB U row 4
  138.         //      q1 = Cur MB U row 5
  139.         mov (1) P_AddrReg:w             4*UV_ROW_WIDTH+SRC_MB_U_BASE:w                                  { NoDDClr }             // Skip 2 U rows and 2 V rows
  140.         mov (1) Q_AddrReg:w             8*UV_ROW_WIDTH+SRC_MB_U_BASE:w                                  { NoDDChk }
  141.  
  142.         // alpha = bAlphaInternal_Cb, beta = bBetaInternal_Cb
  143.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaInternal_Cb]<2;2,1>:ub             { NoDDClr }
  144.         // tc0 has bTc0_h23_Cb + bTc0_h22_Cb + bTc0_h21_Cb + bTc0_h20_Cb               
  145.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_h20_Cb]<4;4,1>:ub                           { NoDDChk }
  146.  
  147.         // Extract UV MaskA and MaskB from every other bit of Y masks
  148.         and.nz.f0.0 (8) null:w                  TempRow0(0)<16;8,2>             1:w
  149.  
  150.         // UV MaskA and MaskB
  151.         mov (1) f0.1:uw         0:w
  152.         mov (1) MaskB:uw        0:w                                                                                                     { NoDDClr }
  153.         mov (1) MaskA:uw        f0.0:uw                                                                                         { NoDDChk }
  154.  
  155.         CALL(FILTER_UV, 1)     
  156.  
  157. //---------- Deblock V internal horz middle edge ----------
  158.         //      p1 = Cur MB V row 2
  159.         //      p0 = Cur MB V row 3
  160.         //      q0 = Cur MB V row 4
  161.         //      q1 = Cur MB V row 5
  162.         mov (1) P_AddrReg:w             4*UV_ROW_WIDTH+SRC_MB_V_BASE:w                                  { NoDDClr }             // Skip 2 U rows and 2 V rows
  163.         mov (1) Q_AddrReg:w             8*UV_ROW_WIDTH+SRC_MB_V_BASE:w                                  { NoDDChk }
  164.  
  165.         // alpha = bAlphaInternal_Cr, beta = bBetaInternal_Cr
  166.         mov     (2)     alpha<1>:w      r[ECM_AddrReg, bAlphaInternal_Cr]<2;2,1>:ub             { NoDDClr }
  167.         // tc0 has bTc0_h23_Cr + bTc0_h22_Cr + bTc0_h21_Cr + bTc0_h20_Cr
  168.         mov (4) tc0<1>:ub       r[ECM_AddrReg, bTc0_h20_Cr]<4;4,1>:ub                           { NoDDChk }
  169.  
  170.         // UV MaskA and MaskB
  171.         mov (2)         f0.0<1>:uw              MaskA<2;2,1>:uw
  172.  
  173.         CALL(FILTER_UV, 1)     
  174.  
  175. //BYPASS_4x4_DEBLOCK_H:
  176.