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Rev 1905 Rev 3960
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  }
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  }
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#endif
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#endif
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}
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}
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#ifdef OPT_MMXORSSE
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#ifdef OPT_MMXORSSE
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#ifndef OPT_X86_64
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#if !defined(OPT_X86_64) && !defined(OPT_NEON)
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void make_decode_tables_mmx_asm(long scaleval, float* decwin_mmx, float *decwins);
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void make_decode_tables_mmx_asm(long scaleval, float* decwin_mmx, float *decwins);
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void make_decode_tables_mmx(mpg123_handle *fr)
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void make_decode_tables_mmx(mpg123_handle *fr)
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{
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{
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	debug("MMX decode tables");
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	debug("MMX decode tables");
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		scaleval_long = - scaleval_long;
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		scaleval_long = - scaleval_long;
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#else
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#else
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		scaleval = - scaleval;
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		scaleval = - scaleval;
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#endif
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#endif
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	}
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	}
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#if defined(OPT_X86_64) || defined(OPT_ALTIVEC) || defined(OPT_SSE) || defined(OPT_ARM)
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#if defined(OPT_X86_64) || defined(OPT_ALTIVEC) || defined(OPT_SSE) || defined(OPT_ARM) || defined(OPT_NEON)
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	if(fr->cpu_opts.type == x86_64 || fr->cpu_opts.type == altivec || fr->cpu_opts.type == sse || fr->cpu_opts.type == arm)
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	if(fr->cpu_opts.type == x86_64 || fr->cpu_opts.type == altivec || fr->cpu_opts.type == sse || fr->cpu_opts.type == arm || fr->cpu_opts.type == neon)
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	{ /* for float SSE / AltiVec / ARM decoder */
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	{ /* for float SSE / AltiVec / ARM decoder */
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		for(i=512; i<512+32; i++)
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		for(i=512; i<512+32; i++)
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		{
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		{
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			fr->decwin[i] = (i&1) ? fr->decwin[i] : 0;
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			fr->decwin[i] = (i&1) ? fr->decwin[i] : 0;
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		}
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		}
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		for(i=0; i<512; i++)
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		for(i=0; i<512; i++)
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		{
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		{
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			fr->decwin[512+32+i] = -fr->decwin[511-i];
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			fr->decwin[512+32+i] = -fr->decwin[511-i];
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		}
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		}
-
 
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#ifdef OPT_NEON
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		if(fr->cpu_opts.type == neon)
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		{
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			for(i=0; i<512; i+=2)
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			{
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				fr->decwin[i] = -fr->decwin[i];
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			}
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		}
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#endif
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	}
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	}
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#endif
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#endif
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	debug("decode tables done");
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	debug("decode tables done");
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}
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}