WebSVN – Kolibri OS – Diff – /kernel/trunk/network/eth_drv/drivers/pcnet32.inc


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                                                                  ;;
;; Copyright (C) KolibriOS team 2004-2007. All rights reserved.     ;;
;; Distributed under terms of the GNU General Public License        ;;
;;                                                                  ;;
;;  PCNET32.INC                                                     ;;
;;                                                                  ;;
;;  Ethernet driver for Menuet OS                                   ;;
;;                                                                  ;;
;;  - Version 1.0  31 July 2004:                                    ;;
;;      Initial release                                             ;;
;;                                                                  ;;
;;  - Version 1.01 29 March 2008:                                   ;;
;;     Adapted to work with kolibrios flat kernel                   ;;
;;     Debug info is updated, and now uses DEBUGF macro             ;;
;;     by hidnplayr@kolibrios.org                                   ;;
;;                                                                  ;;
;;  This driver is based on the PCNet32 driver from                 ;;
;;  the etherboot 5.0.6 project. The copyright statement is         ;;
;;                                                                  ;;
;;          GNU GENERAL PUBLIC LICENSE                              ;;
;;             Version 2, June 1991                                 ;;
;;                                                                  ;;
;;  remaining parts Copyright 2004 Jarek Pelczar,                   ;;
;;   jpelczar@interia.pl                                            ;;
;;                                                                  ;;
;;  See file COPYING for details                                    ;;
;;                                                                  ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
$Revision: 2288 $
 
 
PCNET32_PORT_AUI      equ 0x00
PCNET32_PORT_10BT     equ 0x01
PCNET32_PORT_GPSI     equ 0x02
PCNET32_PORT_MII      equ 0x03
PCNET32_PORT_PORTSEL  equ 0x03
PCNET32_PORT_ASEL     equ 0x04
PCNET32_PORT_100      equ 0x40
PCNET32_PORT_FD       equ 0x80
PCNET32_DMA_MASK      equ 0xffffffff
 
PCNET32_LOG_TX_BUFFERS  equ 1
PCNET32_LOG_RX_BUFFERS  equ 2
 
PCNET32_TX_RING_SIZE            equ (1 shl PCNET32_LOG_TX_BUFFERS)
PCNET32_TX_RING_MOD_MASK        equ (PCNET32_TX_RING_SIZE-1)
PCNET32_TX_RING_LEN_BITS        equ 0
PCNET32_RX_RING_SIZE            equ (1 shl PCNET32_LOG_RX_BUFFERS)
PCNET32_RX_RING_MOD_MASK        equ (PCNET32_RX_RING_SIZE-1)
PCNET32_RX_RING_LEN_BITS        equ (PCNET32_LOG_RX_BUFFERS shl 4)
PCNET32_PKT_BUF_SZ              equ 1544
PCNET32_PKT_BUF_SZ_NEG          equ 0xf9f8
 
pcnet32_txb equ (eth_data_start)
pcnet32_rxb equ ((pcnet32_txb+(PCNET32_PKT_BUF_SZ*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)
pcnet32_tx_ring equ ((pcnet32_rxb+(PCNET32_PKT_BUF_SZ*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)
pcnet32_rx_ring equ ((pcnet32_tx_ring+(16*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)
 
virtual at ((pcnet32_rx_ring+(16*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)
pcnet32_private:
.mode                   dw ?
.tlen_rlen              dw ?
.phys_addr              db ?,?,?,?,?,?
.reserved               dw ?
.filter                 dd ?,?
.rx_ring                dd ?
.tx_ring                dd ?
.cur_rx                 dd ?
.cur_tx                 dd ?
.dirty_rx               dd ?
.dirty_tx               dd ?
.tx_full                db ?
.options                dd ?
.full_duplex            db ?
.chip_version           dd ?
.mii                    db ?
.ltint                  db ?
.dxsuflo                db ?
.fset                   db ?
.fdx                    db ?
end virtual
 
virtual at 0
pcnet32_rx_head:
.base           dd ?
.buf_length     dw ?
.status         dw ?
.msg_length     dd ?
.reserved       dd ?
end virtual
 
virtual at 0
pcnet32_tx_head:
.base           dd ?
.length         dw ?
.status         dw ?
.misc           dd ?
.reserved       dd ?
end virtual
 
uglobal
pcnet32_access:
.read_csr               dd ?
.write_csr              dd ?
.read_bcr               dd ?
.write_bcr              dd ?
.read_rap               dd ?
.write_rap              dd ?
.reset                  dd ?
endg
 
iglobal
pcnet32_options_mapping:
dd PCNET32_PORT_ASEL    ;  0 Auto-select
dd PCNET32_PORT_AUI     ;  1 BNC/AUI
dd PCNET32_PORT_AUI     ;  2 AUI/BNC
dd PCNET32_PORT_ASEL    ;  3 not supported
dd PCNET32_PORT_10BT or PCNET32_PORT_FD ;  4 10baseT-FD
dd PCNET32_PORT_ASEL    ;  5 not supported
dd PCNET32_PORT_ASEL    ;  6 not supported
dd PCNET32_PORT_ASEL    ;  7 not supported
dd PCNET32_PORT_ASEL    ;  8 not supported
dd PCNET32_PORT_MII     ;  9 MII 10baseT
dd PCNET32_PORT_MII or PCNET32_PORT_FD  ; 10 MII 10baseT-FD
dd PCNET32_PORT_MII     ; 11 MII (autosel)
dd PCNET32_PORT_10BT    ; 12 10BaseT
dd PCNET32_PORT_MII or PCNET32_PORT_100 ; 13 MII 100BaseTx
dd PCNET32_PORT_MII or PCNET32_PORT_100 or PCNET32_PORT_FD      ; 14 MII 100BaseTx-FD
dd PCNET32_PORT_ASEL    ; 15 not supported
endg
 
PCNET32_WIO_RDP         equ 0x10
PCNET32_WIO_RAP         equ 0x12
PCNET32_WIO_RESET       equ 0x14
PCNET32_WIO_BDP         equ 0x16
PCNET32_DWIO_RDP        equ 0x10
PCNET32_DWIO_RAP        equ 0x14
PCNET32_DWIO_RESET      equ 0x18
PCNET32_DWIO_BDP        equ 0x1C
PCNET32_TOTAL_SIZE      equ 0x20
; ebx - index
; return:
; eax - data
pcnet32_wio_read_csr:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        mov     ax, bx
        out     dx, ax
        lea     edx, [ebp+PCNET32_WIO_RDP]
        in      ax, dx
        and     eax, 0xffff
        pop     edx
        ret
; eax - data
; ebx - index
pcnet32_wio_write_csr:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        xchg    eax, ebx
        out     dx, ax
        xchg    eax, ebx
        lea     edx, [ebp+PCNET32_WIO_RDP]
        out     dx, ax
        pop     edx
        ret
; ebx - index
; return:
; eax - data
pcnet32_wio_read_bcr:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        mov     ax, bx
        out     dx, ax
        lea     edx, [ebp+PCNET32_WIO_BDP]
        in      ax, dx
        and     eax, 0xffff
        pop     edx
        ret
; eax - data
; ebx - index
pcnet32_wio_write_bcr:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        xchg    eax, ebx
        out     dx, ax
        xchg    eax, ebx
        lea     edx, [ebp+PCNET32_WIO_BDP]
        out     dx, ax
        pop     edx
        ret
pcnet32_wio_read_rap:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        in      ax, dx
        and     eax, 0xffff
        pop     edx
        ret
; eax - val
pcnet32_wio_write_rap:
        push    edx
        lea     edx, [ebp+PCNET32_WIO_RAP]
        out     dx, ax
        pop     edx
        ret
pcnet32_wio_reset:
        push    edx
        push    eax
        lea     edx, [ebp+PCNET32_WIO_RESET]
        in      ax, dx
        pop     eax
        pop     edx
        ret
pcnet32_wio_check:
        push    edx
        mov     ax, 88
        lea     edx, [ebp+PCNET32_WIO_RAP]
        out     dx, ax
        nop
        nop
        in      ax, dx
        cmp     ax, 88
        sete    al
        pop     edx
        ret
 
iglobal
pcnet32_wio:
    dd pcnet32_wio_read_csr
    dd pcnet32_wio_write_csr
    dd pcnet32_wio_read_bcr
    dd pcnet32_wio_write_bcr
    dd pcnet32_wio_read_rap
    dd pcnet32_wio_write_rap
    dd pcnet32_wio_reset
endg
 
; ebx - index
; return:
; eax - data
pcnet32_dwio_read_csr:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        mov     ebx, eax
        out     dx, eax
        lea     edx, [ebp+PCNET32_DWIO_RDP]
        in      eax, dx
        and     eax, 0xffff
        pop     edx
        ret
; ebx - index
; eax - data
pcnet32_dwio_write_csr:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        xchg    eax, ebx
        out     dx, eax
        lea     edx, [ebp+PCNET32_DWIO_RDP]
        xchg    eax, ebx
        out     dx, eax
        pop     edx
        ret
; ebx - index
; return:
; eax - data
pcnet32_dwio_read_bcr:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        mov     ebx, eax
        out     dx, eax
        lea     edx, [ebp+PCNET32_DWIO_BDP]
        in      eax, dx
        and     eax, 0xffff
        pop     edx
        ret
; ebx - index
; eax - data
pcnet32_dwio_write_bcr:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        xchg    eax, ebx
        out     dx, eax
        lea     edx, [ebp+PCNET32_DWIO_BDP]
        xchg    eax, ebx
        out     dx, eax
        pop     edx
        ret
pcnet32_dwio_read_rap:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        in      eax, dx
        and     eax, 0xffff
        pop     edx
        ret
; eax - val
pcnet32_dwio_write_rap:
        push    edx
        lea     edx, [ebp+PCNET32_DWIO_RAP]
        out     dx, eax
        pop     edx
        ret
pcnet32_dwio_reset:
        push    edx
        push    eax
        lea     edx, [ebp+PCNET32_DWIO_RESET]
        in      eax, dx
        pop     eax
        pop     edx
        ret
pcnet32_dwio_check:
        push    edx
        lea     edx, [PCNET32_DWIO_RAP]
        mov     eax, 88
        out     dx, eax
        nop
        nop
        in      eax, dx
        and     eax, 0xffff
        cmp     eax, 88
        sete    al
        pop     edx
        ret
 
iglobal
pcnet32_dwio:
    dd pcnet32_dwio_read_csr
    dd pcnet32_dwio_write_csr
    dd pcnet32_dwio_read_bcr
    dd pcnet32_dwio_write_bcr
    dd pcnet32_dwio_read_rap
    dd pcnet32_dwio_write_rap
    dd pcnet32_dwio_reset
endg
 
 
 
pcnet32_init_ring:
        mov     [pcnet32_private.tx_full], 0
        mov     [pcnet32_private.cur_rx], 0
        mov     [pcnet32_private.cur_tx], 0
        mov     [pcnet32_private.dirty_rx], 0
        mov     [pcnet32_private.dirty_tx], 0
        mov     edi, pcnet32_rx_ring
        mov     ecx, PCNET32_RX_RING_SIZE
        mov     ebx, pcnet32_rxb
        sub     ebx, OS_BASE
.rx_init:
        mov     [edi+pcnet32_rx_head.base], ebx
        mov     [edi+pcnet32_rx_head.buf_length], word PCNET32_PKT_BUF_SZ_NEG
        mov     [edi+pcnet32_rx_head.status], word 0x8000
        add     ebx, PCNET32_PKT_BUF_SZ
;    inc ebx
        add     edi, 16
        loop    .rx_init
        mov     edi, pcnet32_tx_ring
        mov     ecx, PCNET32_TX_RING_SIZE
.tx_init:
        mov     [edi+pcnet32_tx_head.base], dword 0
        mov     [edi+pcnet32_tx_head.status], word 0
        add     edi, 16
        loop    .tx_init
        mov     [pcnet32_private.tlen_rlen], (PCNET32_TX_RING_LEN_BITS or PCNET32_RX_RING_LEN_BITS)
        mov     esi, node_addr
        mov     edi, pcnet32_private.phys_addr
        cld
        movsd
        movsw
        mov     eax, pcnet32_rx_ring
        sub     eax, OS_BASE
        mov     dword [pcnet32_private.rx_ring], eax
 
        mov     eax, pcnet32_tx_ring
        sub     eax, OS_BASE
        mov     dword [pcnet32_private.tx_ring], eax
        ret
 
 
 
pcnet32_reset:
    ; Reset PCNET32
        mov     ebp, [io_addr]
        call    dword [pcnet32_access.reset]
    ; set 32bit mode
        mov     ebx, 20
        mov     eax, 2
        call    dword [pcnet32_access.write_bcr]
    ; set/reset autoselect bit
        mov     ebx, 2
        call    dword [pcnet32_access.read_bcr]
        and     eax, not 2
        test    [pcnet32_private.options], PCNET32_PORT_ASEL
        jz      .L1
        or      eax, 2
.L1:
        call    dword [pcnet32_access.write_bcr]
    ; Handle full duplex setting
        cmp     byte [pcnet32_private.full_duplex], 0
        je      .L2
        mov     ebx, 9
        call    dword [pcnet32_access.read_bcr]
        and     eax, not 3
        test    [pcnet32_private.options], PCNET32_PORT_FD
        jz      .L3
        or      eax, 1
        cmp     [pcnet32_private.options], PCNET32_PORT_FD or PCNET32_PORT_AUI
        jne     .L4
        or      eax, 2
        jmp     .L4
.L3:
        test    [pcnet32_private.options], PCNET32_PORT_ASEL
        jz      .L4
        cmp     [pcnet32_private.chip_version], 0x2627
        jne     .L4
        or      eax, 3
.L4:
        mov     ebx, 9
        call    dword [pcnet32_access.write_bcr]
.L2:
    ; set/reset GPSI bit
        mov     ebx, 124
        call    dword [pcnet32_access.read_csr]
        mov     ecx, [pcnet32_private.options]
        and     ecx, PCNET32_PORT_PORTSEL
        cmp     ecx, PCNET32_PORT_GPSI
        jne     .L5
        or      eax, 0x10
.L5:
        call    dword [pcnet32_access.write_csr]
        cmp     [pcnet32_private.mii], 0
        je      .L6
        test    [pcnet32_private.options], PCNET32_PORT_ASEL
        jnz     .L6
        mov     ebx, 32
        call    dword [pcnet32_access.read_bcr]
        and     eax, not 0x38
        test    [pcnet32_private.options], PCNET32_PORT_FD
        jz      .L7
        or      eax, 0x10
.L7:
        test    [pcnet32_private.options], PCNET32_PORT_100
        jz      .L8
        or      eax, 0x08
.L8:
        call    dword [pcnet32_access.write_bcr]
        jmp     .L9
.L6:
        test    [pcnet32_private.options], PCNET32_PORT_ASEL
        jz      .L9
        mov     ebx, 32
;    DEBUGF 1," K : ASEL, enable auto-negotiation\n"
        call    dword [pcnet32_access.read_bcr]
        and     eax, not 0x98
        or      eax, 0x20
        call    dword [pcnet32_access.write_bcr]
.L9:
        cmp     [pcnet32_private.ltint], 0
        je      .L10
        mov     ebx, 5
        call    dword [pcnet32_access.read_csr]
        or      eax, (1 shl 14)
        call    dword [pcnet32_access.write_csr]
.L10:
        mov     eax, [pcnet32_private.options]
        and     eax, PCNET32_PORT_PORTSEL
        shl     eax, 7
        mov     [pcnet32_private.mode], ax
        mov     [pcnet32_private.filter], dword 0xffffffff
        mov     [pcnet32_private.filter+4], dword 0xffffffff
        call    pcnet32_init_ring
        mov     ebx, 1
        mov     eax, pcnet32_private
        sub     eax, OS_BASE
        and     eax, 0xffff
        call    dword [pcnet32_access.write_csr]
        mov     eax, pcnet32_private
        sub     eax, OS_BASE
        mov     ebx, 2
        shr     eax, 16
        call    dword [pcnet32_access.write_csr]
        mov     ebx, 4
        mov     eax, 0x0915
        call    dword [pcnet32_access.write_csr]
        mov     ebx, 0
        mov     eax, 1
        call    dword [pcnet32_access.write_csr]
        mov     ecx, 100
.L11:
        xor     ebx, ebx
        call    dword [pcnet32_access.read_csr]
        test    ax, 0x100
        jnz     .L12
        loop    .L11
.L12:
;    DEBUGF 1," K : hardware reset\n"
        xor     ebx, ebx
        mov     eax, 0x0002
        call    dword [pcnet32_access.write_csr]
        xor     ebx, ebx
        call    dword [pcnet32_access.read_csr]
;    DEBUGF 1," K : PCNET reset complete\n"
        ret
 
 
 
pcnet32_adjust_pci_device:
   ;*******Get current setting************************
        mov     al, 2                                   ;read a word
        mov     bh, [pci_dev]
        mov     ah, [pci_bus]
        mov     bl, 0x04                            ;from command Register
        call    pci_read_reg
   ;******see if its already set as bus master********
        mov     bx, ax
        and     bx, 5
        cmp     bx, 5
        je      pcnet32_adjust_pci_device_Latency
   ;******Make card a bus master*******
        mov     cx, ax                          ;value to write
        mov     bh, [pci_dev]
        mov     al, 2                           ;write a word
        or      cx, 5
        mov     ah, [pci_bus]
        mov     bl, 0x04                        ;to command register
        call    pci_write_reg
   ;******Check latency setting***********
pcnet32_adjust_pci_device_Latency:
   ;*******Get current latency setting************************
;   mov     al, 1                                       ;read a byte
;   mov     bh, [pci_dev]
;   mov     ah, [pci_bus]
;   mov     bl, 0x0D                                ;from Lantency Timer Register
;   call    pci_read_reg
   ;******see if its aat least 64 clocks********
;   cmp      ax,64
;   jge      pcnet32_adjust_pci_device_Done
   ;******Set latency to 32 clocks*******
;   mov     cx, 64                              ;value to write
;   mov     bh, [pci_dev]
;   mov     al, 1                               ;write a byte
;   mov     ah, [pci_bus]
;   mov     bl, 0x0D                            ;to Lantency Timer Register
;   call    pci_write_reg
   ;******Check latency setting***********
pcnet32_adjust_pci_device_Done:
        ret
 
 
 
 
pcnet32_probe:
        mov     ebp, [io_addr]
        call    pcnet32_wio_reset
        xor     ebx, ebx
        call    pcnet32_wio_read_csr
        cmp     eax, 4
        jne     .try_dwio
        call    pcnet32_wio_check
        and     al, al
        jz      .try_dwio
;    DEBUGF 1," K : Using WIO\n"
        mov     esi, pcnet32_wio
        jmp     .L1
.try_dwio:
        call    pcnet32_dwio_reset
        xor     ebx, ebx
        call    pcnet32_dwio_read_csr
        cmp     eax, 4
        jne     .no_dev
        call    pcnet32_dwio_check
        and     al, al
        jz      .no_dev
;    DEBUGF 1," K : Using DWIO\n"
        mov     esi, pcnet32_dwio
        jmp     .L1
.no_dev:
    DEBUGF 1," K : PCNET32 not found\n"
        ret
.L1:
        mov     edi, pcnet32_access
        mov     ecx, 7
        cld
        rep movsd
        mov     ebx, 88
        call    dword [pcnet32_access.read_csr]
        mov     ecx, eax
        mov     ebx, 89
        call    dword [pcnet32_access.read_csr]
        shl     eax, 16
        or      eax, ecx
        mov     ecx, eax
        and     ecx, 0xfff
        cmp     ecx, 3
        jne     .no_dev
        shr     eax, 12
        and     eax, 0xffff
        mov     [pcnet32_private.chip_version], eax
;    DEBUGF 1," K : PCNET32 chip version OK\n"
        mov     [pcnet32_private.fdx], 0
        mov     [pcnet32_private.mii], 0
        mov     [pcnet32_private.fset], 0
        mov     [pcnet32_private.dxsuflo], 0
        mov     [pcnet32_private.ltint], 0
        mov     eax, [pcnet32_private.chip_version]
        cmp     eax, 0x2420
        je      .L2
        cmp     eax, 0x2430
        je      .L3
        cmp     eax, 0x2621
        je      .L4
        cmp     eax, 0x2623
        je      .L5
        cmp     eax, 0x2624
        je      .L6
        cmp     eax, 0x2625
        je      .L7
        cmp     eax, 0x2626
        je      .L8
        cmp     eax, 0x2627
        je      .L9
    DEBUGF 1," K : Invalid chip rev\n"
        jmp     .no_dev
.L2:
;    DEBUGF 1," K : PCnet/PCI 79C970\n"
        jmp     .L10
.L3:
;    DEBUGF 1," K : PCnet/PCI 79C970\n"
        jmp     .L10
.L4:
;    DEBUGF 1," K : PCnet/PCI II 79C970A\n"
        mov     [pcnet32_private.fdx], 1
        jmp     .L10
.L5:
;    DEBUGF 1," K : PCnet/FAST 79C971\n"
        mov     [pcnet32_private.fdx], 1
        mov     [pcnet32_private.mii], 1
        mov     [pcnet32_private.fset], 1
        mov     [pcnet32_private.ltint], 1
        jmp     .L10
.L6:
;    DEBUGF 1," K : PCnet/FAST+ 79C972\n"
        mov     [pcnet32_private.fdx], 1
        mov     [pcnet32_private.mii], 1
        mov     [pcnet32_private.fset], 1
        jmp     .L10
.L7:
;    DEBUGF 1," K : PCnet/FAST III 79C973\n"
        mov     [pcnet32_private.fdx], 1
        mov     [pcnet32_private.mii], 1
        jmp     .L10
.L8:
;    DEBUGF 1," K : PCnet/Home 79C978\n"
        mov     [pcnet32_private.fdx], 1
        mov     ebx, 49
        call    dword [pcnet32_access.read_bcr]
        call    dword [pcnet32_access.write_bcr]
        jmp     .L10
.L9:
;    DEBUGF 1," K : PCnet/FAST III 79C975\n"
        mov     [pcnet32_private.fdx], 1
        mov     [pcnet32_private.mii], 1
.L10:
        cmp     [pcnet32_private.fset], 1
        jne     .L11
        mov     ebx, 18
        call    dword [pcnet32_access.read_bcr]
        or      eax, 0x800
        call    dword [pcnet32_access.write_bcr]
        mov     ebx, 80
        call    dword [pcnet32_access.read_csr]
        and     eax, 0xc00
        or      eax, 0xc00
        call    dword [pcnet32_access.write_csr]
        mov     [pcnet32_private.dxsuflo], 1
        mov     [pcnet32_private.ltint], 1
.L11:
    ; read MAC
        mov     edi, node_addr
        mov     edx, ebp
        mov     ecx, 6
.Lmac:
        in      al, dx
        stosb
        inc     edx
        loop    .Lmac
;    DEBUGF 1," K : MAC read\n"
        call    pcnet32_adjust_pci_device
;    DEBUGF 1," K : PCI done\n"
        mov     eax, PCNET32_PORT_ASEL
        mov     [pcnet32_private.options], eax
        mov     [pcnet32_private.mode], word 0x0003
        mov     [pcnet32_private.tlen_rlen], word (PCNET32_TX_RING_LEN_BITS or PCNET32_RX_RING_LEN_BITS)
        mov     esi, node_addr
        mov     edi, pcnet32_private.phys_addr
        cld
        movsd
        movsw
        mov     [pcnet32_private.filter], dword 0
        mov     [pcnet32_private.filter+4], dword 0
        mov     eax, pcnet32_rx_ring
        sub     eax, OS_BASE
        mov     dword [pcnet32_private.rx_ring], eax
 
        mov     eax, pcnet32_tx_ring
        sub     eax, OS_BASE
        mov     dword [pcnet32_private.tx_ring], eax
;    DEBUGF 1," K : Switching to 32\n"
        mov     ebx, 20
        mov     eax, 2
        call    dword [pcnet32_access.write_bcr]
        mov     ebx, 1
        mov     eax, (pcnet32_private and 0xffff)
        call    dword [pcnet32_access.write_csr]
        mov     ebx, 2
        mov     eax, (pcnet32_private shr 16) and 0xffff
        call    dword [pcnet32_access.write_csr]
        mov     ebx, 0
        mov     eax, 1
        call    dword [pcnet32_access.write_csr]
        mov     esi, 1
        call    delay_ms
        call    pcnet32_reset
        mov     eax, [pci_data]
        mov     [eth_status], eax
        ret
 
 
 
pcnet32_poll:
        xor     ax, ax
        mov     [eth_rx_data_len], ax
        mov     eax, [pcnet32_private.cur_rx]
        and     eax, PCNET32_RX_RING_MOD_MASK
        mov     ebx, eax
        imul    esi, eax, PCNET32_PKT_BUF_SZ
        add     esi, pcnet32_rxb
        shl     ebx, 4
        add     ebx, pcnet32_rx_ring
        mov     cx, [ebx+pcnet32_rx_head.status]
        test    cx, 0x8000
        jnz     .L1
        cmp     ch, 3
        jne     .L1
        mov     ecx, [ebx+pcnet32_rx_head.msg_length]
        and     ecx, 0xfff
        sub     ecx, 4
        mov     [eth_rx_data_len], cx
;    DEBUGF 1," K : PCNETRX: %ub\n",cx
        push    ecx
        shr     ecx, 2
        mov     edi, Ether_buffer
        cld
        rep movsd
        pop     ecx
        and     ecx, 3
        rep movsb
        mov     [ebx+pcnet32_rx_head.buf_length], word PCNET32_PKT_BUF_SZ_NEG
        or      [ebx+pcnet32_rx_head.status], word 0x8000
        inc     [pcnet32_private.cur_rx]
.L1:
        ret
 
 
 
 
;         Pointer to 48 bit destination address in edi
;         Type of packet in bx
;         size of packet in ecx
;         pointer to packet data in esi
pcnet32_xmit:
        push    edi
        push    esi
        push    ebx
        push    ecx
;    DEBUGF 1," K : PCNETTX\n"
        mov     esi, edi
        mov     edi, [pcnet32_private.cur_tx]
        imul    edi, PCNET32_PKT_BUF_SZ
        add     edi, pcnet32_txb; edi=ptxb
        mov     eax, edi
        cld     ; copy MAC
        movsd
        movsw
        mov     esi, node_addr
        cld
        movsd
        movsw
        mov     [edi], bx
        add     edi, 2
        mov     esi, [esp+8]
        mov     ecx, [esp]
        push    ecx
        shr     ecx, 2
        cld
        rep movsd
        pop     ecx
        and     ecx, 3
        rep movsb
;    mov ecx,[esp]
;    add ecx,14 ; ETH_HLEN
;    xor eax,eax
; pad to min length (60=ETH_ZLEN)
;    cmp ecx,60
;    jae .L1
;    sub ecx,60
;    cld
;    rep stosb
;.L1:
        mov     edi, pcnet32_tx_ring+0; entry=0
        mov     ecx, [esp]
        add     ecx, 14
        cmp     cx, 60
        jae     .L1
        mov     cx, 60
.L1:
        neg     cx
        mov     [edi+pcnet32_tx_head.length], cx
        mov     [edi+pcnet32_tx_head.misc], dword 0
        sub     eax, OS_BASE
        mov     [edi+pcnet32_tx_head.base], eax
        mov     [edi+pcnet32_tx_head.status], word 0x8300
    ; trigger an immediate send poll
        mov     ebx, 0
        mov     eax, 0x0008; 0x0048
        mov     ebp, [io_addr]
        call    dword [pcnet32_access.write_csr]
        mov     dword [pcnet32_private.cur_tx], 0
    ; wait for TX to complete
        mov     ecx, [timer_ticks];[0xfdf0]
        add     ecx, 100
.L2:
        mov     ax, [edi+pcnet32_tx_head.status]
        test    ax, 0x8000
        jz      .L3
        cmp     ecx, [timer_ticks];[0xfdf0]
        jb      .L4
        mov     esi, 10
        call    delay_ms
        jnz     .L2
.L4:
    DEBUGF 1," K : PCNET: Send timeout\n"
.L3:
        mov     dword [edi+pcnet32_tx_head.base], 0
        pop     ecx
        pop     ebx
        pop     esi
        pop     edi
        ret

Rev 781	Rev 2288
1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2	;; ;;	2	;; ;;
3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
4	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
5	;; ;;	5	;; ;;
6	;; PCNET32.INC ;;	6	;; PCNET32.INC ;;
7	;; ;;	7	;; ;;
8	;; Ethernet driver for Menuet OS ;;	8	;; Ethernet driver for Menuet OS ;;
9	;; ;;	9	;; ;;
10	;; - Version 1.0 31 July 2004: ;;	10	;; - Version 1.0 31 July 2004: ;;
11	;; Initial release ;;	11	;; Initial release ;;
12	;; ;;	12	;; ;;
13	;; - Version 1.01 29 March 2008: ;;	13	;; - Version 1.01 29 March 2008: ;;
14	;; Adapted to work with kolibrios flat kernel ;;	14	;; Adapted to work with kolibrios flat kernel ;;
15	;; Debug info is updated, and now uses DEBUGF macro ;;	15	;; Debug info is updated, and now uses DEBUGF macro ;;
16	;; by hidnplayr@kolibrios.org ;;	16	;; by hidnplayr@kolibrios.org ;;
17	;; ;;	17	;; ;;
18	;; This driver is based on the PCNet32 driver from ;;	18	;; This driver is based on the PCNet32 driver from ;;
19	;; the etherboot 5.0.6 project. The copyright statement is ;;	19	;; the etherboot 5.0.6 project. The copyright statement is ;;
20	;; ;;	20	;; ;;
21	;; GNU GENERAL PUBLIC LICENSE ;;	21	;; GNU GENERAL PUBLIC LICENSE ;;
22	;; Version 2, June 1991 ;;	22	;; Version 2, June 1991 ;;
23	;; ;;	23	;; ;;
24	;; remaining parts Copyright 2004 Jarek Pelczar, ;;	24	;; remaining parts Copyright 2004 Jarek Pelczar, ;;
25	;; jpelczar@interia.pl ;;	25	;; jpelczar@interia.pl ;;
26	;; ;;	26	;; ;;
27	;; See file COPYING for details ;;	27	;; See file COPYING for details ;;
28	;; ;;	28	;; ;;
29	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	29	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
30		30
31	$Revision: 781 $	31	$Revision: 2288 $
32		32
33		33
34	PCNET32_PORT_AUI equ 0x00	34	PCNET32_PORT_AUI equ 0x00
35	PCNET32_PORT_10BT equ 0x01	35	PCNET32_PORT_10BT equ 0x01
36	PCNET32_PORT_GPSI equ 0x02	36	PCNET32_PORT_GPSI equ 0x02
37	PCNET32_PORT_MII equ 0x03	37	PCNET32_PORT_MII equ 0x03
38	PCNET32_PORT_PORTSEL equ 0x03	38	PCNET32_PORT_PORTSEL equ 0x03
39	PCNET32_PORT_ASEL equ 0x04	39	PCNET32_PORT_ASEL equ 0x04
40	PCNET32_PORT_100 equ 0x40	40	PCNET32_PORT_100 equ 0x40
41	PCNET32_PORT_FD equ 0x80	41	PCNET32_PORT_FD equ 0x80
42	PCNET32_DMA_MASK equ 0xffffffff	42	PCNET32_DMA_MASK equ 0xffffffff
43		43
44	PCNET32_LOG_TX_BUFFERS equ 1	44	PCNET32_LOG_TX_BUFFERS equ 1
45	PCNET32_LOG_RX_BUFFERS equ 2	45	PCNET32_LOG_RX_BUFFERS equ 2
46		46
47	PCNET32_TX_RING_SIZE equ (1 shl PCNET32_LOG_TX_BUFFERS)	47	PCNET32_TX_RING_SIZE equ (1 shl PCNET32_LOG_TX_BUFFERS)
48	PCNET32_TX_RING_MOD_MASK equ (PCNET32_TX_RING_SIZE-1)	48	PCNET32_TX_RING_MOD_MASK equ (PCNET32_TX_RING_SIZE-1)
49	PCNET32_TX_RING_LEN_BITS equ 0	49	PCNET32_TX_RING_LEN_BITS equ 0
50	PCNET32_RX_RING_SIZE equ (1 shl PCNET32_LOG_RX_BUFFERS)	50	PCNET32_RX_RING_SIZE equ (1 shl PCNET32_LOG_RX_BUFFERS)
51	PCNET32_RX_RING_MOD_MASK equ (PCNET32_RX_RING_SIZE-1)	51	PCNET32_RX_RING_MOD_MASK equ (PCNET32_RX_RING_SIZE-1)
52	PCNET32_RX_RING_LEN_BITS equ (PCNET32_LOG_RX_BUFFERS shl 4)	52	PCNET32_RX_RING_LEN_BITS equ (PCNET32_LOG_RX_BUFFERS shl 4)
53	PCNET32_PKT_BUF_SZ equ 1544	53	PCNET32_PKT_BUF_SZ equ 1544
54	PCNET32_PKT_BUF_SZ_NEG equ 0xf9f8	54	PCNET32_PKT_BUF_SZ_NEG equ 0xf9f8
55		55
56	pcnet32_txb equ (eth_data_start)	56	pcnet32_txb equ (eth_data_start)
57	pcnet32_rxb equ ((pcnet32_txb+(PCNET32_PKT_BUF_SZ*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)	57	pcnet32_rxb equ ((pcnet32_txb+(PCNET32_PKT_BUF_SZ*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)
58	pcnet32_tx_ring equ ((pcnet32_rxb+(PCNET32_PKT_BUF_SZ*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)	58	pcnet32_tx_ring equ ((pcnet32_rxb+(PCNET32_PKT_BUF_SZ*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)
59	pcnet32_rx_ring equ ((pcnet32_tx_ring+(16*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)	59	pcnet32_rx_ring equ ((pcnet32_tx_ring+(16*PCNET32_TX_RING_SIZE)+0xf) and 0xfffffff0)
60		60
61	virtual at ((pcnet32_rx_ring+(16*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)	61	virtual at ((pcnet32_rx_ring+(16*PCNET32_RX_RING_SIZE)+0xf) and 0xfffffff0)
62	pcnet32_private:	62	pcnet32_private:
63	.mode dw ?	63	.mode dw ?
64	.tlen_rlen dw ?	64	.tlen_rlen dw ?
65	.phys_addr db ?,?,?,?,?,?	65	.phys_addr db ?,?,?,?,?,?
66	.reserved dw ?	66	.reserved dw ?
67	.filter dd ?,?	67	.filter dd ?,?
68	.rx_ring dd ?	68	.rx_ring dd ?
69	.tx_ring dd ?	69	.tx_ring dd ?
70	.cur_rx dd ?	70	.cur_rx dd ?
71	.cur_tx dd ?	71	.cur_tx dd ?
72	.dirty_rx dd ?	72	.dirty_rx dd ?
73	.dirty_tx dd ?	73	.dirty_tx dd ?
74	.tx_full db ?	74	.tx_full db ?
75	.options dd ?	75	.options dd ?
76	.full_duplex db ?	76	.full_duplex db ?
77	.chip_version dd ?	77	.chip_version dd ?
78	.mii db ?	78	.mii db ?
79	.ltint db ?	79	.ltint db ?
80	.dxsuflo db ?	80	.dxsuflo db ?
81	.fset db ?	81	.fset db ?
82	.fdx db ?	82	.fdx db ?
83	end virtual	83	end virtual
84		84
85	virtual at 0	85	virtual at 0
86	pcnet32_rx_head:	86	pcnet32_rx_head:
87	.base dd ?	87	.base dd ?
88	.buf_length dw ?	88	.buf_length dw ?
89	.status dw ?	89	.status dw ?
90	.msg_length dd ?	90	.msg_length dd ?
91	.reserved dd ?	91	.reserved dd ?
92	end virtual	92	end virtual
93		93
94	virtual at 0	94	virtual at 0
95	pcnet32_tx_head:	95	pcnet32_tx_head:
96	.base dd ?	96	.base dd ?
97	.length dw ?	97	.length dw ?
98	.status dw ?	98	.status dw ?
99	.misc dd ?	99	.misc dd ?
100	.reserved dd ?	100	.reserved dd ?
101	end virtual	101	end virtual
102		102
103	uglobal	103	uglobal
104	pcnet32_access:	104	pcnet32_access:
105	.read_csr dd ?	105	.read_csr dd ?
106	.write_csr dd ?	106	.write_csr dd ?
107	.read_bcr dd ?	107	.read_bcr dd ?
108	.write_bcr dd ?	108	.write_bcr dd ?
109	.read_rap dd ?	109	.read_rap dd ?
110	.write_rap dd ?	110	.write_rap dd ?
111	.reset dd ?	111	.reset dd ?
112	endg	112	endg
113		113
114	iglobal	114	iglobal
115	pcnet32_options_mapping:	115	pcnet32_options_mapping:
116	dd PCNET32_PORT_ASEL ; 0 Auto-select	116	dd PCNET32_PORT_ASEL ; 0 Auto-select
117	dd PCNET32_PORT_AUI ; 1 BNC/AUI	117	dd PCNET32_PORT_AUI ; 1 BNC/AUI
118	dd PCNET32_PORT_AUI ; 2 AUI/BNC	118	dd PCNET32_PORT_AUI ; 2 AUI/BNC
119	dd PCNET32_PORT_ASEL ; 3 not supported	119	dd PCNET32_PORT_ASEL ; 3 not supported
120	dd PCNET32_PORT_10BT or PCNET32_PORT_FD ; 4 10baseT-FD	120	dd PCNET32_PORT_10BT or PCNET32_PORT_FD ; 4 10baseT-FD
121	dd PCNET32_PORT_ASEL ; 5 not supported	121	dd PCNET32_PORT_ASEL ; 5 not supported
122	dd PCNET32_PORT_ASEL ; 6 not supported	122	dd PCNET32_PORT_ASEL ; 6 not supported
123	dd PCNET32_PORT_ASEL ; 7 not supported	123	dd PCNET32_PORT_ASEL ; 7 not supported
124	dd PCNET32_PORT_ASEL ; 8 not supported	124	dd PCNET32_PORT_ASEL ; 8 not supported
125	dd PCNET32_PORT_MII ; 9 MII 10baseT	125	dd PCNET32_PORT_MII ; 9 MII 10baseT
126	dd PCNET32_PORT_MII or PCNET32_PORT_FD ; 10 MII 10baseT-FD	126	dd PCNET32_PORT_MII or PCNET32_PORT_FD ; 10 MII 10baseT-FD
127	dd PCNET32_PORT_MII ; 11 MII (autosel)	127	dd PCNET32_PORT_MII ; 11 MII (autosel)
128	dd PCNET32_PORT_10BT ; 12 10BaseT	128	dd PCNET32_PORT_10BT ; 12 10BaseT
129	dd PCNET32_PORT_MII or PCNET32_PORT_100 ; 13 MII 100BaseTx	129	dd PCNET32_PORT_MII or PCNET32_PORT_100 ; 13 MII 100BaseTx
130	dd PCNET32_PORT_MII or PCNET32_PORT_100 or PCNET32_PORT_FD ; 14 MII 100BaseTx-FD	130	dd PCNET32_PORT_MII or PCNET32_PORT_100 or PCNET32_PORT_FD ; 14 MII 100BaseTx-FD
131	dd PCNET32_PORT_ASEL ; 15 not supported	131	dd PCNET32_PORT_ASEL ; 15 not supported
132	endg	132	endg
133		133
134	PCNET32_WIO_RDP equ 0x10	134	PCNET32_WIO_RDP equ 0x10
135	PCNET32_WIO_RAP equ 0x12	135	PCNET32_WIO_RAP equ 0x12
136	PCNET32_WIO_RESET equ 0x14	136	PCNET32_WIO_RESET equ 0x14
137	PCNET32_WIO_BDP equ 0x16	137	PCNET32_WIO_BDP equ 0x16
138	PCNET32_DWIO_RDP equ 0x10	138	PCNET32_DWIO_RDP equ 0x10
139	PCNET32_DWIO_RAP equ 0x14	139	PCNET32_DWIO_RAP equ 0x14
140	PCNET32_DWIO_RESET equ 0x18	140	PCNET32_DWIO_RESET equ 0x18
141	PCNET32_DWIO_BDP equ 0x1C	141	PCNET32_DWIO_BDP equ 0x1C
142	PCNET32_TOTAL_SIZE equ 0x20	142	PCNET32_TOTAL_SIZE equ 0x20
143	; ebx - index	143	; ebx - index
144	; return:	144	; return:
145	; eax - data	145	; eax - data
146	pcnet32_wio_read_csr:	146	pcnet32_wio_read_csr:
147	push edx	147	push edx
148	lea edx,[ebp+PCNET32_WIO_RAP]	148	lea edx, [ebp+PCNET32_WIO_RAP]
149	mov ax,bx	149	mov ax, bx
150	out dx,ax	150	out dx, ax
151	lea edx,[ebp+PCNET32_WIO_RDP]	151	lea edx, [ebp+PCNET32_WIO_RDP]
152	in ax,dx	152	in ax, dx
153	and eax,0xffff	153	and eax, 0xffff
154	pop edx	154	pop edx
155	ret	155	ret
156	; eax - data	156	; eax - data
157	; ebx - index	157	; ebx - index
158	pcnet32_wio_write_csr:	158	pcnet32_wio_write_csr:
159	push edx	159	push edx
160	lea edx,[ebp+PCNET32_WIO_RAP]	160	lea edx, [ebp+PCNET32_WIO_RAP]
161	xchg eax,ebx	161	xchg eax, ebx
162	out dx,ax	162	out dx, ax
163	xchg eax,ebx	163	xchg eax, ebx
164	lea edx,[ebp+PCNET32_WIO_RDP]	164	lea edx, [ebp+PCNET32_WIO_RDP]
165	out dx,ax	165	out dx, ax
166	pop edx	166	pop edx
167	ret	167	ret
168	; ebx - index	168	; ebx - index
169	; return:	169	; return:
170	; eax - data	170	; eax - data
171	pcnet32_wio_read_bcr:	171	pcnet32_wio_read_bcr:
172	push edx	172	push edx
173	lea edx,[ebp+PCNET32_WIO_RAP]	173	lea edx, [ebp+PCNET32_WIO_RAP]
174	mov ax,bx	174	mov ax, bx
175	out dx,ax	175	out dx, ax
176	lea edx,[ebp+PCNET32_WIO_BDP]	176	lea edx, [ebp+PCNET32_WIO_BDP]
177	in ax,dx	177	in ax, dx
178	and eax,0xffff	178	and eax, 0xffff
179	pop edx	179	pop edx
180	ret	180	ret
181	; eax - data	181	; eax - data
182	; ebx - index	182	; ebx - index
183	pcnet32_wio_write_bcr:	183	pcnet32_wio_write_bcr:
184	push edx	184	push edx
185	lea edx,[ebp+PCNET32_WIO_RAP]	185	lea edx, [ebp+PCNET32_WIO_RAP]
186	xchg eax,ebx	186	xchg eax, ebx
187	out dx,ax	187	out dx, ax
188	xchg eax,ebx	188	xchg eax, ebx
189	lea edx,[ebp+PCNET32_WIO_BDP]	189	lea edx, [ebp+PCNET32_WIO_BDP]
190	out dx,ax	190	out dx, ax
191	pop edx	191	pop edx
192	ret	192	ret
193	pcnet32_wio_read_rap:	193	pcnet32_wio_read_rap:
194	push edx	194	push edx
195	lea edx,[ebp+PCNET32_WIO_RAP]	195	lea edx, [ebp+PCNET32_WIO_RAP]
196	in ax,dx	196	in ax, dx
197	and eax,0xffff	197	and eax, 0xffff
198	pop edx	198	pop edx
199	ret	199	ret
200	; eax - val	200	; eax - val
201	pcnet32_wio_write_rap:	201	pcnet32_wio_write_rap:
202	push edx	202	push edx
203	lea edx,[ebp+PCNET32_WIO_RAP]	203	lea edx, [ebp+PCNET32_WIO_RAP]
204	out dx,ax	204	out dx, ax
205	pop edx	205	pop edx
206	ret	206	ret
207	pcnet32_wio_reset:	207	pcnet32_wio_reset:
208	push edx	208	push edx
209	push eax	209	push eax
210	lea edx,[ebp+PCNET32_WIO_RESET]	210	lea edx, [ebp+PCNET32_WIO_RESET]
211	in ax,dx	211	in ax, dx
212	pop eax	212	pop eax
213	pop edx	213	pop edx
214	ret	214	ret
215	pcnet32_wio_check:	215	pcnet32_wio_check:
216	push edx	216	push edx
217	mov ax,88	217	mov ax, 88
218	lea edx,[ebp+PCNET32_WIO_RAP]	218	lea edx, [ebp+PCNET32_WIO_RAP]
219	out dx,ax	219	out dx, ax
220	nop	220	nop
221	nop	221	nop
222	in ax,dx	222	in ax, dx
223	cmp ax,88	223	cmp ax, 88
224	sete al	224	sete al
225	pop edx	225	pop edx
226	ret	226	ret
227		227
228	iglobal	228	iglobal
229	pcnet32_wio:	229	pcnet32_wio:
230	dd pcnet32_wio_read_csr	230	dd pcnet32_wio_read_csr
231	dd pcnet32_wio_write_csr	231	dd pcnet32_wio_write_csr
232	dd pcnet32_wio_read_bcr	232	dd pcnet32_wio_read_bcr
233	dd pcnet32_wio_write_bcr	233	dd pcnet32_wio_write_bcr
234	dd pcnet32_wio_read_rap	234	dd pcnet32_wio_read_rap
235	dd pcnet32_wio_write_rap	235	dd pcnet32_wio_write_rap
236	dd pcnet32_wio_reset	236	dd pcnet32_wio_reset
237	endg	237	endg
238		238
239	; ebx - index	239	; ebx - index
240	; return:	240	; return:
241	; eax - data	241	; eax - data
242	pcnet32_dwio_read_csr:	242	pcnet32_dwio_read_csr:
243	push edx	243	push edx
244	lea edx,[ebp+PCNET32_DWIO_RAP]	244	lea edx, [ebp+PCNET32_DWIO_RAP]
245	mov ebx,eax	245	mov ebx, eax
246	out dx,eax	246	out dx, eax
247	lea edx,[ebp+PCNET32_DWIO_RDP]	247	lea edx, [ebp+PCNET32_DWIO_RDP]
248	in eax,dx	248	in eax, dx
249	and eax,0xffff	249	and eax, 0xffff
250	pop edx	250	pop edx
251	ret	251	ret
252	; ebx - index	252	; ebx - index
253	; eax - data	253	; eax - data
254	pcnet32_dwio_write_csr:	254	pcnet32_dwio_write_csr:
255	push edx	255	push edx
256	lea edx,[ebp+PCNET32_DWIO_RAP]	256	lea edx, [ebp+PCNET32_DWIO_RAP]
257	xchg eax,ebx	257	xchg eax, ebx
258	out dx,eax	258	out dx, eax
259	lea edx,[ebp+PCNET32_DWIO_RDP]	259	lea edx, [ebp+PCNET32_DWIO_RDP]
260	xchg eax,ebx	260	xchg eax, ebx
261	out dx,eax	261	out dx, eax
262	pop edx	262	pop edx
263	ret	263	ret
264	; ebx - index	264	; ebx - index
265	; return:	265	; return:
266	; eax - data	266	; eax - data
267	pcnet32_dwio_read_bcr:	267	pcnet32_dwio_read_bcr:
268	push edx	268	push edx
269	lea edx,[ebp+PCNET32_DWIO_RAP]	269	lea edx, [ebp+PCNET32_DWIO_RAP]
270	mov ebx,eax	270	mov ebx, eax
271	out dx,eax	271	out dx, eax
272	lea edx,[ebp+PCNET32_DWIO_BDP]	272	lea edx, [ebp+PCNET32_DWIO_BDP]
273	in eax,dx	273	in eax, dx
274	and eax,0xffff	274	and eax, 0xffff
275	pop edx	275	pop edx
276	ret	276	ret
277	; ebx - index	277	; ebx - index
278	; eax - data	278	; eax - data
279	pcnet32_dwio_write_bcr:	279	pcnet32_dwio_write_bcr:
280	push edx	280	push edx
281	lea edx,[ebp+PCNET32_DWIO_RAP]	281	lea edx, [ebp+PCNET32_DWIO_RAP]
282	xchg eax,ebx	282	xchg eax, ebx
283	out dx,eax	283	out dx, eax
284	lea edx,[ebp+PCNET32_DWIO_BDP]	284	lea edx, [ebp+PCNET32_DWIO_BDP]
285	xchg eax,ebx	285	xchg eax, ebx
286	out dx,eax	286	out dx, eax
287	pop edx	287	pop edx
288	ret	288	ret
289	pcnet32_dwio_read_rap:	289	pcnet32_dwio_read_rap:
290	push edx	290	push edx
291	lea edx,[ebp+PCNET32_DWIO_RAP]	291	lea edx, [ebp+PCNET32_DWIO_RAP]
292	in eax,dx	292	in eax, dx
293	and eax,0xffff	293	and eax, 0xffff
294	pop edx	294	pop edx
295	ret	295	ret
296	; eax - val	296	; eax - val
297	pcnet32_dwio_write_rap:	297	pcnet32_dwio_write_rap:
298	push edx	298	push edx
299	lea edx,[ebp+PCNET32_DWIO_RAP]	299	lea edx, [ebp+PCNET32_DWIO_RAP]
300	out dx,eax	300	out dx, eax
301	pop edx	301	pop edx
302	ret	302	ret
303	pcnet32_dwio_reset:	303	pcnet32_dwio_reset:
304	push edx	304	push edx
305	push eax	305	push eax
306	lea edx,[ebp+PCNET32_DWIO_RESET]	306	lea edx, [ebp+PCNET32_DWIO_RESET]
307	in eax,dx	307	in eax, dx
308	pop eax	308	pop eax
309	pop edx	309	pop edx
310	ret	310	ret
311	pcnet32_dwio_check:	311	pcnet32_dwio_check:
312	push edx	312	push edx
313	lea edx,[PCNET32_DWIO_RAP]	313	lea edx, [PCNET32_DWIO_RAP]
314	mov eax,88	314	mov eax, 88
315	out dx,eax	315	out dx, eax
316	nop	316	nop
317	nop	317	nop
318	in eax,dx	318	in eax, dx
319	and eax,0xffff	319	and eax, 0xffff
320	cmp eax,88	320	cmp eax, 88
321	sete al	321	sete al
322	pop edx	322	pop edx
323	ret	323	ret
324		324
325	iglobal	325	iglobal
326	pcnet32_dwio:	326	pcnet32_dwio:
327	dd pcnet32_dwio_read_csr	327	dd pcnet32_dwio_read_csr
328	dd pcnet32_dwio_write_csr	328	dd pcnet32_dwio_write_csr
329	dd pcnet32_dwio_read_bcr	329	dd pcnet32_dwio_read_bcr
330	dd pcnet32_dwio_write_bcr	330	dd pcnet32_dwio_write_bcr
331	dd pcnet32_dwio_read_rap	331	dd pcnet32_dwio_read_rap
332	dd pcnet32_dwio_write_rap	332	dd pcnet32_dwio_write_rap
333	dd pcnet32_dwio_reset	333	dd pcnet32_dwio_reset
334	endg	334	endg
335		335
336		336
337		337
338	pcnet32_init_ring:	338	pcnet32_init_ring:
339	mov [pcnet32_private.tx_full],0	339	mov [pcnet32_private.tx_full], 0
340	mov [pcnet32_private.cur_rx],0	340	mov [pcnet32_private.cur_rx], 0
341	mov [pcnet32_private.cur_tx],0	341	mov [pcnet32_private.cur_tx], 0
342	mov [pcnet32_private.dirty_rx],0	342	mov [pcnet32_private.dirty_rx], 0
343	mov [pcnet32_private.dirty_tx],0	343	mov [pcnet32_private.dirty_tx], 0
344	mov edi,pcnet32_rx_ring	344	mov edi, pcnet32_rx_ring
345	mov ecx,PCNET32_RX_RING_SIZE	345	mov ecx, PCNET32_RX_RING_SIZE
346	mov ebx,pcnet32_rxb	346	mov ebx, pcnet32_rxb
347	sub ebx,OS_BASE	347	sub ebx, OS_BASE
348	.rx_init:	348	.rx_init:
349	mov [edi+pcnet32_rx_head.base],ebx	349	mov [edi+pcnet32_rx_head.base], ebx
350	mov [edi+pcnet32_rx_head.buf_length],word PCNET32_PKT_BUF_SZ_NEG	350	mov [edi+pcnet32_rx_head.buf_length], word PCNET32_PKT_BUF_SZ_NEG
351	mov [edi+pcnet32_rx_head.status],word 0x8000	351	mov [edi+pcnet32_rx_head.status], word 0x8000
352	add ebx,PCNET32_PKT_BUF_SZ	352	add ebx, PCNET32_PKT_BUF_SZ
353	; inc ebx	353	; inc ebx
354	add edi,16	354	add edi, 16
355	loop .rx_init	355	loop .rx_init
356	mov edi,pcnet32_tx_ring	356	mov edi, pcnet32_tx_ring
357	mov ecx,PCNET32_TX_RING_SIZE	357	mov ecx, PCNET32_TX_RING_SIZE
358	.tx_init:	358	.tx_init:
359	mov [edi+pcnet32_tx_head.base],dword 0	359	mov [edi+pcnet32_tx_head.base], dword 0
360	mov [edi+pcnet32_tx_head.status],word 0	360	mov [edi+pcnet32_tx_head.status], word 0
361	add edi,16	361	add edi, 16
362	loop .tx_init	362	loop .tx_init
363	mov [pcnet32_private.tlen_rlen],(PCNET32_TX_RING_LEN_BITS or PCNET32_RX_RING_LEN_BITS)	363	mov [pcnet32_private.tlen_rlen], (PCNET32_TX_RING_LEN_BITS or PCNET32_RX_RING_LEN_BITS)
364	mov esi,node_addr	364	mov esi, node_addr
365	mov edi,pcnet32_private.phys_addr	365	mov edi, pcnet32_private.phys_addr
366	cld	366	cld
367	movsd	367	movsd
368	movsw	368	movsw
369	mov eax,pcnet32_rx_ring	369	mov eax, pcnet32_rx_ring
370	sub eax,OS_BASE	370	sub eax, OS_BASE
371	mov dword [pcnet32_private.rx_ring],eax	371	mov dword [pcnet32_private.rx_ring], eax
372		372
373	mov eax,pcnet32_tx_ring	373	mov eax, pcnet32_tx_ring
374	sub eax,OS_BASE	374	sub eax, OS_BASE
375	mov dword [pcnet32_private.tx_ring],eax	375	mov dword [pcnet32_private.tx_ring], eax
376	ret	376	ret
377		377
378		378
379		379
380	pcnet32_reset:	380	pcnet32_reset:
381	; Reset PCNET32	381	; Reset PCNET32
382	mov ebp,[io_addr]	382	mov ebp, [io_addr]
383	call dword [pcnet32_access.reset]	383	call dword [pcnet32_access.reset]
384	; set 32bit mode	384	; set 32bit mode
385	mov ebx,20	385	mov ebx, 20
386	mov eax,2	386	mov eax, 2
387	call dword [pcnet32_access.write_bcr]	387	call dword [pcnet32_access.write_bcr]
388	; set/reset autoselect bit	388	; set/reset autoselect bit
389	mov ebx,2	389	mov ebx, 2
390	call dword [pcnet32_access.read_bcr]	390	call dword [pcnet32_access.read_bcr]
391	and eax,not 2	391	and eax, not 2
392	test [pcnet32_private.options],PCNET32_PORT_ASEL	392	test [pcnet32_private.options], PCNET32_PORT_ASEL
393	jz .L1	393	jz .L1
394	or eax,2	394	or eax, 2
395	.L1:	395	.L1:
396	call dword [pcnet32_access.write_bcr]	396	call dword [pcnet32_access.write_bcr]
397	; Handle full duplex setting	397	; Handle full duplex setting
398	cmp byte [pcnet32_private.full_duplex],0	398	cmp byte [pcnet32_private.full_duplex], 0
399	je .L2	399	je .L2
400	mov ebx,9	400	mov ebx, 9
401	call dword [pcnet32_access.read_bcr]	401	call dword [pcnet32_access.read_bcr]
402	and eax,not 3	402	and eax, not 3
403	test [pcnet32_private.options],PCNET32_PORT_FD	403	test [pcnet32_private.options], PCNET32_PORT_FD
404	jz .L3	404	jz .L3
405	or eax,1	405	or eax, 1
406	cmp [pcnet32_private.options],PCNET32_PORT_FD or PCNET32_PORT_AUI	406	cmp [pcnet32_private.options], PCNET32_PORT_FD or PCNET32_PORT_AUI
407	jne .L4	407	jne .L4
408	or eax,2	408	or eax, 2
409	jmp .L4	409	jmp .L4
410	.L3:	410	.L3:
411	test [pcnet32_private.options],PCNET32_PORT_ASEL	411	test [pcnet32_private.options], PCNET32_PORT_ASEL
412	jz .L4	412	jz .L4
413	cmp [pcnet32_private.chip_version],0x2627	413	cmp [pcnet32_private.chip_version], 0x2627
414	jne .L4	414	jne .L4
415	or eax,3	415	or eax, 3
416	.L4:	416	.L4:
417	mov ebx,9	417	mov ebx, 9
418	call dword [pcnet32_access.write_bcr]	418	call dword [pcnet32_access.write_bcr]
419	.L2:	419	.L2:
420	; set/reset GPSI bit	420	; set/reset GPSI bit
421	mov ebx,124	421	mov ebx, 124
422	call dword [pcnet32_access.read_csr]	422	call dword [pcnet32_access.read_csr]
423	mov ecx,[pcnet32_private.options]	423	mov ecx, [pcnet32_private.options]
424	and ecx,PCNET32_PORT_PORTSEL	424	and ecx, PCNET32_PORT_PORTSEL
425	cmp ecx,PCNET32_PORT_GPSI	425	cmp ecx, PCNET32_PORT_GPSI
426	jne .L5	426	jne .L5
427	or eax,0x10	427	or eax, 0x10
428	.L5:	428	.L5:
429	call dword [pcnet32_access.write_csr]	429	call dword [pcnet32_access.write_csr]
430	cmp [pcnet32_private.mii],0	430	cmp [pcnet32_private.mii], 0
431	je .L6	431	je .L6
432	test [pcnet32_private.options],PCNET32_PORT_ASEL	432	test [pcnet32_private.options], PCNET32_PORT_ASEL
433	jnz .L6	433	jnz .L6
434	mov ebx,32	434	mov ebx, 32
435	call dword [pcnet32_access.read_bcr]	435	call dword [pcnet32_access.read_bcr]
436	and eax,not 0x38	436	and eax, not 0x38
437	test [pcnet32_private.options],PCNET32_PORT_FD	437	test [pcnet32_private.options], PCNET32_PORT_FD
438	jz .L7	438	jz .L7
439	or eax,0x10	439	or eax, 0x10
440	.L7:	440	.L7:
441	test [pcnet32_private.options],PCNET32_PORT_100	441	test [pcnet32_private.options], PCNET32_PORT_100
442	jz .L8	442	jz .L8
443	or eax,0x08	443	or eax, 0x08
444	.L8:	444	.L8:
445	call dword [pcnet32_access.write_bcr]	445	call dword [pcnet32_access.write_bcr]
446	jmp .L9	446	jmp .L9
447	.L6:	447	.L6:
448	test [pcnet32_private.options],PCNET32_PORT_ASEL	448	test [pcnet32_private.options], PCNET32_PORT_ASEL
449	jz .L9	449	jz .L9
450	mov ebx,32	450	mov ebx, 32
451	; DEBUGF 1," K : ASEL, enable auto-negotiation\n"	451	; DEBUGF 1," K : ASEL, enable auto-negotiation\n"
452	call dword [pcnet32_access.read_bcr]	452	call dword [pcnet32_access.read_bcr]
453	and eax,not 0x98	453	and eax, not 0x98
454	or eax,0x20	454	or eax, 0x20
455	call dword [pcnet32_access.write_bcr]	455	call dword [pcnet32_access.write_bcr]
456	.L9:	456	.L9:
457	cmp [pcnet32_private.ltint],0	457	cmp [pcnet32_private.ltint], 0
458	je .L10	458	je .L10
459	mov ebx,5	459	mov ebx, 5
460	call dword [pcnet32_access.read_csr]	460	call dword [pcnet32_access.read_csr]
461	or eax,(1 shl 14)	461	or eax, (1 shl 14)
462	call dword [pcnet32_access.write_csr]	462	call dword [pcnet32_access.write_csr]
463	.L10:	463	.L10:
464	mov eax,[pcnet32_private.options]	464	mov eax, [pcnet32_private.options]
465	and eax,PCNET32_PORT_PORTSEL	465	and eax, PCNET32_PORT_PORTSEL
466	shl eax,7	466	shl eax, 7
467	mov [pcnet32_private.mode],ax	467	mov [pcnet32_private.mode], ax
468	mov [pcnet32_private.filter],dword 0xffffffff	468	mov [pcnet32_private.filter], dword 0xffffffff
469	mov [pcnet32_private.filter+4],dword 0xffffffff	469	mov [pcnet32_private.filter+4], dword 0xffffffff
470	call pcnet32_init_ring	470	call pcnet32_init_ring
471	mov ebx,1	471	mov ebx, 1
472	mov eax,pcnet32_private	472	mov eax, pcnet32_private
473	sub eax,OS_BASE	473	sub eax, OS_BASE
474	and eax,0xffff	474	and eax, 0xffff
475	call dword [pcnet32_access.write_csr]	475	call dword [pcnet32_access.write_csr]
476	mov eax,pcnet32_private	476	mov eax, pcnet32_private
477	sub eax,OS_BASE	477	sub eax, OS_BASE
478	mov ebx,2	478	mov ebx, 2
479	shr eax,16	479	shr eax, 16
480	call dword [pcnet32_access.write_csr]	480	call dword [pcnet32_access.write_csr]
481	mov ebx,4	481	mov ebx, 4
482	mov eax,0x0915	482	mov eax, 0x0915
483	call dword [pcnet32_access.write_csr]	483	call dword [pcnet32_access.write_csr]
484	mov ebx,0	484	mov ebx, 0
485	mov eax,1	485	mov eax, 1
486	call dword [pcnet32_access.write_csr]	486	call dword [pcnet32_access.write_csr]
487	mov ecx,100	487	mov ecx, 100
488	.L11:	488	.L11:
489	xor ebx,ebx	489	xor ebx, ebx
490	call dword [pcnet32_access.read_csr]	490	call dword [pcnet32_access.read_csr]
491	test ax,0x100	491	test ax, 0x100
492	jnz .L12	492	jnz .L12
493	loop .L11	493	loop .L11
494	.L12:	494	.L12:
495	; DEBUGF 1," K : hardware reset\n"	495	; DEBUGF 1," K : hardware reset\n"
496	xor ebx,ebx	496	xor ebx, ebx
497	mov eax,0x0002	497	mov eax, 0x0002
498	call dword [pcnet32_access.write_csr]	498	call dword [pcnet32_access.write_csr]
499	xor ebx,ebx	499	xor ebx, ebx
500	call dword [pcnet32_access.read_csr]	500	call dword [pcnet32_access.read_csr]

Subversion Repositories Kolibri OS

(root)/kernel/trunk/network/eth_drv/drivers/pcnet32.inc – Rev 781 → 2288