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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
7 | 7 | ||
8 | $Revision: 9608 $ |
8 | $Revision: 9709 $ |
9 | 9 | ||
10 | 10 | ||
11 | dpl0 = 10010000b ; data read dpl0 |
11 | dpl0 = 10010000b ; data read dpl0 |
12 | drw0 = 10010010b ; data read/write dpl0 |
12 | drw0 = 10010010b ; data read/write dpl0 |
13 | drw3 = 11110010b ; data read/write dpl3 |
13 | drw3 = 11110010b ; data read/write dpl3 |
14 | cpl0 = 10011010b ; code read dpl0 |
14 | cpl0 = 10011010b ; code read dpl0 |
15 | cpl3 = 11111010b ; code read dpl3 |
15 | cpl3 = 11111010b ; code read dpl3 |
16 | 16 | ||
17 | D32 = 01000000b ; 32bit segment |
17 | D32 = 01000000b ; 32bit segment |
18 | G32 = 10000000b ; page gran |
18 | G32 = 10000000b ; page gran |
19 | 19 | ||
20 | ;;;;;;;;;;; task manager errors ;;;;;;;;;; |
20 | ;;;;;;;;;;; task manager errors ;;;;;;;;;; |
21 | 21 | ||
22 | TASKMAN_ERROR_OUT_OF_MEMORY = 30 ; 0x1E |
22 | TASKMAN_ERROR_OUT_OF_MEMORY = 30 ; 0x1E |
23 | TASKMAN_ERROR_NOT_A_EXECUTABLE = 31 ; 0x1F |
23 | TASKMAN_ERROR_NOT_A_EXECUTABLE = 31 ; 0x1F |
24 | TASKMAN_ERROR_TOO_MANY_PROCESSES = 32 ; 0x20 |
24 | TASKMAN_ERROR_TOO_MANY_PROCESSES = 32 ; 0x20 |
25 | 25 | ||
26 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
26 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
27 | 27 | ||
28 | CPU_386 = 3 |
28 | CPU_386 = 3 |
29 | CPU_486 = 4 |
29 | CPU_486 = 4 |
30 | CPU_PENTIUM = 5 |
30 | CPU_PENTIUM = 5 |
31 | CPU_P6 = 6 |
31 | CPU_P6 = 6 |
32 | CPU_PENTIUM4 = 0x0F |
32 | CPU_PENTIUM4 = 0x0F |
33 | 33 | ||
34 | CAPS_FPU = 00 ;on-chip x87 floating point unit |
34 | CAPS_FPU = 00 ;on-chip x87 floating point unit |
35 | CAPS_VME = 01 ;virtual-mode enhancements |
35 | CAPS_VME = 01 ;virtual-mode enhancements |
36 | CAPS_DE = 02 ;debugging extensions |
36 | CAPS_DE = 02 ;debugging extensions |
37 | CAPS_PSE = 03 ;page-size extensions |
37 | CAPS_PSE = 03 ;page-size extensions |
38 | CAPS_TSC = 04 ;time stamp counter |
38 | CAPS_TSC = 04 ;time stamp counter |
39 | CAPS_MSR = 05 ;model-specific registers |
39 | CAPS_MSR = 05 ;model-specific registers |
40 | CAPS_PAE = 06 ;physical-address extensions |
40 | CAPS_PAE = 06 ;physical-address extensions |
41 | CAPS_MCE = 07 ;machine check exception |
41 | CAPS_MCE = 07 ;machine check exception |
42 | CAPS_CX8 = 08 ;CMPXCHG8B instruction |
42 | CAPS_CX8 = 08 ;CMPXCHG8B instruction |
43 | CAPS_APIC = 09 ;on-chip advanced programmable |
43 | CAPS_APIC = 09 ;on-chip advanced programmable |
44 | ;interrupt controller |
44 | ;interrupt controller |
45 | ; 10 ;unused |
45 | ; 10 ;unused |
46 | CAPS_SEP = 11 ;SYSENTER and SYSEXIT instructions |
46 | CAPS_SEP = 11 ;SYSENTER and SYSEXIT instructions |
47 | CAPS_MTRR = 12 ;memory-type range registers |
47 | CAPS_MTRR = 12 ;memory-type range registers |
48 | CAPS_PGE = 13 ;page global extension |
48 | CAPS_PGE = 13 ;page global extension |
49 | CAPS_MCA = 14 ;machine check architecture |
49 | CAPS_MCA = 14 ;machine check architecture |
50 | CAPS_CMOV = 15 ;conditional move instructions |
50 | CAPS_CMOV = 15 ;conditional move instructions |
51 | CAPS_PAT = 16 ;page attribute table |
51 | CAPS_PAT = 16 ;page attribute table |
52 | 52 | ||
53 | CAPS_PSE36 = 17 ;page-size extensions |
53 | CAPS_PSE36 = 17 ;page-size extensions |
54 | CAPS_PSN = 18 ;processor serial number |
54 | CAPS_PSN = 18 ;processor serial number |
55 | CAPS_CLFLUSH = 19 ;CLFUSH instruction |
55 | CAPS_CLFLUSH = 19 ;CLFUSH instruction |
56 | 56 | ||
57 | CAPS_DS = 21 ;debug store |
57 | CAPS_DS = 21 ;debug store |
58 | CAPS_ACPI = 22 ;thermal monitor and software |
58 | CAPS_ACPI = 22 ;thermal monitor and software |
59 | ;controlled clock supported |
59 | ;controlled clock supported |
60 | CAPS_MMX = 23 ;MMX instructions |
60 | CAPS_MMX = 23 ;MMX instructions |
61 | CAPS_FXSR = 24 ;FXSAVE and FXRSTOR instructions |
61 | CAPS_FXSR = 24 ;FXSAVE and FXRSTOR instructions |
62 | CAPS_SSE = 25 ;SSE instructions |
62 | CAPS_SSE = 25 ;SSE instructions |
63 | CAPS_SSE2 = 26 ;SSE2 instructions |
63 | CAPS_SSE2 = 26 ;SSE2 instructions |
64 | CAPS_SS = 27 ;self-snoop |
64 | CAPS_SS = 27 ;self-snoop |
65 | CAPS_HTT = 28 ;hyper-threading technology |
65 | CAPS_HTT = 28 ;hyper-threading technology |
66 | CAPS_TM = 29 ;thermal monitor supported |
66 | CAPS_TM = 29 ;thermal monitor supported |
67 | CAPS_IA64 = 30 ;IA64 capabilities |
67 | CAPS_IA64 = 30 ;IA64 capabilities |
68 | CAPS_PBE = 31 ;pending break enable |
68 | CAPS_PBE = 31 ;pending break enable |
69 | 69 | ||
70 | ;ecx |
70 | ;ecx |
71 | CAPS_SSE3 = 32 ;SSE3 instructions |
71 | CAPS_SSE3 = 32 ;SSE3 instructions |
72 | ; 33 |
72 | ; 33 |
73 | ; 34 |
73 | ; 34 |
74 | CAPS_MONITOR = 35 ;MONITOR/MWAIT instructions |
74 | CAPS_MONITOR = 35 ;MONITOR/MWAIT instructions |
75 | CAPS_DS_CPL = 36 ; |
75 | CAPS_DS_CPL = 36 ; |
76 | CAPS_VMX = 37 ;virtual mode extensions |
76 | CAPS_VMX = 37 ;virtual mode extensions |
77 | ; 38 ; |
77 | ; 38 ; |
78 | CAPS_EST = 39 ;enhansed speed step |
78 | CAPS_EST = 39 ;enhansed speed step |
79 | CAPS_TM2 = 40 ;thermal monitor2 supported |
79 | CAPS_TM2 = 40 ;thermal monitor2 supported |
80 | ; 41 |
80 | ; 41 |
81 | CAPS_CID = 42 ; |
81 | CAPS_CID = 42 ; |
82 | ; 43 |
82 | ; 43 |
83 | ; 44 |
83 | ; 44 |
84 | CAPS_CX16 = 45 ;CMPXCHG16B instruction |
84 | CAPS_CX16 = 45 ;CMPXCHG16B instruction |
85 | CAPS_xTPR = 46 ; |
85 | CAPS_xTPR = 46 ; |
86 | CAPS_XSAVE = 32 + 26 ; XSAVE and XRSTOR instructions |
86 | CAPS_XSAVE = 32 + 26 ; XSAVE and XRSTOR instructions |
87 | CAPS_OSXSAVE = 32 + 27 |
87 | CAPS_OSXSAVE = 32 + 27 |
88 | ; A value of 1 indicates that the OS has set CR4.OSXSAVE[bit 18] to enable |
88 | ; A value of 1 indicates that the OS has set CR4.OSXSAVE[bit 18] to enable |
89 | ; XSETBV/XGETBV instructions to access XCR0 and to support processor extended |
89 | ; XSETBV/XGETBV instructions to access XCR0 and to support processor extended |
90 | ; state management using XSAVE/XRSTOR. |
90 | ; state management using XSAVE/XRSTOR. |
91 | CAPS_AVX = 32 + 28 ; not AVX2 |
91 | CAPS_AVX = 32 + 28 ; not AVX2 |
92 | ; |
92 | ; |
93 | ;reserved |
93 | ;reserved |
94 | ; |
94 | ; |
95 | ;ext edx /ecx |
95 | ;ext edx /ecx |
96 | CAPS_SYSCAL = 64 ; |
96 | CAPS_SYSCAL = 64 ; |
97 | CAPS_XD = 65 ;execution disable |
97 | CAPS_XD = 65 ;execution disable |
98 | CAPS_FFXSR = 66 ; |
98 | CAPS_FFXSR = 66 ; |
99 | CAPS_RDTSCP = 67 ; |
99 | CAPS_RDTSCP = 67 ; |
100 | CAPS_X64 = 68 ; |
100 | CAPS_X64 = 68 ; |
101 | CAPS_3DNOW = 69 ; |
101 | CAPS_3DNOW = 69 ; |
102 | CAPS_3DNOWEXT = 70 ; |
102 | CAPS_3DNOWEXT = 70 ; |
103 | CAPS_LAHF = 71 ; |
103 | CAPS_LAHF = 71 ; |
104 | CAPS_CMP_LEG = 72 ; |
104 | CAPS_CMP_LEG = 72 ; |
105 | CAPS_SVM = 73 ;secure virual machine |
105 | CAPS_SVM = 73 ;secure virual machine |
106 | CAPS_ALTMOVCR8 = 74 ; |
106 | CAPS_ALTMOVCR8 = 74 ; |
107 | 107 | ||
108 | ; CPU MSR names |
108 | ; CPU MSR names |
109 | MSR_SYSENTER_CS = 0x174 |
109 | MSR_SYSENTER_CS = 0x174 |
110 | MSR_SYSENTER_ESP = 0x175 |
110 | MSR_SYSENTER_ESP = 0x175 |
111 | MSR_SYSENTER_EIP = 0x176 |
111 | MSR_SYSENTER_EIP = 0x176 |
112 | MSR_CR_PAT = 0x277 |
112 | MSR_CR_PAT = 0x277 |
113 | MSR_MTRR_DEF_TYPE = 0x2FF |
113 | MSR_MTRR_DEF_TYPE = 0x2FF |
114 | 114 | ||
115 | MSR_AMD_EFER = 0xC0000080 ; Extended Feature Enable Register |
115 | MSR_AMD_EFER = 0xC0000080 ; Extended Feature Enable Register |
116 | MSR_AMD_STAR = 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
116 | MSR_AMD_STAR = 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
117 | 117 | ||
118 | CR0_PE = 0x00000001 ;protected mode |
118 | CR0_PE = 0x00000001 ;protected mode |
119 | CR0_MP = 0x00000002 ;monitor fpu |
119 | CR0_MP = 0x00000002 ;monitor fpu |
120 | CR0_EM = 0x00000004 ;fpu emulation |
120 | CR0_EM = 0x00000004 ;fpu emulation |
121 | CR0_TS = 0x00000008 ;task switch |
121 | CR0_TS = 0x00000008 ;task switch |
122 | CR0_ET = 0x00000010 ;extension type hardcoded to 1 |
122 | CR0_ET = 0x00000010 ;extension type hardcoded to 1 |
123 | CR0_NE = 0x00000020 ;numeric error |
123 | CR0_NE = 0x00000020 ;numeric error |
124 | CR0_WP = 0x00010000 ;write protect |
124 | CR0_WP = 0x00010000 ;write protect |
125 | CR0_AM = 0x00040000 ;alignment check |
125 | CR0_AM = 0x00040000 ;alignment check |
126 | CR0_NW = 0x20000000 ;not write-through |
126 | CR0_NW = 0x20000000 ;not write-through |
127 | CR0_CD = 0x40000000 ;cache disable |
127 | CR0_CD = 0x40000000 ;cache disable |
128 | CR0_PG = 0x80000000 ;paging |
128 | CR0_PG = 0x80000000 ;paging |
129 | 129 | ||
130 | 130 | ||
131 | CR4_VME = 0x000001 |
131 | CR4_VME = 0x000001 |
132 | CR4_PVI = 0x000002 |
132 | CR4_PVI = 0x000002 |
133 | CR4_TSD = 0x000004 |
133 | CR4_TSD = 0x000004 |
134 | CR4_DE = 0x000008 |
134 | CR4_DE = 0x000008 |
135 | CR4_PSE = 0x000010 |
135 | CR4_PSE = 0x000010 |
136 | CR4_PAE = 0x000020 |
136 | CR4_PAE = 0x000020 |
137 | CR4_MCE = 0x000040 |
137 | CR4_MCE = 0x000040 |
138 | CR4_PGE = 0x000080 |
138 | CR4_PGE = 0x000080 |
139 | CR4_PCE = 0x000100 |
139 | CR4_PCE = 0x000100 |
140 | CR4_OSFXSR = 0x000200 |
140 | CR4_OSFXSR = 0x000200 |
141 | CR4_OSXMMEXPT = 0x000400 |
141 | CR4_OSXMMEXPT = 0x000400 |
142 | CR4_OSXSAVE = 0x040000 |
142 | CR4_OSXSAVE = 0x040000 |
143 | 143 | ||
144 | XCR0_FPU_MMX = 0x0001 |
144 | XCR0_FPU_MMX = 0x0001 |
145 | XCR0_SSE = 0x0002 |
145 | XCR0_SSE = 0x0002 |
146 | XCR0_AVX = 0x0004 |
146 | XCR0_AVX = 0x0004 |
147 | XCR0_MPX = 0x0018 |
147 | XCR0_MPX = 0x0018 |
148 | XCR0_AVX512 = 0x00e0 |
148 | XCR0_AVX512 = 0x00e0 |
149 | 149 | ||
150 | MXCSR_IE = 0x0001 |
150 | MXCSR_IE = 0x0001 |
151 | MXCSR_DE = 0x0002 |
151 | MXCSR_DE = 0x0002 |
152 | MXCSR_ZE = 0x0004 |
152 | MXCSR_ZE = 0x0004 |
153 | MXCSR_OE = 0x0008 |
153 | MXCSR_OE = 0x0008 |
154 | MXCSR_UE = 0x0010 |
154 | MXCSR_UE = 0x0010 |
155 | MXCSR_PE = 0x0020 |
155 | MXCSR_PE = 0x0020 |
156 | MXCSR_DAZ = 0x0040 |
156 | MXCSR_DAZ = 0x0040 |
157 | MXCSR_IM = 0x0080 |
157 | MXCSR_IM = 0x0080 |
158 | MXCSR_DM = 0x0100 |
158 | MXCSR_DM = 0x0100 |
159 | MXCSR_ZM = 0x0200 |
159 | MXCSR_ZM = 0x0200 |
160 | MXCSR_OM = 0x0400 |
160 | MXCSR_OM = 0x0400 |
161 | MXCSR_UM = 0x0800 |
161 | MXCSR_UM = 0x0800 |
162 | MXCSR_PM = 0x1000 |
162 | MXCSR_PM = 0x1000 |
163 | MXCSR_FZ = 0x8000 |
163 | MXCSR_FZ = 0x8000 |
164 | 164 | ||
165 | MXCSR_INIT = MXCSR_IM + MXCSR_DM + MXCSR_ZM + MXCSR_OM + MXCSR_UM + MXCSR_PM |
165 | MXCSR_INIT = MXCSR_IM + MXCSR_DM + MXCSR_ZM + MXCSR_OM + MXCSR_UM + MXCSR_PM |
166 | 166 | ||
167 | EFLAGS_CF = 0x000001 ; carry flag |
167 | EFLAGS_CF = 0x000001 ; carry flag |
168 | EFLAGS_PF = 0x000004 ; parity flag |
168 | EFLAGS_PF = 0x000004 ; parity flag |
169 | EFLAGS_AF = 0x000010 ; auxiliary flag |
169 | EFLAGS_AF = 0x000010 ; auxiliary flag |
170 | EFLAGS_ZF = 0x000040 ; zero flag |
170 | EFLAGS_ZF = 0x000040 ; zero flag |
171 | EFLAGS_SF = 0x000080 ; sign flag |
171 | EFLAGS_SF = 0x000080 ; sign flag |
172 | EFLAGS_TF = 0x000100 ; trap flag |
172 | EFLAGS_TF = 0x000100 ; trap flag |
173 | EFLAGS_IF = 0x000200 ; interrupt flag |
173 | EFLAGS_IF = 0x000200 ; interrupt flag |
174 | EFLAGS_DF = 0x000400 ; direction flag |
174 | EFLAGS_DF = 0x000400 ; direction flag |
175 | EFLAGS_OF = 0x000800 ; overflow flag |
175 | EFLAGS_OF = 0x000800 ; overflow flag |
176 | EFLAGS_IOPL = 0x003000 ; i/o priviledge level |
176 | EFLAGS_IOPL = 0x003000 ; i/o priviledge level |
177 | EFLAGS_NT = 0x004000 ; nested task flag |
177 | EFLAGS_NT = 0x004000 ; nested task flag |
178 | EFLAGS_RF = 0x010000 ; resume flag |
178 | EFLAGS_RF = 0x010000 ; resume flag |
179 | EFLAGS_VM = 0x020000 ; virtual 8086 mode flag |
179 | EFLAGS_VM = 0x020000 ; virtual 8086 mode flag |
180 | EFLAGS_AC = 0x040000 ; alignment check flag |
180 | EFLAGS_AC = 0x040000 ; alignment check flag |
181 | EFLAGS_VIF = 0x080000 ; virtual interrupt flag |
181 | EFLAGS_VIF = 0x080000 ; virtual interrupt flag |
182 | EFLAGS_VIP = 0x100000 ; virtual interrupt pending |
182 | EFLAGS_VIP = 0x100000 ; virtual interrupt pending |
183 | EFLAGS_ID = 0x200000 ; id flag |
183 | EFLAGS_ID = 0x200000 ; id flag |
184 | 184 | ||
185 | IRQ_PIC = 0 |
185 | IRQ_PIC = 0 |
186 | IRQ_APIC = 1 |
186 | IRQ_APIC = 1 |
187 | 187 | ||
188 | struct TSS |
188 | struct TSS |
189 | _back rw 2 |
189 | _back rw 2 |
190 | _esp0 rd 1 |
190 | _esp0 rd 1 |
191 | _ss0 rw 2 |
191 | _ss0 rw 2 |
192 | _esp1 rd 1 |
192 | _esp1 rd 1 |
193 | _ss1 rw 2 |
193 | _ss1 rw 2 |
194 | _esp2 rd 1 |
194 | _esp2 rd 1 |
195 | _ss2 rw 2 |
195 | _ss2 rw 2 |
196 | _cr3 rd 1 |
196 | _cr3 rd 1 |
197 | _eip rd 1 |
197 | _eip rd 1 |
198 | _eflags rd 1 |
198 | _eflags rd 1 |
199 | _eax rd 1 |
199 | _eax rd 1 |
200 | _ecx rd 1 |
200 | _ecx rd 1 |
201 | _edx rd 1 |
201 | _edx rd 1 |
202 | _ebx rd 1 |
202 | _ebx rd 1 |
203 | _esp rd 1 |
203 | _esp rd 1 |
204 | _ebp rd 1 |
204 | _ebp rd 1 |
205 | _esi rd 1 |
205 | _esi rd 1 |
206 | _edi rd 1 |
206 | _edi rd 1 |
207 | _es rw 2 |
207 | _es rw 2 |
208 | _cs rw 2 |
208 | _cs rw 2 |
209 | _ss rw 2 |
209 | _ss rw 2 |
210 | _ds rw 2 |
210 | _ds rw 2 |
211 | _fs rw 2 |
211 | _fs rw 2 |
212 | _gs rw 2 |
212 | _gs rw 2 |
213 | _ldt rw 2 |
213 | _ldt rw 2 |
214 | _trap rw 1 |
214 | _trap rw 1 |
215 | _io rw 1 |
215 | _io rw 1 |
216 | rb 24 |
216 | rb 24 |
217 | _io_map_0 rb 4096 |
217 | _io_map_0 rb 4096 |
218 | _io_map_1 rb 4096 |
218 | _io_map_1 rb 4096 |
219 | ends |
219 | ends |
220 | 220 | ||
221 | DRIVE_DATA_SIZE = 16 |
221 | DRIVE_DATA_SIZE = 16 |
222 | 222 | ||
223 | OS_BASE = 0x80000000 |
223 | OS_BASE = 0x80000000 |
224 | 224 | ||
225 | window_data = OS_BASE + 0x0001000 |
225 | window_data = OS_BASE + 0x0001000 |
226 | 226 | ||
227 | TASK_TABLE = OS_BASE + 0x0003000 |
227 | ;TASK_TABLE = OS_BASE + 0x0003000 |
228 | ;CURRENT_TASK = OS_BASE + 0x0003000 |
228 | ;CURRENT_TASK = OS_BASE + 0x0003000 |
229 | ;TASK_COUNT = OS_BASE + 0x0003004 |
229 | ;TASK_COUNT = OS_BASE + 0x0003004 |
230 | TASK_BASE = OS_BASE + 0x0003010 |
230 | ;TASK_BASE = OS_BASE + 0x0003010 |
231 | TASK_DATA = OS_BASE + 0x0003020 |
231 | ;TASK_DATA = OS_BASE + 0x0003020 |
232 | ;TASK_EVENT = OS_BASE + 0x0003020 |
232 | ;TASK_EVENT = OS_BASE + 0x0003020 |
233 | 233 | ||
234 | CDDataBuf = OS_BASE + 0x0005000 |
234 | CDDataBuf = OS_BASE + 0x0005000 |
235 | 235 | ||
236 | ;unused 0x6000 - 0x8fff |
236 | ;unused 0x6000 - 0x8fff |
237 | 237 | ||
238 | BOOT_VARS = 0x9000 |
238 | BOOT_VARS = 0x9000 |
239 | 239 | ||
240 | idts = OS_BASE + 0x000B100 |
240 | idts = OS_BASE + 0x000B100 |
241 | WIN_STACK = OS_BASE + 0x000C000 |
241 | WIN_STACK = OS_BASE + 0x000C000 |
242 | WIN_POS = OS_BASE + 0x000C400 |
242 | WIN_POS = OS_BASE + 0x000C400 |
243 | FDD_BUFF = OS_BASE + 0x000D000 ;512 |
243 | FDD_BUFF = OS_BASE + 0x000D000 ;512 |
244 | 244 | ||
245 | WIN_TEMP_XY = OS_BASE + 0x000F300 |
245 | WIN_TEMP_XY = OS_BASE + 0x000F300 |
246 | KEY_COUNT = OS_BASE + 0x000F400 |
246 | KEY_COUNT = OS_BASE + 0x000F400 |
247 | KEY_BUFF = OS_BASE + 0x000F401 ; 120*2 + 2*2 = 244 bytes, actually 255 bytes |
247 | KEY_BUFF = OS_BASE + 0x000F401 ; 120*2 + 2*2 = 244 bytes, actually 255 bytes |
248 | 248 | ||
249 | BTN_COUNT = OS_BASE + 0x000F500 |
249 | BTN_COUNT = OS_BASE + 0x000F500 |
250 | BTN_BUFF = OS_BASE + 0x000F501 |
250 | BTN_BUFF = OS_BASE + 0x000F501 |
251 | 251 | ||
252 | 252 | ||
253 | BTN_ADDR = OS_BASE + 0x000FE88 |
253 | BTN_ADDR = OS_BASE + 0x000FE88 |
254 | MEM_AMOUNT = OS_BASE + 0x000FE8C |
254 | MEM_AMOUNT = OS_BASE + 0x000FE8C |
255 | 255 | ||
256 | SYS_SHUTDOWN = OS_BASE + 0x000FF00 |
256 | SYS_SHUTDOWN = OS_BASE + 0x000FF00 |
257 | 257 | ||
258 | 258 | ||
259 | TMP_STACK_TOP = 0x007CC00 |
259 | TMP_STACK_TOP = 0x007CC00 |
260 | 260 | ||
261 | sys_proc = OS_BASE + 0x007E000 |
261 | sys_proc = OS_BASE + 0x007E000 |
262 | 262 | ||
263 | SLOT_BASE = OS_BASE + 0x0080000 |
263 | SLOT_BASE = OS_BASE + 0x0080000 |
264 | 264 | ||
265 | VGABasePtr = OS_BASE + 0x00A0000 |
265 | VGABasePtr = OS_BASE + 0x00A0000 |
266 | 266 | ||
267 | virtual at OS_BASE + 0x05FFF80 |
267 | virtual at OS_BASE + 0x05FFF80 |
268 | tss TSS |
268 | tss TSS |
269 | end virtual |
269 | end virtual |
270 | 270 | ||
271 | HEAP_BASE = OS_BASE + 0x0800000 |
271 | HEAP_BASE = OS_BASE + 0x0800000 |
272 | HEAP_MIN_SIZE = 0x01000000 |
272 | HEAP_MIN_SIZE = 0x01000000 |
273 | 273 | ||
274 | page_tabs = 0xFDC00000 |
274 | page_tabs = 0xFDC00000 |
275 | app_page_tabs = 0xFDC00000 |
275 | app_page_tabs = 0xFDC00000 |
276 | kernel_tabs = page_tabs + (OS_BASE shr 10) ;0xFDE00000 |
276 | kernel_tabs = page_tabs + (OS_BASE shr 10) ;0xFDE00000 |
277 | master_tab = page_tabs + (page_tabs shr 10) ;0xFDFF70000 |
277 | master_tab = page_tabs + (page_tabs shr 10) ;0xFDFF70000 |
278 | 278 | ||
279 | LFB_BASE = 0xFE000000 |
279 | LFB_BASE = 0xFE000000 |
280 | 280 | ||
281 | 281 | ||
282 | new_app_base = 0; |
282 | new_app_base = 0; |
283 | 283 | ||
284 | twdw = TASK_TABLE - window_data |
284 | ;twdw = TASK_TABLE - window_data |
285 | 285 | ||
286 | std_application_base_address = new_app_base |
286 | std_application_base_address = new_app_base |
287 | RING0_STACK_SIZE = 0x2000 |
287 | RING0_STACK_SIZE = 0x2000 |
288 | 288 | ||
289 | REG_SS = RING0_STACK_SIZE - 4 |
289 | REG_SS = RING0_STACK_SIZE - 4 |
290 | REG_APP_ESP = RING0_STACK_SIZE - 8 |
290 | REG_APP_ESP = RING0_STACK_SIZE - 8 |
291 | REG_EFLAGS = RING0_STACK_SIZE - 12 |
291 | REG_EFLAGS = RING0_STACK_SIZE - 12 |
292 | REG_CS = RING0_STACK_SIZE - 16 |
292 | REG_CS = RING0_STACK_SIZE - 16 |
293 | REG_EIP = RING0_STACK_SIZE - 20 |
293 | REG_EIP = RING0_STACK_SIZE - 20 |
294 | REG_EAX = RING0_STACK_SIZE - 24 |
294 | REG_EAX = RING0_STACK_SIZE - 24 |
295 | REG_ECX = RING0_STACK_SIZE - 28 |
295 | REG_ECX = RING0_STACK_SIZE - 28 |
296 | REG_EDX = RING0_STACK_SIZE - 32 |
296 | REG_EDX = RING0_STACK_SIZE - 32 |
297 | REG_EBX = RING0_STACK_SIZE - 36 |
297 | REG_EBX = RING0_STACK_SIZE - 36 |
298 | REG_ESP = RING0_STACK_SIZE - 40 ;RING0_STACK_SIZE-20 |
298 | REG_ESP = RING0_STACK_SIZE - 40 ;RING0_STACK_SIZE-20 |
299 | REG_EBP = RING0_STACK_SIZE - 44 |
299 | REG_EBP = RING0_STACK_SIZE - 44 |
300 | REG_ESI = RING0_STACK_SIZE - 48 |
300 | REG_ESI = RING0_STACK_SIZE - 48 |
301 | REG_EDI = RING0_STACK_SIZE - 52 |
301 | REG_EDI = RING0_STACK_SIZE - 52 |
302 | REG_RET = RING0_STACK_SIZE - 56 ;irq0.return |
302 | REG_RET = RING0_STACK_SIZE - 56 ;irq0.return |
303 | 303 | ||
304 | 304 | ||
305 | PAGE_SIZE = 4096 |
305 | PAGE_SIZE = 4096 |
306 | 306 | ||
307 | PG_UNMAP = 0x000 |
307 | PG_UNMAP = 0x000 |
308 | PG_READ = 0x001 |
308 | PG_READ = 0x001 |
309 | PG_WRITE = 0x002 |
309 | PG_WRITE = 0x002 |
310 | PG_USER = 0x004 |
310 | PG_USER = 0x004 |
311 | PG_PCD = 0x008 |
311 | PG_PCD = 0x008 |
312 | PG_PWT = 0x010 |
312 | PG_PWT = 0x010 |
313 | PG_ACCESSED = 0x020 |
313 | PG_ACCESSED = 0x020 |
314 | PG_DIRTY = 0x040 |
314 | PG_DIRTY = 0x040 |
315 | PG_PAT = 0x080 |
315 | PG_PAT = 0x080 |
316 | PG_GLOBAL = 0x100 |
316 | PG_GLOBAL = 0x100 |
317 | PG_SHARED = 0x200 |
317 | PG_SHARED = 0x200 |
318 | 318 | ||
319 | PG_SWR = 0x003 ; PG_WRITE + PG_READ |
319 | PG_SWR = 0x003 ; PG_WRITE + PG_READ |
320 | PG_UR = 0x005 ; PG_USER + PG_READ |
320 | PG_UR = 0x005 ; PG_USER + PG_READ |
321 | PG_UWR = 0x007 ; PG_USER + PG_WRITE + PG_READ |
321 | PG_UWR = 0x007 ; PG_USER + PG_WRITE + PG_READ |
322 | PG_NOCACHE = 0x018 ; PG_PCD + PG_PWT |
322 | PG_NOCACHE = 0x018 ; PG_PCD + PG_PWT |
323 | 323 | ||
324 | PDE_LARGE = 0x080 |
324 | PDE_LARGE = 0x080 |
325 | 325 | ||
326 | MEM_WB = 6 ; write-back memory |
326 | MEM_WB = 6 ; write-back memory |
327 | MEM_WC = 1 ; write combined memory |
327 | MEM_WC = 1 ; write combined memory |
328 | MEM_UC = 0 ; uncached memory |
328 | MEM_UC = 0 ; uncached memory |
329 | 329 | ||
330 | PAT_WB = 0x000 |
330 | PAT_WB = 0x000 |
331 | PAT_WC = 0x008 |
331 | PAT_WC = 0x008 |
332 | PAT_UCM = 0x010 |
332 | PAT_UCM = 0x010 |
333 | PAT_UC = 0x018 |
333 | PAT_UC = 0x018 |
334 | 334 | ||
335 | PAT_TYPE_UC = 0 |
335 | PAT_TYPE_UC = 0 |
336 | PAT_TYPE_WC = 1 |
336 | PAT_TYPE_WC = 1 |
337 | PAT_TYPE_WB = 6 |
337 | PAT_TYPE_WB = 6 |
338 | PAT_TYPE_UCM = 7 |
338 | PAT_TYPE_UCM = 7 |
339 | 339 | ||
340 | PAT_VALUE = 0x00070106; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
340 | PAT_VALUE = 0x00070106; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
341 | 341 | ||
342 | MAX_MEMMAP_BLOCKS = 32 |
342 | MAX_MEMMAP_BLOCKS = 32 |
343 | 343 | ||
344 | EVENT_REDRAW = 0x00000001 |
344 | EVENT_REDRAW = 0x00000001 |
345 | EVENT_KEY = 0x00000002 |
345 | EVENT_KEY = 0x00000002 |
346 | EVENT_BUTTON = 0x00000004 |
346 | EVENT_BUTTON = 0x00000004 |
347 | EVENT_BACKGROUND = 0x00000010 |
347 | EVENT_BACKGROUND = 0x00000010 |
348 | EVENT_MOUSE = 0x00000020 |
348 | EVENT_MOUSE = 0x00000020 |
349 | EVENT_IPC = 0x00000040 |
349 | EVENT_IPC = 0x00000040 |
350 | EVENT_NETWORK = 0x00000080 |
350 | EVENT_NETWORK = 0x00000080 |
351 | EVENT_DEBUG = 0x00000100 |
351 | EVENT_DEBUG = 0x00000100 |
352 | EVENT_NETWORK2 = 0x00000200 |
352 | EVENT_NETWORK2 = 0x00000200 |
353 | EVENT_EXTENDED = 0x00000400 |
353 | EVENT_EXTENDED = 0x00000400 |
354 | 354 | ||
355 | EV_INTR = 1 |
355 | EV_INTR = 1 |
356 | 356 | ||
357 | STDIN_FILENO = 0 |
357 | STDIN_FILENO = 0 |
358 | STDOUT_FILENO = 1 |
358 | STDOUT_FILENO = 1 |
359 | STDERR_FILENO = 2 |
359 | STDERR_FILENO = 2 |
360 | 360 | ||
361 | SYSTEM_SHUTDOWN = 2 |
361 | SYSTEM_SHUTDOWN = 2 |
362 | SYSTEM_REBOOT = 3 |
362 | SYSTEM_REBOOT = 3 |
363 | SYSTEM_RESTART = 4 |
363 | SYSTEM_RESTART = 4 |
364 | 364 | ||
365 | BLIT_CLIENT_RELATIVE = 0x20000000 |
365 | BLIT_CLIENT_RELATIVE = 0x20000000 |
366 | 366 | ||
367 | struct SYSCALL_STACK |
367 | struct SYSCALL_STACK |
368 | _eip dd ? |
368 | _eip dd ? |
369 | _edi dd ? ; +4 |
369 | _edi dd ? ; +4 |
370 | _esi dd ? ; +8 |
370 | _esi dd ? ; +8 |
371 | _ebp dd ? ; +12 |
371 | _ebp dd ? ; +12 |
372 | _esp dd ? ; +16 |
372 | _esp dd ? ; +16 |
373 | _ebx dd ? ; +20 |
373 | _ebx dd ? ; +20 |
374 | _edx dd ? ; +24 |
374 | _edx dd ? ; +24 |
375 | _ecx dd ? ; +28 |
375 | _ecx dd ? ; +28 |
376 | _eax dd ? ; +32 |
376 | _eax dd ? ; +32 |
377 | ends |
377 | ends |
378 | 378 | ||
379 | struct LHEAD |
379 | struct LHEAD |
380 | next dd ? ;next object in list |
380 | next dd ? ;next object in list |
381 | prev dd ? ;prev object in list |
381 | prev dd ? ;prev object in list |
382 | ends |
382 | ends |
383 | 383 | ||
384 | struct MUTEX_WAITER |
384 | struct MUTEX_WAITER |
385 | list LHEAD |
385 | list LHEAD |
386 | task dd ? |
386 | task dd ? |
387 | type dd ? |
387 | type dd ? |
388 | ends |
388 | ends |
389 | 389 | ||
390 | struct MUTEX |
390 | struct MUTEX |
391 | wait_list LHEAD |
391 | wait_list LHEAD |
392 | count dd ? |
392 | count dd ? |
393 | ends |
393 | ends |
394 | 394 | ||
395 | struct RWSEM |
395 | struct RWSEM |
396 | wait_list LHEAD |
396 | wait_list LHEAD |
397 | count dd ? |
397 | count dd ? |
398 | ends |
398 | ends |
399 | 399 | ||
400 | struct FUTEX |
400 | struct FUTEX |
401 | list LHEAD |
401 | list LHEAD |
402 | magic dd ? |
402 | magic dd ? |
403 | handle dd ? |
403 | handle dd ? |
404 | destroy dd ? |
404 | destroy dd ? |
405 | 405 | ||
406 | wait_list LHEAD |
406 | wait_list LHEAD |
407 | pointer dd ? |
407 | pointer dd ? |
408 | flags dd ? |
408 | flags dd ? |
409 | ends |
409 | ends |
410 | 410 | ||
411 | FUTEX_INIT = 0 |
411 | FUTEX_INIT = 0 |
412 | FUTEX_DESTROY = 1 |
412 | FUTEX_DESTROY = 1 |
413 | FUTEX_WAIT = 2 |
413 | FUTEX_WAIT = 2 |
414 | FUTEX_WAKE = 3 |
414 | FUTEX_WAKE = 3 |
415 | 415 | ||
416 | struct FILED |
416 | struct FILED |
417 | list LHEAD |
417 | list LHEAD |
418 | magic rd 1 |
418 | magic rd 1 |
419 | handle rd 1 |
419 | handle rd 1 |
420 | destroy rd 1 |
420 | destroy rd 1 |
421 | mode rd 1 |
421 | mode rd 1 |
422 | file rd 1 |
422 | file rd 1 |
423 | ends |
423 | ends |
424 | 424 | ||
425 | struct PIPE |
425 | struct PIPE |
426 | pipe_ops rd 1 |
426 | pipe_ops rd 1 |
427 | buffer rd 1 |
427 | buffer rd 1 |
428 | readers rd 1 |
428 | readers rd 1 |
429 | writers rd 1 |
429 | writers rd 1 |
430 | 430 | ||
431 | pipe_lock MUTEX |
431 | pipe_lock MUTEX |
432 | count rd 1 |
432 | count rd 1 |
433 | 433 | ||
434 | read_end rd 1 |
434 | read_end rd 1 |
435 | write_end rd 1 |
435 | write_end rd 1 |
436 | rlist LHEAD |
436 | rlist LHEAD |
437 | wlist LHEAD |
437 | wlist LHEAD |
438 | ends |
438 | ends |
439 | 439 | ||
440 | struct PROC |
440 | struct PROC |
441 | list LHEAD |
441 | list LHEAD |
442 | thr_list LHEAD |
442 | thr_list LHEAD |
443 | heap_lock MUTEX |
443 | heap_lock MUTEX |
444 | heap_base rd 1 |
444 | heap_base rd 1 |
445 | heap_top rd 1 |
445 | heap_top rd 1 |
446 | mem_used rd 1 |
446 | mem_used rd 1 |
447 | dlls_list_ptr rd 1 |
447 | dlls_list_ptr rd 1 |
448 | pdt_0_phys rd 1 |
448 | pdt_0_phys rd 1 |
449 | pdt_1_phys rd 1 |
449 | pdt_1_phys rd 1 |
450 | io_map_0 rd 1 |
450 | io_map_0 rd 1 |
451 | io_map_1 rd 1 |
451 | io_map_1 rd 1 |
452 | 452 | ||
453 | ht_lock rd 1 |
453 | ht_lock rd 1 |
454 | ht_free rd 1 ;htab[0] stdin |
454 | ht_free rd 1 ;htab[0] stdin |
455 | ht_next rd 1 ;htab[1] stdout |
455 | ht_next rd 1 ;htab[1] stdout |
456 | htab rd 1024-PROC.htab/4 ;htab[2] stderr |
456 | htab rd 1024-PROC.htab/4 ;htab[2] stderr |
457 | pdt_0 rd 1024 |
457 | pdt_0 rd 1024 |
458 | ends |
458 | ends |
459 | 459 | ||
460 | struct DBG_REGS |
460 | struct DBG_REGS |
461 | dr0 dd ? |
461 | dr0 dd ? |
462 | dr1 dd ? |
462 | dr1 dd ? |
463 | dr2 dd ? |
463 | dr2 dd ? |
464 | dr3 dd ? |
464 | dr3 dd ? |
465 | dr7 dd ? |
465 | dr7 dd ? |
466 | ends |
466 | ends |
467 | 467 | ||
468 | struct POINT |
468 | struct POINT |
469 | x dd ? |
469 | x dd ? |
470 | y dd ? |
470 | y dd ? |
471 | ends |
471 | ends |
472 | 472 | ||
473 | struct RECT |
473 | struct RECT |
474 | left dd ? |
474 | left dd ? |
475 | top dd ? |
475 | top dd ? |
476 | right dd ? |
476 | right dd ? |
477 | bottom dd ? |
477 | bottom dd ? |
478 | ends |
478 | ends |
479 | 479 | ||
480 | struct BOX |
480 | struct BOX |
481 | left dd ? |
481 | left dd ? |
482 | top dd ? |
482 | top dd ? |
483 | width dd ? |
483 | width dd ? |
484 | height dd ? |
484 | height dd ? |
485 | ends |
485 | ends |
486 | 486 | ||
487 | ; Fields, marked as R now not used, but will be used soon, |
487 | ; Fields, marked as R now not used, but will be used soon, |
488 | ; when legacy TASKDATA structure will be deleted |
488 | ; when legacy TASKDATA structure will be deleted |
489 | struct APPDATA |
489 | struct APPDATA |
490 | app_name rb 11 |
490 | app_name rb 11 |
491 | rb 5 |
491 | rb 5 |
492 | 492 | ||
493 | list LHEAD ;+16 |
493 | list LHEAD ;+16 |
494 | process dd ? ;+24 |
494 | process dd ? ;+24 |
495 | fpu_state dd ? ;+28 |
495 | fpu_state dd ? ;+28 |
496 | exc_handler dd ? ;+32 |
496 | exc_handler dd ? ;+32 |
497 | except_mask dd ? ;+36 |
497 | except_mask dd ? ;+36 |
498 | pl0_stack dd ? ;+40 |
498 | pl0_stack dd ? ;+40 |
499 | cursor dd ? ;+44 |
499 | cursor dd ? ;+44 |
500 | fd_ev dd ? ;+48 |
500 | fd_ev dd ? ;+48 |
501 | bk_ev dd ? ;+52 |
501 | bk_ev dd ? ;+52 |
502 | fd_obj dd ? ;+56 |
502 | fd_obj dd ? ;+56 |
503 | bk_obj dd ? ;+60 |
503 | bk_obj dd ? ;+60 |
504 | saved_esp dd ? ;+64 |
504 | saved_esp dd ? ;+64 |
505 | io_map rd 2 ;+68 |
505 | io_map rd 2 ;+68 |
506 | dbg_state dd ? ;+76 |
506 | dbg_state dd ? ;+76 |
507 | cur_dir dd ? ;+80 |
507 | cur_dir dd ? ;+80 |
508 | wait_timeout dd ? ;+84 |
508 | wait_timeout dd ? ;+84 |
509 | saved_esp0 dd ? ;+88 |
509 | saved_esp0 dd ? ;+88 |
510 | wait_begin dd ? ;+92 +++ |
510 | wait_begin dd ? ;+92 +++ |
511 | wait_test dd ? ;+96 +++ |
511 | wait_test dd ? ;+96 +++ |
512 | wait_param dd ? ;+100 +++ |
512 | wait_param dd ? ;+100 +++ |
513 | tls_base dd ? ;+104 |
513 | tls_base dd ? ;+104 |
514 | event_mask dd ? ;+108 ; R stores event types allowed for task |
514 | event_mask dd ? ;+108 stores event types allowed for task |
515 | tid dd ? ;+112 ; R thread id |
515 | tid dd ? ;+112 thread id |
516 | draw_bgr_x dd ? ;+116 |
516 | draw_bgr_x dd ? ;+116 |
517 | draw_bgr_y dd ? ;+120 |
517 | draw_bgr_y dd ? ;+120 |
518 | state db ? ;+124 ; R thread state |
518 | state db ? ;+124 thread state |
519 | wnd_number db ? ;+125 ; R |
519 | wnd_number db ? ;+125 |
520 | dw ? ;+126 |
520 | dw ? ;+126 |
521 | wnd_shape dd ? ;+128 |
521 | wnd_shape dd ? ;+128 |
522 | wnd_shape_scale dd ? ;+132 |
522 | wnd_shape_scale dd ? ;+132 |
523 | mem_start dd ? ;+136 ; R |
523 | mem_start dd ? ;+136 |
524 | counter_sum dd ? ;+140 ; R |
524 | counter_sum dd ? ;+140 ; R |
525 | saved_box BOX ;+144 |
525 | saved_box BOX ;+144 |
526 | ipc_start dd ? ;+160 |
526 | ipc_start dd ? ;+160 |
527 | ipc_size dd ? ;+164 |
527 | ipc_size dd ? ;+164 |
528 | occurred_events dd ? ;+168 ; mask which accumulates occurred events |
528 | occurred_events dd ? ;+168 ; mask which accumulates occurred events |
529 | debugger_slot dd ? ;+172 |
529 | debugger_slot dd ? ;+172 |
530 | terminate_protection dd ? ;+176 |
530 | terminate_protection dd ? ;+176 |
531 | keyboard_mode db ? ;+180 |
531 | keyboard_mode db ? ;+180 |
532 | captionEncoding db ? |
532 | captionEncoding db ? |
533 | rb 2 |
533 | rb 2 |
534 | exec_params dd ? ;+184 |
534 | exec_params dd ? ;+184 |
535 | dbg_event_mem dd ? ;+188 |
535 | dbg_event_mem dd ? ;+188 |
536 | dbg_regs DBG_REGS ;+192 |
536 | dbg_regs DBG_REGS ;+192 |
537 | wnd_caption dd ? ;+212 |
537 | wnd_caption dd ? ;+212 |
538 | wnd_clientbox BOX ;+216 |
538 | wnd_clientbox BOX ;+216 |
539 | priority dd ? ;+232 |
539 | priority dd ? ;+232 |
540 | in_schedule LHEAD ;+236 |
540 | in_schedule LHEAD ;+236 |
541 | counter_add dd ? ;+244 ; R |
541 | counter_add dd ? ;+244 ; R |
542 | cpu_usage dd ? ;+248 ; R |
542 | cpu_usage dd ? ;+248 ; R |
543 | dd ? ;+252 |
543 | dd ? ;+252 |
544 | ends |
544 | ends |
545 | 545 | ||
546 | assert sizeof.APPDATA = 256 |
546 | assert sizeof.APPDATA = 256 |
547 | 547 | ||
548 | APP_OBJ_OFFSET = 48 |
548 | APP_OBJ_OFFSET = 48 |
549 | APP_EV_OFFSET = 40 |
549 | APP_EV_OFFSET = 40 |
550 | 550 | ||
551 | ; Note: in future TASKDATA will be merged into APPDATA |
551 | ; Note: in future TASKDATA will be merged into APPDATA |
552 | struct TASKDATA |
552 | ;struct TASKDATA |
553 | event_mask dd ? ;+0 mask which stores event types allowed for task |
553 | ; event_mask dd ? ;+0 mask which stores event types allowed for task |
554 | pid dd ? ;+4 |
554 | ; pid dd ? ;+4 |
555 | dw ? ;+8 |
555 | ; dw ? ;+8 |
556 | state db ? ;+10 |
556 | ; state db ? ;+10 |
557 | db ? ;+11 |
557 | ; db ? ;+11 |
558 | dw ? ;+12 |
558 | ; dw ? ;+12 |
559 | wnd_number db ? ;+14 |
559 | ; wnd_number db ? ;+14 |
560 | db ? ;+15 |
560 | ; db ? ;+15 |
561 | mem_start dd ? ;+16 |
561 | ; mem_start dd ? ;+16 |
562 | counter_sum dd ? ;+20 |
562 | ; counter_sum dd ? ;+20 |
563 | counter_add dd ? ;+24 |
563 | ; counter_add dd ? ;+24 |
564 | cpu_usage dd ? ;+28 |
564 | ; cpu_usage dd ? ;+28 |
565 | ends |
565 | ;ends |
566 | 566 | ||
567 | ; Thread states: |
567 | ; Thread states: |
568 | TSTATE_RUNNING = 0 |
568 | TSTATE_RUNNING = 0 |
569 | TSTATE_RUN_SUSPENDED = 1 |
569 | TSTATE_RUN_SUSPENDED = 1 |
570 | TSTATE_WAIT_SUSPENDED = 2 |
570 | TSTATE_WAIT_SUSPENDED = 2 |
571 | TSTATE_ZOMBIE = 3 |
571 | TSTATE_ZOMBIE = 3 |
572 | TSTATE_TERMINATING = 4 |
572 | TSTATE_TERMINATING = 4 |
573 | TSTATE_WAITING = 5 |
573 | TSTATE_WAITING = 5 |
574 | TSTATE_FREE = 9 |
574 | TSTATE_FREE = 9 |
575 | 575 | ||
576 | ; Window constants: |
576 | ; Window constants: |
577 | WSTATE_NORMAL = 00000000b |
577 | WSTATE_NORMAL = 00000000b |
578 | WSTATE_MAXIMIZED = 00000001b |
578 | WSTATE_MAXIMIZED = 00000001b |
579 | WSTATE_MINIMIZED = 00000010b |
579 | WSTATE_MINIMIZED = 00000010b |
580 | WSTATE_ROLLEDUP = 00000100b |
580 | WSTATE_ROLLEDUP = 00000100b |
581 | 581 | ||
582 | WSTATE_REDRAW = 00000001b |
582 | WSTATE_REDRAW = 00000001b |
583 | WSTATE_WNDDRAWN = 00000010b |
583 | WSTATE_WNDDRAWN = 00000010b |
584 | 584 | ||
585 | WSTYLE_HASCAPTION = 00010000b |
585 | WSTYLE_HASCAPTION = 00010000b |
586 | WSTYLE_CLIENTRELATIVE = 00100000b |
586 | WSTYLE_CLIENTRELATIVE = 00100000b |
587 | 587 | ||
588 | ZPOS_DESKTOP = -2 |
588 | ZPOS_DESKTOP = -2 |
589 | ZPOS_ALWAYS_BACK = -1 |
589 | ZPOS_ALWAYS_BACK = -1 |
590 | ZPOS_NORMAL = 0 |
590 | ZPOS_NORMAL = 0 |
591 | ZPOS_ALWAYS_TOP = 1 ;ZPOS_ALWAYS_TOP is always last and has max number! |
591 | ZPOS_ALWAYS_TOP = 1 ;ZPOS_ALWAYS_TOP is always last and has max number! |
592 | 592 | ||
593 | ; Window structure: |
593 | ; Window structure: |
594 | struct WDATA |
594 | struct WDATA |
595 | box BOX |
595 | box BOX |
596 | cl_workarea dd ? |
596 | cl_workarea dd ? |
597 | cl_titlebar dd ? |
597 | cl_titlebar dd ? |
598 | cl_frames dd ? |
598 | cl_frames dd ? |
599 | z_modif db ? |
599 | z_modif db ? |
600 | fl_wstate db ? |
600 | fl_wstate db ? |
601 | fl_wdrawn db ? |
601 | fl_wdrawn db ? |
602 | fl_redraw db ? |
602 | fl_redraw db ? |
603 | ends |
603 | ends |
604 | 604 | ||
605 | label WDATA.fl_wstyle byte at WDATA.cl_workarea + 3 |
605 | label WDATA.fl_wstyle byte at WDATA.cl_workarea + 3 |
606 | 606 | ||
607 | assert sizeof.WDATA = 32 |
607 | assert sizeof.WDATA = 32 |
608 | 608 | ||
609 | struct SYS_VARS |
609 | struct SYS_VARS |
610 | bpp dd ? |
610 | bpp dd ? |
611 | scanline dd ? |
611 | scanline dd ? |
612 | vesa_mode dd ? |
612 | vesa_mode dd ? |
613 | x_res dd ? |
613 | x_res dd ? |
614 | y_res dd ? |
614 | y_res dd ? |
615 | ends |
615 | ends |
616 | 616 | ||
617 | struct APPOBJ ; common object header |
617 | struct APPOBJ ; common object header |
618 | magic dd ? ; |
618 | magic dd ? ; |
619 | destroy dd ? ; internal destructor |
619 | destroy dd ? ; internal destructor |
620 | fd dd ? ; next object in list |
620 | fd dd ? ; next object in list |
621 | bk dd ? ; prev object in list |
621 | bk dd ? ; prev object in list |
622 | pid dd ? ; owner id |
622 | pid dd ? ; owner id |
623 | ends |
623 | ends |
624 | 624 | ||
625 | struct CURSOR APPOBJ |
625 | struct CURSOR APPOBJ |
626 | base dd ? ;allocated memory |
626 | base dd ? ;allocated memory |
627 | hot_x dd ? ;hotspot coords |
627 | hot_x dd ? ;hotspot coords |
628 | hot_y dd ? |
628 | hot_y dd ? |
629 | 629 | ||
630 | list_next dd ? ;next cursor in cursor list |
630 | list_next dd ? ;next cursor in cursor list |
631 | list_prev dd ? ;prev cursor in cursor list |
631 | list_prev dd ? ;prev cursor in cursor list |
632 | dev_obj dd ? ;device depended data |
632 | dev_obj dd ? ;device depended data |
633 | ends |
633 | ends |
634 | 634 | ||
635 | 635 | ||
636 | struct EVENT APPOBJ |
636 | struct EVENT APPOBJ |
637 | id dd ? ;event uid |
637 | id dd ? ;event uid |
638 | state dd ? ;internal flags |
638 | state dd ? ;internal flags |
639 | code dd ? |
639 | code dd ? |
640 | rd 5 |
640 | rd 5 |
641 | ends |
641 | ends |
642 | 642 | ||
643 | 643 | ||
644 | struct SMEM |
644 | struct SMEM |
645 | bk dd ? |
645 | bk dd ? |
646 | fd dd ? ;+4 |
646 | fd dd ? ;+4 |
647 | base dd ? ;+8 |
647 | base dd ? ;+8 |
648 | size dd ? ;+12 |
648 | size dd ? ;+12 |
649 | access dd ? ;+16 |
649 | access dd ? ;+16 |
650 | refcount dd ? ;+20 |
650 | refcount dd ? ;+20 |
651 | name rb 32 ;+24 |
651 | name rb 32 ;+24 |
652 | ends |
652 | ends |
653 | 653 | ||
654 | struct SMAP APPOBJ |
654 | struct SMAP APPOBJ |
655 | base dd ? ;mapped base |
655 | base dd ? ;mapped base |
656 | parent dd ? ;SMEM |
656 | parent dd ? ;SMEM |
657 | ends |
657 | ends |
658 | 658 | ||
659 | struct DLLDESCR |
659 | struct DLLDESCR |
660 | bk dd ? |
660 | bk dd ? |
661 | fd dd ? ;+4 |
661 | fd dd ? ;+4 |
662 | data dd ? ;+8 |
662 | data dd ? ;+8 |
663 | size dd ? ;+12 |
663 | size dd ? ;+12 |
664 | timestamp dq ? |
664 | timestamp dq ? |
665 | refcount dd ? |
665 | refcount dd ? |
666 | defaultbase dd ? |
666 | defaultbase dd ? |
667 | coff_hdr dd ? |
667 | coff_hdr dd ? |
668 | symbols_ptr dd ? |
668 | symbols_ptr dd ? |
669 | symbols_num dd ? |
669 | symbols_num dd ? |
670 | symbols_lim dd ? |
670 | symbols_lim dd ? |
671 | exports dd ? ;export table |
671 | exports dd ? ;export table |
672 | name rb 260 |
672 | name rb 260 |
673 | ends |
673 | ends |
674 | 674 | ||
675 | struct HDLL |
675 | struct HDLL |
676 | fd dd ? ;next object in list |
676 | fd dd ? ;next object in list |
677 | bk dd ? ;prev object in list |
677 | bk dd ? ;prev object in list |
678 | pid dd ? ;owner id |
678 | pid dd ? ;owner id |
679 | 679 | ||
680 | base dd ? ;mapped base |
680 | base dd ? ;mapped base |
681 | size dd ? ;mapped size |
681 | size dd ? ;mapped size |
682 | refcount dd ? ;reference counter for this process and this lib |
682 | refcount dd ? ;reference counter for this process and this lib |
683 | parent dd ? ;DLLDESCR |
683 | parent dd ? ;DLLDESCR |
684 | ends |
684 | ends |
685 | 685 | ||
686 | struct DQ |
686 | struct DQ |
687 | lo dd ? |
687 | lo dd ? |
688 | hi dd ? |
688 | hi dd ? |
689 | ends |
689 | ends |
690 | 690 | ||
691 | struct e820entry |
691 | struct e820entry |
692 | addr DQ ? |
692 | addr DQ ? |
693 | size DQ ? |
693 | size DQ ? |
694 | type dd ? |
694 | type dd ? |
695 | ends |
695 | ends |
696 | 696 | ||
697 | RD_LOAD_FROM_FLOPPY = 1 |
697 | RD_LOAD_FROM_FLOPPY = 1 |
698 | RD_LOAD_FROM_HD = 2 |
698 | RD_LOAD_FROM_HD = 2 |
699 | RD_LOAD_FROM_MEMORY = 3 |
699 | RD_LOAD_FROM_MEMORY = 3 |
700 | RD_LOAD_FROM_FORMAT = 4 |
700 | RD_LOAD_FROM_FORMAT = 4 |
701 | RD_LOAD_FROM_NONE = 5 |
701 | RD_LOAD_FROM_NONE = 5 |
702 | 702 | ||
703 | struct boot_pci_data |
703 | struct boot_pci_data |
704 | access_mechanism db ? |
704 | access_mechanism db ? |
705 | last_bus db ? |
705 | last_bus db ? |
706 | version dw ? ; bcd minor, then major |
706 | version dw ? ; bcd minor, then major |
707 | pm_entry dd ? ; physical address of protected-mode entry point |
707 | pm_entry dd ? ; physical address of protected-mode entry point |
708 | ends |
708 | ends |
709 | 709 | ||
710 | struct boot_data |
710 | struct boot_data |
711 | bpp db ? ; bits per pixel |
711 | bpp db ? ; bits per pixel |
712 | pitch dw ? ; scanline length |
712 | pitch dw ? ; scanline length |
713 | db ? |
713 | db ? |
714 | dd ? |
714 | dd ? |
715 | vesa_mode dw ? |
715 | vesa_mode dw ? |
716 | x_res dw ? |
716 | x_res dw ? |
717 | y_res dw ? |
717 | y_res dw ? |
718 | dw ? |
718 | dw ? |
719 | dd ? |
719 | dd ? |
720 | bank_switch dd ? ; Vesa 1.2 pm bank switch |
720 | bank_switch dd ? ; Vesa 1.2 pm bank switch |
721 | lfb dd ? ; Vesa 2.0 LFB address |
721 | lfb dd ? ; Vesa 2.0 LFB address |
722 | mtrr db ? ; 0 or 1: enable MTRR graphics acceleration |
722 | mtrr db ? ; 0 or 1: enable MTRR graphics acceleration |
723 | launcher_start db ? ; 0 or 1: start the first app (right now it's |
723 | launcher_start db ? ; 0 or 1: start the first app (right now it's |
724 | ; LAUNCHER) after kernel is loaded |
724 | ; LAUNCHER) after kernel is loaded |
725 | debug_print db ? ; if nonzero, duplicates debug output to the screen |
725 | debug_print db ? ; if nonzero, duplicates debug output to the screen |
726 | dma db ? ; DMA write: 1=yes, 2=no |
726 | dma db ? ; DMA write: 1=yes, 2=no |
727 | pci_data boot_pci_data |
727 | pci_data boot_pci_data |
728 | rb 8 |
728 | rb 8 |
729 | shutdown_type db ? ; see sysfn 18.9 |
729 | shutdown_type db ? ; see sysfn 18.9 |
730 | rb 15 |
730 | rb 15 |
731 | apm_entry dd ? ; entry point of APM BIOS |
731 | apm_entry dd ? ; entry point of APM BIOS |
732 | apm_version dw ? ; BCD |
732 | apm_version dw ? ; BCD |
733 | apm_flags dw ? |
733 | apm_flags dw ? |
734 | rb 8 |
734 | rb 8 |
735 | apm_code_32 dw ? |
735 | apm_code_32 dw ? |
736 | apm_code_16 dw ? |
736 | apm_code_16 dw ? |
737 | apm_data_16 dw ? |
737 | apm_data_16 dw ? |
738 | rd_load_from db ? ; Device to load ramdisk from, RD_LOAD_FROM_* |
738 | rd_load_from db ? ; Device to load ramdisk from, RD_LOAD_FROM_* |
739 | db ? |
739 | db ? |
740 | kernel_restart dw ? |
740 | kernel_restart dw ? |
741 | sys_disk dw ? ; Device to mount on /sys/, see loader_doc.txt for details |
741 | sys_disk dw ? ; Device to mount on /sys/, see loader_doc.txt for details |
742 | acpi_rsdp dd ? |
742 | acpi_rsdp dd ? |
743 | syspath rb 0x17 |
743 | syspath rb 0x17 |
744 | devicesdat_data dd ? |
744 | devicesdat_data dd ? |
745 | devicesdat_size dd ? |
745 | devicesdat_size dd ? |
746 | bios_hd_cnt db ? ; number of BIOS hard disks |
746 | bios_hd_cnt db ? ; number of BIOS hard disks |
747 | bios_hd rb 0x80 ; BIOS hard disks |
747 | bios_hd rb 0x80 ; BIOS hard disks |
748 | memmap_block_cnt dd ? ; available physical memory map: number of blocks |
748 | memmap_block_cnt dd ? ; available physical memory map: number of blocks |
749 | memmap_blocks e820entry |
749 | memmap_blocks e820entry |
750 | rb sizeof.e820entry * (MAX_MEMMAP_BLOCKS - 1) |
750 | rb sizeof.e820entry * (MAX_MEMMAP_BLOCKS - 1) |
751 | ends |
751 | ends |
752 | 752 | ||
753 | virtual at BOOT_VARS |
753 | virtual at BOOT_VARS |
754 | BOOT_LO boot_data |
754 | BOOT_LO boot_data |
755 | end virtual |
755 | end virtual |
756 | virtual at OS_BASE + BOOT_VARS |
756 | virtual at OS_BASE + BOOT_VARS |
757 | BOOT boot_data |
757 | BOOT boot_data |
758 | end virtual |
758 | end virtual |
759 | 759 | ||
760 | MAX_SCREEN_WIDTH = 3840 |
760 | MAX_SCREEN_WIDTH = 3840 |
761 | MAX_SCREEN_HEIGHT = 2160 |
761 | MAX_SCREEN_HEIGHT = 2160 |
762 | 762 | ||
763 | struct display_t |
763 | struct display_t |
764 | x dd ? |
764 | x dd ? |
765 | y dd ? |
765 | y dd ? |
766 | width dd ? |
766 | width dd ? |
767 | height dd ? |
767 | height dd ? |
768 | bits_per_pixel dd ? |
768 | bits_per_pixel dd ? |
769 | vrefresh dd ? |
769 | vrefresh dd ? |
770 | current_lfb dd ? |
770 | current_lfb dd ? |
771 | lfb_pitch dd ? |
771 | lfb_pitch dd ? |
772 | 772 | ||
773 | win_map_lock RWSEM |
773 | win_map_lock RWSEM |
774 | win_map dd ? |
774 | win_map dd ? |
775 | win_map_pitch dd ? |
775 | win_map_pitch dd ? |
776 | win_map_size dd ? |
776 | win_map_size dd ? |
777 | 777 | ||
778 | modes dd ? |
778 | modes dd ? |
779 | ddev dd ? |
779 | ddev dd ? |
780 | connector dd ? |
780 | connector dd ? |
781 | crtc dd ? |
781 | crtc dd ? |
782 | 782 | ||
783 | cr_list.next dd ? |
783 | cr_list.next dd ? |
784 | cr_list.prev dd ? |
784 | cr_list.prev dd ? |
785 | 785 | ||
786 | cursor dd ? |
786 | cursor dd ? |
787 | 787 | ||
788 | init_cursor dd ? |
788 | init_cursor dd ? |
789 | select_cursor dd ? |
789 | select_cursor dd ? |
790 | show_cursor dd ? |
790 | show_cursor dd ? |
791 | move_cursor dd ? |
791 | move_cursor dd ? |
792 | restore_cursor dd ? |
792 | restore_cursor dd ? |
793 | disable_mouse dd ? |
793 | disable_mouse dd ? |
794 | mask_seqno dd ? |
794 | mask_seqno dd ? |
795 | check_mouse dd ? |
795 | check_mouse dd ? |
796 | check_m_pixel dd ? |
796 | check_m_pixel dd ? |
797 | 797 | ||
798 | bytes_per_pixel dd ? |
798 | bytes_per_pixel dd ? |
799 | ends |
799 | ends |
800 | 800 | ||
801 | struct DISPMODE |
801 | struct DISPMODE |
802 | width dw ? |
802 | width dw ? |
803 | height dw ? |
803 | height dw ? |
804 | bpp dw ? |
804 | bpp dw ? |
805 | freq dw ? |
805 | freq dw ? |
806 | ends |
806 | ends |
807 | 807 | ||
808 | 808 | ||
809 | struct PCIDEV |
809 | struct PCIDEV |
810 | bk dd ? |
810 | bk dd ? |
811 | fd dd ? |
811 | fd dd ? |
812 | vendor_device_id dd ? |
812 | vendor_device_id dd ? |
813 | class dd ? |
813 | class dd ? |
814 | devfn db ? |
814 | devfn db ? |
815 | bus db ? |
815 | bus db ? |
816 | rb 2 |
816 | rb 2 |
817 | owner dd ? ; pointer to SRV or 0 |
817 | owner dd ? ; pointer to SRV or 0 |
818 | ends |
818 | ends |
819 | 819 | ||
820 | struct IDE_DATA |
820 | struct IDE_DATA |
821 | ProgrammingInterface dd ? |
821 | ProgrammingInterface dd ? |
822 | Interrupt dw ? |
822 | Interrupt dw ? |
823 | RegsBaseAddres dw ? |
823 | RegsBaseAddres dw ? |
824 | BAR0_val dw ? |
824 | BAR0_val dw ? |
825 | BAR1_val dw ? |
825 | BAR1_val dw ? |
826 | BAR2_val dw ? |
826 | BAR2_val dw ? |
827 | BAR3_val dw ? |
827 | BAR3_val dw ? |
828 | dma_hdd_channel_1 db ? |
828 | dma_hdd_channel_1 db ? |
829 | dma_hdd_channel_2 db ? |
829 | dma_hdd_channel_2 db ? |
830 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
830 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
831 | ends |
831 | ends |
832 | 832 | ||
833 | struct IDE_CACHE |
833 | struct IDE_CACHE |
834 | pointer dd ? |
834 | pointer dd ? |
835 | size dd ? ; not use |
835 | size dd ? ; not use |
836 | data_pointer dd ? |
836 | data_pointer dd ? |
837 | system_data_size dd ? ; not use |
837 | system_data_size dd ? ; not use |
838 | appl_data_size dd ? ; not use |
838 | appl_data_size dd ? ; not use |
839 | system_data dd ? |
839 | system_data dd ? |
840 | appl_data dd ? |
840 | appl_data dd ? |
841 | system_sad_size dd ? |
841 | system_sad_size dd ? |
842 | appl_sad_size dd ? |
842 | appl_sad_size dd ? |
843 | search_start dd ? |
843 | search_start dd ? |
844 | appl_search_start dd ? |
844 | appl_search_start dd ? |
845 | ends |
845 | ends |
846 | 846 | ||
847 | struct IDE_DEVICE |
847 | struct IDE_DEVICE |
848 | UDMA_possible_modes db ? |
848 | UDMA_possible_modes db ? |
849 | UDMA_set_mode db ? |
849 | UDMA_set_mode db ? |
850 | ends |
850 | ends |
851 | 851 | ||
852 | ; The following macro assume that we are on uniprocessor machine. |
852 | ; The following macro assume that we are on uniprocessor machine. |
853 | ; Serious work is needed for multiprocessor machines. |
853 | ; Serious work is needed for multiprocessor machines. |
854 | macro spin_lock_irqsave spinlock |
854 | macro spin_lock_irqsave spinlock |
855 | { |
855 | { |
856 | pushf |
856 | pushf |
857 | cli |
857 | cli |
858 | } |
858 | } |
859 | macro spin_unlock_irqrestore spinlock |
859 | macro spin_unlock_irqrestore spinlock |
860 | { |
860 | { |
861 | popf |
861 | popf |
862 | } |
862 | } |
863 | macro spin_lock_irq spinlock |
863 | macro spin_lock_irq spinlock |
864 | { |
864 | { |
865 | cli |
865 | cli |
866 | } |
866 | } |
867 | macro spin_unlock_irq spinlock |
867 | macro spin_unlock_irq spinlock |
868 | { |
868 | { |
869 | sti |
869 | sti |
870 | } |
870 | } |
871 | 871 | ||
872 | struct MEM_STATE |
872 | struct MEM_STATE |
873 | mutex MUTEX |
873 | mutex MUTEX |
874 | smallmap dd ? |
874 | smallmap dd ? |
875 | treemap dd ? |
875 | treemap dd ? |
876 | topsize dd ? |
876 | topsize dd ? |
877 | top dd ? |
877 | top dd ? |
878 | smallbins rd 4*32 |
878 | smallbins rd 4*32 |
879 | treebins rd 32 |
879 | treebins rd 32 |
880 | ends |
880 | ends |
881 | 881 | ||
882 | struct PG_DATA |
882 | struct PG_DATA |
883 | mem_amount dd ? |
883 | mem_amount dd ? |
884 | vesa_mem dd ? |
884 | vesa_mem dd ? |
885 | pages_count dd ? |
885 | pages_count dd ? |
886 | pages_free dd ? |
886 | pages_free dd ? |
887 | pages_faults dd ? |
887 | pages_faults dd ? |
888 | pagemap_size dd ? |
888 | pagemap_size dd ? |
889 | kernel_pages dd ? |
889 | kernel_pages dd ? |
890 | kernel_tables dd ? |
890 | kernel_tables dd ? |
891 | sys_page_dir dd ? |
891 | sys_page_dir dd ? |
892 | mutex MUTEX |
892 | mutex MUTEX |
893 | ends |
893 | ends |
894 | 894 | ||
895 | struct SRV |
895 | struct SRV |
896 | srv_name rb 16 ;ASCIIZ string |
896 | srv_name rb 16 ;ASCIIZ string |
897 | magic dd ? ;+0x10 ;'SRV ' |
897 | magic dd ? ;+0x10 ;'SRV ' |
898 | size dd ? ;+0x14 ;size of structure SRV |
898 | size dd ? ;+0x14 ;size of structure SRV |
899 | fd dd ? ;+0x18 ;next SRV descriptor |
899 | fd dd ? ;+0x18 ;next SRV descriptor |
900 | bk dd ? ;+0x1C ;prev SRV descriptor |
900 | bk dd ? ;+0x1C ;prev SRV descriptor |
901 | base dd ? ;+0x20 ;service base address |
901 | base dd ? ;+0x20 ;service base address |
902 | entry dd ? ;+0x24 ;service START function |
902 | entry dd ? ;+0x24 ;service START function |
903 | srv_proc dd ? ;+0x28 ;user mode service handler |
903 | srv_proc dd ? ;+0x28 ;user mode service handler |
904 | srv_proc_ex dd ? ;+0x2C ;kernel mode service handler |
904 | srv_proc_ex dd ? ;+0x2C ;kernel mode service handler |
905 | ends |
905 | ends |
906 | 906 | ||
907 | struct USBSRV |
907 | struct USBSRV |
908 | srv SRV |
908 | srv SRV |
909 | usb_func dd ? |
909 | usb_func dd ? |
910 | ends |
910 | ends |
911 | 911 | ||
912 | struct USBFUNC |
912 | struct USBFUNC |
913 | strucsize dd ? |
913 | strucsize dd ? |
914 | add_device dd ? |
914 | add_device dd ? |
915 | device_disconnect dd ? |
915 | device_disconnect dd ? |
916 | ends |
916 | ends |
917 | 917 | ||
918 | DRV_ENTRY = 1 |
918 | DRV_ENTRY = 1 |
919 | DRV_EXIT = -1 |
919 | DRV_EXIT = -1 |
920 | 920 | ||
921 | struct COFF_HEADER |
921 | struct COFF_HEADER |
922 | machine dw ? |
922 | machine dw ? |
923 | nSections dw ? |
923 | nSections dw ? |
924 | DataTime dd ? |
924 | DataTime dd ? |
925 | pSymTable dd ? |
925 | pSymTable dd ? |
926 | nSymbols dd ? |
926 | nSymbols dd ? |
927 | optHeader dw ? |
927 | optHeader dw ? |
928 | flags dw ? |
928 | flags dw ? |
929 | ends |
929 | ends |
930 | 930 | ||
931 | struct COFF_SECTION |
931 | struct COFF_SECTION |
932 | Name rb 8 |
932 | Name rb 8 |
933 | VirtualSize dd ? |
933 | VirtualSize dd ? |
934 | VirtualAddress dd ? |
934 | VirtualAddress dd ? |
935 | SizeOfRawData dd ? |
935 | SizeOfRawData dd ? |
936 | PtrRawData dd ? |
936 | PtrRawData dd ? |
937 | PtrReloc dd ? |
937 | PtrReloc dd ? |
938 | PtrLinenumbers dd ? |
938 | PtrLinenumbers dd ? |
939 | NumReloc dw ? |
939 | NumReloc dw ? |
940 | NumLinenum dw ? |
940 | NumLinenum dw ? |
941 | Characteristics dd ? |
941 | Characteristics dd ? |
942 | ends |
942 | ends |
943 | 943 | ||
944 | struct COFF_RELOC |
944 | struct COFF_RELOC |
945 | VirtualAddress dd ? |
945 | VirtualAddress dd ? |
946 | SymIndex dd ? |
946 | SymIndex dd ? |
947 | Type dw ? |
947 | Type dw ? |
948 | ends |
948 | ends |
949 | 949 | ||
950 | struct COFF_SYM |
950 | struct COFF_SYM |
951 | Name rb 8 |
951 | Name rb 8 |
952 | Value dd ? |
952 | Value dd ? |
953 | SectionNumber dw ? |
953 | SectionNumber dw ? |
954 | Type dw ? |
954 | Type dw ? |
955 | StorageClass db ? |
955 | StorageClass db ? |
956 | NumAuxSymbols db ? |
956 | NumAuxSymbols db ? |
957 | ends |
957 | ends |
958 | 958 | ||
959 | struct STRIPPED_PE_HEADER |
959 | struct STRIPPED_PE_HEADER |
960 | Signature dw ? |
960 | Signature dw ? |
961 | Characteristics dw ? |
961 | Characteristics dw ? |
962 | AddressOfEntryPoint dd ? |
962 | AddressOfEntryPoint dd ? |
963 | ImageBase dd ? |
963 | ImageBase dd ? |
964 | SectionAlignmentLog db ? |
964 | SectionAlignmentLog db ? |
965 | FileAlignmentLog db ? |
965 | FileAlignmentLog db ? |
966 | MajorOSVersion db ? |
966 | MajorOSVersion db ? |
967 | MinorOSVersion db ? |
967 | MinorOSVersion db ? |
968 | SizeOfImage dd ? |
968 | SizeOfImage dd ? |
969 | SizeOfStackReserve dd ? |
969 | SizeOfStackReserve dd ? |
970 | SizeOfHeapReserve dd ? |
970 | SizeOfHeapReserve dd ? |
971 | SizeOfHeaders dd ? |
971 | SizeOfHeaders dd ? |
972 | Subsystem db ? |
972 | Subsystem db ? |
973 | NumberOfRvaAndSizes db ? |
973 | NumberOfRvaAndSizes db ? |
974 | NumberOfSections dw ? |
974 | NumberOfSections dw ? |
975 | ends |
975 | ends |
976 | STRIPPED_PE_SIGNATURE = 0x4503 ; 'PE' xor 'S' |
976 | STRIPPED_PE_SIGNATURE = 0x4503 ; 'PE' xor 'S' |
977 | SPE_DIRECTORY_IMPORT = 0 |
977 | SPE_DIRECTORY_IMPORT = 0 |
978 | SPE_DIRECTORY_EXPORT = 1 |
978 | SPE_DIRECTORY_EXPORT = 1 |
979 | SPE_DIRECTORY_BASERELOC = 2 |
979 | SPE_DIRECTORY_BASERELOC = 2 |
980 | 980 | ||
981 | struct IOCTL |
981 | struct IOCTL |
982 | handle dd ? |
982 | handle dd ? |
983 | io_code dd ? |
983 | io_code dd ? |
984 | input dd ? |
984 | input dd ? |
985 | inp_size dd ? |
985 | inp_size dd ? |
986 | output dd ? |
986 | output dd ? |
987 | out_size dd ? |
987 | out_size dd ? |
988 | ends |
988 | ends |
989 | 989 | ||
990 | struct IRQH |
990 | struct IRQH |
991 | list LHEAD |
991 | list LHEAD |
992 | handler dd ? ;handler roututine |
992 | handler dd ? ;handler roututine |
993 | data dd ? ;user-specific data |
993 | data dd ? ;user-specific data |
994 | num_ints dd ? ;how many times handled |
994 | num_ints dd ? ;how many times handled |
995 | ends8)|WB |
995 | ends8)|WB |
996 | 996 | ||
997 | MAX_MEMMAP_BLOCKS><8)|WB |
997 | MAX_MEMMAP_BLOCKS><8)|WB |
998 | 998 | ||
999 | MAX_MEMMAP_BLOCKS>16)|(WC<<8)|WB |
999 | MAX_MEMMAP_BLOCKS>16)|(WC<<8)|WB |
1000 | 1000 | ||
1001 | MAX_MEMMAP_BLOCKS><16)|(WC<<8)|WB |
1001 | MAX_MEMMAP_BLOCKS><16)|(WC<<8)|WB |
1002 | 1002 | ||
1003 | MAX_MEMMAP_BLOCKS>24)|(UCM<<16)|(WC<<8)|WB |
1003 | MAX_MEMMAP_BLOCKS>24)|(UCM<<16)|(WC<<8)|WB |
1004 | 1004 | ||
1005 | MAX_MEMMAP_BLOCKS><24)|(UCM<<16)|(WC<<8)|WB |
1005 | MAX_MEMMAP_BLOCKS><24)|(UCM<<16)|(WC<<8)|WB |
1006 | 1006 | ||
1007 | MAX_MEMMAP_BLOCKS> |
1007 | MAX_MEMMAP_BLOCKS> |