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| Rev 8115 | Rev 8217 | ||
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| 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 2 | ;; ;; |
2 | ;; ;; |
| 3 | ;; Copyright (C) KolibriOS team 2004-2017. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2017. All rights reserved. ;; |
| 4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
| 5 | ;; ;; |
5 | ;; ;; |
| 6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| 7 | 7 | ||
| 8 | $Revision: 8115 $ |
8 | $Revision: 8217 $ |
| 9 | 9 | ||
| 10 | 10 | ||
| 11 | dpl0 = 10010000b ; data read dpl0 |
11 | dpl0 = 10010000b ; data read dpl0 |
| 12 | drw0 = 10010010b ; data read/write dpl0 |
12 | drw0 = 10010010b ; data read/write dpl0 |
| 13 | drw3 = 11110010b ; data read/write dpl3 |
13 | drw3 = 11110010b ; data read/write dpl3 |
| 14 | cpl0 = 10011010b ; code read dpl0 |
14 | cpl0 = 10011010b ; code read dpl0 |
| 15 | cpl3 = 11111010b ; code read dpl3 |
15 | cpl3 = 11111010b ; code read dpl3 |
| 16 | 16 | ||
| 17 | D32 = 01000000b ; 32bit segment |
17 | D32 = 01000000b ; 32bit segment |
| 18 | G32 = 10000000b ; page gran |
18 | G32 = 10000000b ; page gran |
| 19 | 19 | ||
| 20 | 20 | ||
| 21 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
21 | ;;;;;;;;;;;;cpu_caps flags;;;;;;;;;;;;;;;; |
| 22 | 22 | ||
| 23 | CPU_386 = 3 |
23 | CPU_386 = 3 |
| 24 | CPU_486 = 4 |
24 | CPU_486 = 4 |
| 25 | CPU_PENTIUM = 5 |
25 | CPU_PENTIUM = 5 |
| 26 | CPU_P6 = 6 |
26 | CPU_P6 = 6 |
| 27 | CPU_PENTIUM4 = 0x0F |
27 | CPU_PENTIUM4 = 0x0F |
| 28 | 28 | ||
| 29 | CAPS_FPU = 00 ;on-chip x87 floating point unit |
29 | CAPS_FPU = 00 ;on-chip x87 floating point unit |
| 30 | CAPS_VME = 01 ;virtual-mode enhancements |
30 | CAPS_VME = 01 ;virtual-mode enhancements |
| 31 | CAPS_DE = 02 ;debugging extensions |
31 | CAPS_DE = 02 ;debugging extensions |
| 32 | CAPS_PSE = 03 ;page-size extensions |
32 | CAPS_PSE = 03 ;page-size extensions |
| 33 | CAPS_TSC = 04 ;time stamp counter |
33 | CAPS_TSC = 04 ;time stamp counter |
| 34 | CAPS_MSR = 05 ;model-specific registers |
34 | CAPS_MSR = 05 ;model-specific registers |
| 35 | CAPS_PAE = 06 ;physical-address extensions |
35 | CAPS_PAE = 06 ;physical-address extensions |
| 36 | CAPS_MCE = 07 ;machine check exception |
36 | CAPS_MCE = 07 ;machine check exception |
| 37 | CAPS_CX8 = 08 ;CMPXCHG8B instruction |
37 | CAPS_CX8 = 08 ;CMPXCHG8B instruction |
| 38 | CAPS_APIC = 09 ;on-chip advanced programmable |
38 | CAPS_APIC = 09 ;on-chip advanced programmable |
| 39 | ;interrupt controller |
39 | ;interrupt controller |
| 40 | ; 10 ;unused |
40 | ; 10 ;unused |
| 41 | CAPS_SEP = 11 ;SYSENTER and SYSEXIT instructions |
41 | CAPS_SEP = 11 ;SYSENTER and SYSEXIT instructions |
| 42 | CAPS_MTRR = 12 ;memory-type range registers |
42 | CAPS_MTRR = 12 ;memory-type range registers |
| 43 | CAPS_PGE = 13 ;page global extension |
43 | CAPS_PGE = 13 ;page global extension |
| 44 | CAPS_MCA = 14 ;machine check architecture |
44 | CAPS_MCA = 14 ;machine check architecture |
| 45 | CAPS_CMOV = 15 ;conditional move instructions |
45 | CAPS_CMOV = 15 ;conditional move instructions |
| 46 | CAPS_PAT = 16 ;page attribute table |
46 | CAPS_PAT = 16 ;page attribute table |
| 47 | 47 | ||
| 48 | CAPS_PSE36 = 17 ;page-size extensions |
48 | CAPS_PSE36 = 17 ;page-size extensions |
| 49 | CAPS_PSN = 18 ;processor serial number |
49 | CAPS_PSN = 18 ;processor serial number |
| 50 | CAPS_CLFLUSH = 19 ;CLFUSH instruction |
50 | CAPS_CLFLUSH = 19 ;CLFUSH instruction |
| 51 | 51 | ||
| 52 | CAPS_DS = 21 ;debug store |
52 | CAPS_DS = 21 ;debug store |
| 53 | CAPS_ACPI = 22 ;thermal monitor and software |
53 | CAPS_ACPI = 22 ;thermal monitor and software |
| 54 | ;controlled clock supported |
54 | ;controlled clock supported |
| 55 | CAPS_MMX = 23 ;MMX instructions |
55 | CAPS_MMX = 23 ;MMX instructions |
| 56 | CAPS_FXSR = 24 ;FXSAVE and FXRSTOR instructions |
56 | CAPS_FXSR = 24 ;FXSAVE and FXRSTOR instructions |
| 57 | CAPS_SSE = 25 ;SSE instructions |
57 | CAPS_SSE = 25 ;SSE instructions |
| 58 | CAPS_SSE2 = 26 ;SSE2 instructions |
58 | CAPS_SSE2 = 26 ;SSE2 instructions |
| 59 | CAPS_SS = 27 ;self-snoop |
59 | CAPS_SS = 27 ;self-snoop |
| 60 | CAPS_HTT = 28 ;hyper-threading technology |
60 | CAPS_HTT = 28 ;hyper-threading technology |
| 61 | CAPS_TM = 29 ;thermal monitor supported |
61 | CAPS_TM = 29 ;thermal monitor supported |
| 62 | CAPS_IA64 = 30 ;IA64 capabilities |
62 | CAPS_IA64 = 30 ;IA64 capabilities |
| 63 | CAPS_PBE = 31 ;pending break enable |
63 | CAPS_PBE = 31 ;pending break enable |
| 64 | 64 | ||
| 65 | ;ecx |
65 | ;ecx |
| 66 | CAPS_SSE3 = 32 ;SSE3 instructions |
66 | CAPS_SSE3 = 32 ;SSE3 instructions |
| 67 | ; 33 |
67 | ; 33 |
| 68 | ; 34 |
68 | ; 34 |
| 69 | CAPS_MONITOR = 35 ;MONITOR/MWAIT instructions |
69 | CAPS_MONITOR = 35 ;MONITOR/MWAIT instructions |
| 70 | CAPS_DS_CPL = 36 ; |
70 | CAPS_DS_CPL = 36 ; |
| 71 | CAPS_VMX = 37 ;virtual mode extensions |
71 | CAPS_VMX = 37 ;virtual mode extensions |
| 72 | ; 38 ; |
72 | ; 38 ; |
| 73 | CAPS_EST = 39 ;enhansed speed step |
73 | CAPS_EST = 39 ;enhansed speed step |
| 74 | CAPS_TM2 = 40 ;thermal monitor2 supported |
74 | CAPS_TM2 = 40 ;thermal monitor2 supported |
| 75 | ; 41 |
75 | ; 41 |
| 76 | CAPS_CID = 42 ; |
76 | CAPS_CID = 42 ; |
| 77 | ; 43 |
77 | ; 43 |
| 78 | ; 44 |
78 | ; 44 |
| 79 | CAPS_CX16 = 45 ;CMPXCHG16B instruction |
79 | CAPS_CX16 = 45 ;CMPXCHG16B instruction |
| 80 | CAPS_xTPR = 46 ; |
80 | CAPS_xTPR = 46 ; |
| 81 | CAPS_XSAVE = 32 + 26 ; XSAVE and XRSTOR instructions |
81 | CAPS_XSAVE = 32 + 26 ; XSAVE and XRSTOR instructions |
| 82 | CAPS_OSXSAVE = 32 + 27 |
82 | CAPS_OSXSAVE = 32 + 27 |
| 83 | ; A value of 1 indicates that the OS has set CR4.OSXSAVE[bit 18] to enable |
83 | ; A value of 1 indicates that the OS has set CR4.OSXSAVE[bit 18] to enable |
| 84 | ; XSETBV/XGETBV instructions to access XCR0 and to support processor extended |
84 | ; XSETBV/XGETBV instructions to access XCR0 and to support processor extended |
| 85 | ; state management using XSAVE/XRSTOR. |
85 | ; state management using XSAVE/XRSTOR. |
| 86 | CAPS_AVX = 32 + 28 ; not AVX2 |
86 | CAPS_AVX = 32 + 28 ; not AVX2 |
| 87 | ; |
87 | ; |
| 88 | ;reserved |
88 | ;reserved |
| 89 | ; |
89 | ; |
| 90 | ;ext edx /ecx |
90 | ;ext edx /ecx |
| 91 | CAPS_SYSCAL = 64 ; |
91 | CAPS_SYSCAL = 64 ; |
| 92 | CAPS_XD = 65 ;execution disable |
92 | CAPS_XD = 65 ;execution disable |
| 93 | CAPS_FFXSR = 66 ; |
93 | CAPS_FFXSR = 66 ; |
| 94 | CAPS_RDTSCP = 67 ; |
94 | CAPS_RDTSCP = 67 ; |
| 95 | CAPS_X64 = 68 ; |
95 | CAPS_X64 = 68 ; |
| 96 | CAPS_3DNOW = 69 ; |
96 | CAPS_3DNOW = 69 ; |
| 97 | CAPS_3DNOWEXT = 70 ; |
97 | CAPS_3DNOWEXT = 70 ; |
| 98 | CAPS_LAHF = 71 ; |
98 | CAPS_LAHF = 71 ; |
| 99 | CAPS_CMP_LEG = 72 ; |
99 | CAPS_CMP_LEG = 72 ; |
| 100 | CAPS_SVM = 73 ;secure virual machine |
100 | CAPS_SVM = 73 ;secure virual machine |
| 101 | CAPS_ALTMOVCR8 = 74 ; |
101 | CAPS_ALTMOVCR8 = 74 ; |
| 102 | 102 | ||
| 103 | ; CPU MSR names |
103 | ; CPU MSR names |
| 104 | MSR_SYSENTER_CS = 0x174 |
104 | MSR_SYSENTER_CS = 0x174 |
| 105 | MSR_SYSENTER_ESP = 0x175 |
105 | MSR_SYSENTER_ESP = 0x175 |
| 106 | MSR_SYSENTER_EIP = 0x176 |
106 | MSR_SYSENTER_EIP = 0x176 |
| 107 | MSR_CR_PAT = 0x277 |
107 | MSR_CR_PAT = 0x277 |
| 108 | MSR_MTRR_DEF_TYPE = 0x2FF |
108 | MSR_MTRR_DEF_TYPE = 0x2FF |
| 109 | 109 | ||
| 110 | MSR_AMD_EFER = 0xC0000080 ; Extended Feature Enable Register |
110 | MSR_AMD_EFER = 0xC0000080 ; Extended Feature Enable Register |
| 111 | MSR_AMD_STAR = 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
111 | MSR_AMD_STAR = 0xC0000081 ; SYSCALL/SYSRET Target Address Register |
| 112 | 112 | ||
| 113 | CR0_PE = 0x00000001 ;protected mode |
113 | CR0_PE = 0x00000001 ;protected mode |
| 114 | CR0_MP = 0x00000002 ;monitor fpu |
114 | CR0_MP = 0x00000002 ;monitor fpu |
| 115 | CR0_EM = 0x00000004 ;fpu emulation |
115 | CR0_EM = 0x00000004 ;fpu emulation |
| 116 | CR0_TS = 0x00000008 ;task switch |
116 | CR0_TS = 0x00000008 ;task switch |
| 117 | CR0_ET = 0x00000010 ;extension type hardcoded to 1 |
117 | CR0_ET = 0x00000010 ;extension type hardcoded to 1 |
| 118 | CR0_NE = 0x00000020 ;numeric error |
118 | CR0_NE = 0x00000020 ;numeric error |
| 119 | CR0_WP = 0x00010000 ;write protect |
119 | CR0_WP = 0x00010000 ;write protect |
| 120 | CR0_AM = 0x00040000 ;alignment check |
120 | CR0_AM = 0x00040000 ;alignment check |
| 121 | CR0_NW = 0x20000000 ;not write-through |
121 | CR0_NW = 0x20000000 ;not write-through |
| 122 | CR0_CD = 0x40000000 ;cache disable |
122 | CR0_CD = 0x40000000 ;cache disable |
| 123 | CR0_PG = 0x80000000 ;paging |
123 | CR0_PG = 0x80000000 ;paging |
| 124 | 124 | ||
| 125 | 125 | ||
| 126 | CR4_VME = 0x000001 |
126 | CR4_VME = 0x000001 |
| 127 | CR4_PVI = 0x000002 |
127 | CR4_PVI = 0x000002 |
| 128 | CR4_TSD = 0x000004 |
128 | CR4_TSD = 0x000004 |
| 129 | CR4_DE = 0x000008 |
129 | CR4_DE = 0x000008 |
| 130 | CR4_PSE = 0x000010 |
130 | CR4_PSE = 0x000010 |
| 131 | CR4_PAE = 0x000020 |
131 | CR4_PAE = 0x000020 |
| 132 | CR4_MCE = 0x000040 |
132 | CR4_MCE = 0x000040 |
| 133 | CR4_PGE = 0x000080 |
133 | CR4_PGE = 0x000080 |
| 134 | CR4_PCE = 0x000100 |
134 | CR4_PCE = 0x000100 |
| 135 | CR4_OSFXSR = 0x000200 |
135 | CR4_OSFXSR = 0x000200 |
| 136 | CR4_OSXMMEXPT = 0x000400 |
136 | CR4_OSXMMEXPT = 0x000400 |
| 137 | CR4_OSXSAVE = 0x040000 |
137 | CR4_OSXSAVE = 0x040000 |
| 138 | 138 | ||
| 139 | XCR0_FPU_MMX = 0x0001 |
139 | XCR0_FPU_MMX = 0x0001 |
| 140 | XCR0_SSE = 0x0002 |
140 | XCR0_SSE = 0x0002 |
| 141 | XCR0_AVX = 0x0004 |
141 | XCR0_AVX = 0x0004 |
| 142 | XCR0_MPX = 0x0018 |
142 | XCR0_MPX = 0x0018 |
| 143 | XCR0_AVX512 = 0x00e0 |
143 | XCR0_AVX512 = 0x00e0 |
| 144 | 144 | ||
| 145 | MXCSR_IE = 0x0001 |
145 | MXCSR_IE = 0x0001 |
| 146 | MXCSR_DE = 0x0002 |
146 | MXCSR_DE = 0x0002 |
| 147 | MXCSR_ZE = 0x0004 |
147 | MXCSR_ZE = 0x0004 |
| 148 | MXCSR_OE = 0x0008 |
148 | MXCSR_OE = 0x0008 |
| 149 | MXCSR_UE = 0x0010 |
149 | MXCSR_UE = 0x0010 |
| 150 | MXCSR_PE = 0x0020 |
150 | MXCSR_PE = 0x0020 |
| 151 | MXCSR_DAZ = 0x0040 |
151 | MXCSR_DAZ = 0x0040 |
| 152 | MXCSR_IM = 0x0080 |
152 | MXCSR_IM = 0x0080 |
| 153 | MXCSR_DM = 0x0100 |
153 | MXCSR_DM = 0x0100 |
| 154 | MXCSR_ZM = 0x0200 |
154 | MXCSR_ZM = 0x0200 |
| 155 | MXCSR_OM = 0x0400 |
155 | MXCSR_OM = 0x0400 |
| 156 | MXCSR_UM = 0x0800 |
156 | MXCSR_UM = 0x0800 |
| 157 | MXCSR_PM = 0x1000 |
157 | MXCSR_PM = 0x1000 |
| 158 | MXCSR_FZ = 0x8000 |
158 | MXCSR_FZ = 0x8000 |
| 159 | 159 | ||
| 160 | MXCSR_INIT = MXCSR_IM + MXCSR_DM + MXCSR_ZM + MXCSR_OM + MXCSR_UM + MXCSR_PM |
160 | MXCSR_INIT = MXCSR_IM + MXCSR_DM + MXCSR_ZM + MXCSR_OM + MXCSR_UM + MXCSR_PM |
| 161 | 161 | ||
| 162 | EFLAGS_CF = 0x000001 ; carry flag |
162 | EFLAGS_CF = 0x000001 ; carry flag |
| 163 | EFLAGS_PF = 0x000004 ; parity flag |
163 | EFLAGS_PF = 0x000004 ; parity flag |
| 164 | EFLAGS_AF = 0x000010 ; auxiliary flag |
164 | EFLAGS_AF = 0x000010 ; auxiliary flag |
| 165 | EFLAGS_ZF = 0x000040 ; zero flag |
165 | EFLAGS_ZF = 0x000040 ; zero flag |
| 166 | EFLAGS_SF = 0x000080 ; sign flag |
166 | EFLAGS_SF = 0x000080 ; sign flag |
| 167 | EFLAGS_TF = 0x000100 ; trap flag |
167 | EFLAGS_TF = 0x000100 ; trap flag |
| 168 | EFLAGS_IF = 0x000200 ; interrupt flag |
168 | EFLAGS_IF = 0x000200 ; interrupt flag |
| 169 | EFLAGS_DF = 0x000400 ; direction flag |
169 | EFLAGS_DF = 0x000400 ; direction flag |
| 170 | EFLAGS_OF = 0x000800 ; overflow flag |
170 | EFLAGS_OF = 0x000800 ; overflow flag |
| 171 | EFLAGS_IOPL = 0x003000 ; i/o priviledge level |
171 | EFLAGS_IOPL = 0x003000 ; i/o priviledge level |
| 172 | EFLAGS_NT = 0x004000 ; nested task flag |
172 | EFLAGS_NT = 0x004000 ; nested task flag |
| 173 | EFLAGS_RF = 0x010000 ; resume flag |
173 | EFLAGS_RF = 0x010000 ; resume flag |
| 174 | EFLAGS_VM = 0x020000 ; virtual 8086 mode flag |
174 | EFLAGS_VM = 0x020000 ; virtual 8086 mode flag |
| 175 | EFLAGS_AC = 0x040000 ; alignment check flag |
175 | EFLAGS_AC = 0x040000 ; alignment check flag |
| 176 | EFLAGS_VIF = 0x080000 ; virtual interrupt flag |
176 | EFLAGS_VIF = 0x080000 ; virtual interrupt flag |
| 177 | EFLAGS_VIP = 0x100000 ; virtual interrupt pending |
177 | EFLAGS_VIP = 0x100000 ; virtual interrupt pending |
| 178 | EFLAGS_ID = 0x200000 ; id flag |
178 | EFLAGS_ID = 0x200000 ; id flag |
| 179 | 179 | ||
| 180 | IRQ_PIC = 0 |
180 | IRQ_PIC = 0 |
| 181 | IRQ_APIC = 1 |
181 | IRQ_APIC = 1 |
| 182 | 182 | ||
| 183 | struct TSS |
183 | struct TSS |
| 184 | _back rw 2 |
184 | _back rw 2 |
| 185 | _esp0 rd 1 |
185 | _esp0 rd 1 |
| 186 | _ss0 rw 2 |
186 | _ss0 rw 2 |
| 187 | _esp1 rd 1 |
187 | _esp1 rd 1 |
| 188 | _ss1 rw 2 |
188 | _ss1 rw 2 |
| 189 | _esp2 rd 1 |
189 | _esp2 rd 1 |
| 190 | _ss2 rw 2 |
190 | _ss2 rw 2 |
| 191 | _cr3 rd 1 |
191 | _cr3 rd 1 |
| 192 | _eip rd 1 |
192 | _eip rd 1 |
| 193 | _eflags rd 1 |
193 | _eflags rd 1 |
| 194 | _eax rd 1 |
194 | _eax rd 1 |
| 195 | _ecx rd 1 |
195 | _ecx rd 1 |
| 196 | _edx rd 1 |
196 | _edx rd 1 |
| 197 | _ebx rd 1 |
197 | _ebx rd 1 |
| 198 | _esp rd 1 |
198 | _esp rd 1 |
| 199 | _ebp rd 1 |
199 | _ebp rd 1 |
| 200 | _esi rd 1 |
200 | _esi rd 1 |
| 201 | _edi rd 1 |
201 | _edi rd 1 |
| 202 | _es rw 2 |
202 | _es rw 2 |
| 203 | _cs rw 2 |
203 | _cs rw 2 |
| 204 | _ss rw 2 |
204 | _ss rw 2 |
| 205 | _ds rw 2 |
205 | _ds rw 2 |
| 206 | _fs rw 2 |
206 | _fs rw 2 |
| 207 | _gs rw 2 |
207 | _gs rw 2 |
| 208 | _ldt rw 2 |
208 | _ldt rw 2 |
| 209 | _trap rw 1 |
209 | _trap rw 1 |
| 210 | _io rw 1 |
210 | _io rw 1 |
| 211 | rb 24 |
211 | rb 24 |
| 212 | _io_map_0 rb 4096 |
212 | _io_map_0 rb 4096 |
| 213 | _io_map_1 rb 4096 |
213 | _io_map_1 rb 4096 |
| 214 | ends |
214 | ends |
| 215 | 215 | ||
| 216 | DRIVE_DATA_SIZE = 16 |
216 | DRIVE_DATA_SIZE = 16 |
| 217 | 217 | ||
| 218 | OS_BASE = 0x80000000 |
218 | OS_BASE = 0x80000000 |
| 219 | 219 | ||
| 220 | window_data = OS_BASE + 0x0001000 |
220 | window_data = OS_BASE + 0x0001000 |
| 221 | 221 | ||
| 222 | CURRENT_TASK = OS_BASE + 0x0003000 |
222 | CURRENT_TASK = OS_BASE + 0x0003000 |
| 223 | TASK_COUNT = OS_BASE + 0x0003004 |
223 | TASK_COUNT = OS_BASE + 0x0003004 |
| 224 | TASK_BASE = OS_BASE + 0x0003010 |
224 | TASK_BASE = OS_BASE + 0x0003010 |
| 225 | TASK_DATA = OS_BASE + 0x0003020 |
225 | TASK_DATA = OS_BASE + 0x0003020 |
| 226 | TASK_EVENT = OS_BASE + 0x0003020 |
226 | TASK_EVENT = OS_BASE + 0x0003020 |
| 227 | 227 | ||
| 228 | CDDataBuf = OS_BASE + 0x0005000 |
228 | CDDataBuf = OS_BASE + 0x0005000 |
| 229 | 229 | ||
| 230 | ;unused 0x6000 - 0x8fff |
230 | ;unused 0x6000 - 0x8fff |
| 231 | 231 | ||
| 232 | BOOT_VARS = 0x9000 |
232 | BOOT_VARS = 0x9000 |
| 233 | 233 | ||
| 234 | idts = OS_BASE + 0x000B100 |
234 | idts = OS_BASE + 0x000B100 |
| 235 | WIN_STACK = OS_BASE + 0x000C000 |
235 | WIN_STACK = OS_BASE + 0x000C000 |
| 236 | WIN_POS = OS_BASE + 0x000C400 |
236 | WIN_POS = OS_BASE + 0x000C400 |
| 237 | FDD_BUFF = OS_BASE + 0x000D000 ;512 |
237 | FDD_BUFF = OS_BASE + 0x000D000 ;512 |
| 238 | 238 | ||
| 239 | WIN_TEMP_XY = OS_BASE + 0x000F300 |
239 | WIN_TEMP_XY = OS_BASE + 0x000F300 |
| 240 | KEY_COUNT = OS_BASE + 0x000F400 |
240 | KEY_COUNT = OS_BASE + 0x000F400 |
| 241 | KEY_BUFF = OS_BASE + 0x000F401 ; 120*2 + 2*2 = 244 bytes, actually 255 bytes |
241 | KEY_BUFF = OS_BASE + 0x000F401 ; 120*2 + 2*2 = 244 bytes, actually 255 bytes |
| 242 | 242 | ||
| 243 | BTN_COUNT = OS_BASE + 0x000F500 |
243 | BTN_COUNT = OS_BASE + 0x000F500 |
| 244 | BTN_BUFF = OS_BASE + 0x000F501 |
244 | BTN_BUFF = OS_BASE + 0x000F501 |
| 245 | 245 | ||
| 246 | 246 | ||
| 247 | BTN_ADDR = OS_BASE + 0x000FE88 |
247 | BTN_ADDR = OS_BASE + 0x000FE88 |
| 248 | MEM_AMOUNT = OS_BASE + 0x000FE8C |
248 | MEM_AMOUNT = OS_BASE + 0x000FE8C |
| 249 | 249 | ||
| 250 | SYS_SHUTDOWN = OS_BASE + 0x000FF00 |
250 | SYS_SHUTDOWN = OS_BASE + 0x000FF00 |
| 251 | 251 | ||
| 252 | 252 | ||
| 253 | TMP_STACK_TOP = 0x007CC00 |
253 | TMP_STACK_TOP = 0x007CC00 |
| 254 | 254 | ||
| 255 | sys_proc = OS_BASE + 0x007E000 |
255 | sys_proc = OS_BASE + 0x007E000 |
| 256 | 256 | ||
| 257 | SLOT_BASE = OS_BASE + 0x0080000 |
257 | SLOT_BASE = OS_BASE + 0x0080000 |
| 258 | 258 | ||
| 259 | VGABasePtr = OS_BASE + 0x00A0000 |
259 | VGABasePtr = OS_BASE + 0x00A0000 |
| 260 | 260 | ||
| 261 | virtual at OS_BASE + 0x05FFF80 |
261 | virtual at OS_BASE + 0x05FFF80 |
| 262 | tss TSS |
262 | tss TSS |
| 263 | end virtual |
263 | end virtual |
| 264 | 264 | ||
| 265 | HEAP_BASE = OS_BASE + 0x0800000 |
265 | HEAP_BASE = OS_BASE + 0x0800000 |
| 266 | HEAP_MIN_SIZE = 0x01000000 |
266 | HEAP_MIN_SIZE = 0x01000000 |
| 267 | 267 | ||
| 268 | page_tabs = 0xFDC00000 |
268 | page_tabs = 0xFDC00000 |
| 269 | app_page_tabs = 0xFDC00000 |
269 | app_page_tabs = 0xFDC00000 |
| 270 | kernel_tabs = page_tabs + (OS_BASE shr 10) ;0xFDE00000 |
270 | kernel_tabs = page_tabs + (OS_BASE shr 10) ;0xFDE00000 |
| 271 | master_tab = page_tabs + (page_tabs shr 10) ;0xFDFF70000 |
271 | master_tab = page_tabs + (page_tabs shr 10) ;0xFDFF70000 |
| 272 | 272 | ||
| 273 | LFB_BASE = 0xFE000000 |
273 | LFB_BASE = 0xFE000000 |
| 274 | 274 | ||
| 275 | 275 | ||
| 276 | new_app_base = 0; |
276 | new_app_base = 0; |
| 277 | 277 | ||
| 278 | twdw = CURRENT_TASK - window_data |
278 | twdw = CURRENT_TASK - window_data |
| 279 | 279 | ||
| 280 | std_application_base_address = new_app_base |
280 | std_application_base_address = new_app_base |
| 281 | RING0_STACK_SIZE = 0x2000 |
281 | RING0_STACK_SIZE = 0x2000 |
| 282 | 282 | ||
| 283 | REG_SS = RING0_STACK_SIZE - 4 |
283 | REG_SS = RING0_STACK_SIZE - 4 |
| 284 | REG_APP_ESP = RING0_STACK_SIZE - 8 |
284 | REG_APP_ESP = RING0_STACK_SIZE - 8 |
| 285 | REG_EFLAGS = RING0_STACK_SIZE - 12 |
285 | REG_EFLAGS = RING0_STACK_SIZE - 12 |
| 286 | REG_CS = RING0_STACK_SIZE - 16 |
286 | REG_CS = RING0_STACK_SIZE - 16 |
| 287 | REG_EIP = RING0_STACK_SIZE - 20 |
287 | REG_EIP = RING0_STACK_SIZE - 20 |
| 288 | REG_EAX = RING0_STACK_SIZE - 24 |
288 | REG_EAX = RING0_STACK_SIZE - 24 |
| 289 | REG_ECX = RING0_STACK_SIZE - 28 |
289 | REG_ECX = RING0_STACK_SIZE - 28 |
| 290 | REG_EDX = RING0_STACK_SIZE - 32 |
290 | REG_EDX = RING0_STACK_SIZE - 32 |
| 291 | REG_EBX = RING0_STACK_SIZE - 36 |
291 | REG_EBX = RING0_STACK_SIZE - 36 |
| 292 | REG_ESP = RING0_STACK_SIZE - 40 ;RING0_STACK_SIZE-20 |
292 | REG_ESP = RING0_STACK_SIZE - 40 ;RING0_STACK_SIZE-20 |
| 293 | REG_EBP = RING0_STACK_SIZE - 44 |
293 | REG_EBP = RING0_STACK_SIZE - 44 |
| 294 | REG_ESI = RING0_STACK_SIZE - 48 |
294 | REG_ESI = RING0_STACK_SIZE - 48 |
| 295 | REG_EDI = RING0_STACK_SIZE - 52 |
295 | REG_EDI = RING0_STACK_SIZE - 52 |
| 296 | REG_RET = RING0_STACK_SIZE - 56 ;irq0.return |
296 | REG_RET = RING0_STACK_SIZE - 56 ;irq0.return |
| 297 | 297 | ||
| 298 | 298 | ||
| 299 | PAGE_SIZE = 4096 |
299 | PAGE_SIZE = 4096 |
| 300 | 300 | ||
| 301 | PG_UNMAP = 0x000 |
301 | PG_UNMAP = 0x000 |
| 302 | PG_READ = 0x001 |
302 | PG_READ = 0x001 |
| 303 | PG_WRITE = 0x002 |
303 | PG_WRITE = 0x002 |
| 304 | PG_USER = 0x004 |
304 | PG_USER = 0x004 |
| 305 | PG_PCD = 0x008 |
305 | PG_PCD = 0x008 |
| 306 | PG_PWT = 0x010 |
306 | PG_PWT = 0x010 |
| 307 | PG_ACCESSED = 0x020 |
307 | PG_ACCESSED = 0x020 |
| 308 | PG_DIRTY = 0x040 |
308 | PG_DIRTY = 0x040 |
| 309 | PG_PAT = 0x080 |
309 | PG_PAT = 0x080 |
| 310 | PG_GLOBAL = 0x100 |
310 | PG_GLOBAL = 0x100 |
| 311 | PG_SHARED = 0x200 |
311 | PG_SHARED = 0x200 |
| 312 | 312 | ||
| 313 | PG_SWR = 0x003 ; PG_WRITE + PG_READ |
313 | PG_SWR = 0x003 ; PG_WRITE + PG_READ |
| 314 | PG_UR = 0x005 ; PG_USER + PG_READ |
314 | PG_UR = 0x005 ; PG_USER + PG_READ |
| 315 | PG_UWR = 0x007 ; PG_USER + PG_WRITE + PG_READ |
315 | PG_UWR = 0x007 ; PG_USER + PG_WRITE + PG_READ |
| 316 | PG_NOCACHE = 0x018 ; PG_PCD + PG_PWT |
316 | PG_NOCACHE = 0x018 ; PG_PCD + PG_PWT |
| 317 | 317 | ||
| 318 | PDE_LARGE = 0x080 |
318 | PDE_LARGE = 0x080 |
| 319 | 319 | ||
| 320 | MEM_WB = 6 ; write-back memory |
320 | MEM_WB = 6 ; write-back memory |
| 321 | MEM_WC = 1 ; write combined memory |
321 | MEM_WC = 1 ; write combined memory |
| 322 | MEM_UC = 0 ; uncached memory |
322 | MEM_UC = 0 ; uncached memory |
| 323 | 323 | ||
| 324 | PAT_WB = 0x000 |
324 | PAT_WB = 0x000 |
| 325 | PAT_WC = 0x008 |
325 | PAT_WC = 0x008 |
| 326 | PAT_UCM = 0x010 |
326 | PAT_UCM = 0x010 |
| 327 | PAT_UC = 0x018 |
327 | PAT_UC = 0x018 |
| 328 | 328 | ||
| 329 | PAT_TYPE_UC = 0 |
329 | PAT_TYPE_UC = 0 |
| 330 | PAT_TYPE_WC = 1 |
330 | PAT_TYPE_WC = 1 |
| 331 | PAT_TYPE_WB = 6 |
331 | PAT_TYPE_WB = 6 |
| 332 | PAT_TYPE_UCM = 7 |
332 | PAT_TYPE_UCM = 7 |
| 333 | 333 | ||
| 334 | PAT_VALUE = 0x00070106; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
334 | PAT_VALUE = 0x00070106; (UC<<24)|(UCM<<16)|(WC<<8)|WB |
| 335 | 335 | ||
| 336 | MAX_MEMMAP_BLOCKS = 32 |
336 | MAX_MEMMAP_BLOCKS = 32 |
| 337 | - | ||
| 338 | TMP_FILE_NAME = 0 |
- | |
| 339 | TMP_CMD_LINE = 1024 |
- | |
| 340 | TMP_ICON_OFFS = 1280 |
- | |
| 341 | - | ||
| 342 | 337 | ||
| 343 | EVENT_REDRAW = 0x00000001 |
338 | EVENT_REDRAW = 0x00000001 |
| 344 | EVENT_KEY = 0x00000002 |
339 | EVENT_KEY = 0x00000002 |
| 345 | EVENT_BUTTON = 0x00000004 |
340 | EVENT_BUTTON = 0x00000004 |
| 346 | EVENT_BACKGROUND = 0x00000010 |
341 | EVENT_BACKGROUND = 0x00000010 |
| 347 | EVENT_MOUSE = 0x00000020 |
342 | EVENT_MOUSE = 0x00000020 |
| 348 | EVENT_IPC = 0x00000040 |
343 | EVENT_IPC = 0x00000040 |
| 349 | EVENT_NETWORK = 0x00000080 |
344 | EVENT_NETWORK = 0x00000080 |
| 350 | EVENT_DEBUG = 0x00000100 |
345 | EVENT_DEBUG = 0x00000100 |
| 351 | EVENT_NETWORK2 = 0x00000200 |
346 | EVENT_NETWORK2 = 0x00000200 |
| 352 | EVENT_EXTENDED = 0x00000400 |
347 | EVENT_EXTENDED = 0x00000400 |
| 353 | 348 | ||
| 354 | EV_INTR = 1 |
349 | EV_INTR = 1 |
| 355 | 350 | ||
| 356 | STDIN_FILENO = 0 |
351 | STDIN_FILENO = 0 |
| 357 | STDOUT_FILENO = 1 |
352 | STDOUT_FILENO = 1 |
| 358 | STDERR_FILENO = 2 |
353 | STDERR_FILENO = 2 |
| 359 | 354 | ||
| 360 | SYSTEM_SHUTDOWN = 2 |
355 | SYSTEM_SHUTDOWN = 2 |
| 361 | SYSTEM_REBOOT = 3 |
356 | SYSTEM_REBOOT = 3 |
| 362 | SYSTEM_RESTART = 4 |
357 | SYSTEM_RESTART = 4 |
| 363 | 358 | ||
| 364 | BLIT_CLIENT_RELATIVE = 0x20000000 |
359 | BLIT_CLIENT_RELATIVE = 0x20000000 |
| 365 | 360 | ||
| 366 | struct SYSCALL_STACK |
361 | struct SYSCALL_STACK |
| 367 | _eip dd ? |
362 | _eip dd ? |
| 368 | _edi dd ? ; +4 |
363 | _edi dd ? ; +4 |
| 369 | _esi dd ? ; +8 |
364 | _esi dd ? ; +8 |
| 370 | _ebp dd ? ; +12 |
365 | _ebp dd ? ; +12 |
| 371 | _esp dd ? ; +16 |
366 | _esp dd ? ; +16 |
| 372 | _ebx dd ? ; +20 |
367 | _ebx dd ? ; +20 |
| 373 | _edx dd ? ; +24 |
368 | _edx dd ? ; +24 |
| 374 | _ecx dd ? ; +28 |
369 | _ecx dd ? ; +28 |
| 375 | _eax dd ? ; +32 |
370 | _eax dd ? ; +32 |
| 376 | ends |
371 | ends |
| 377 | 372 | ||
| 378 | struct LHEAD |
373 | struct LHEAD |
| 379 | next dd ? ;next object in list |
374 | next dd ? ;next object in list |
| 380 | prev dd ? ;prev object in list |
375 | prev dd ? ;prev object in list |
| 381 | ends |
376 | ends |
| 382 | 377 | ||
| 383 | struct MUTEX_WAITER |
378 | struct MUTEX_WAITER |
| 384 | list LHEAD |
379 | list LHEAD |
| 385 | task dd ? |
380 | task dd ? |
| 386 | type dd ? |
381 | type dd ? |
| 387 | ends |
382 | ends |
| 388 | 383 | ||
| 389 | struct MUTEX |
384 | struct MUTEX |
| 390 | wait_list LHEAD |
385 | wait_list LHEAD |
| 391 | count dd ? |
386 | count dd ? |
| 392 | ends |
387 | ends |
| 393 | 388 | ||
| 394 | struct RWSEM |
389 | struct RWSEM |
| 395 | wait_list LHEAD |
390 | wait_list LHEAD |
| 396 | count dd ? |
391 | count dd ? |
| 397 | ends |
392 | ends |
| 398 | 393 | ||
| 399 | struct FUTEX |
394 | struct FUTEX |
| 400 | list LHEAD |
395 | list LHEAD |
| 401 | magic dd ? |
396 | magic dd ? |
| 402 | handle dd ? |
397 | handle dd ? |
| 403 | destroy dd ? |
398 | destroy dd ? |
| 404 | 399 | ||
| 405 | wait_list LHEAD |
400 | wait_list LHEAD |
| 406 | pointer dd ? |
401 | pointer dd ? |
| 407 | flags dd ? |
402 | flags dd ? |
| 408 | ends |
403 | ends |
| 409 | 404 | ||
| 410 | FUTEX_INIT = 0 |
405 | FUTEX_INIT = 0 |
| 411 | FUTEX_DESTROY = 1 |
406 | FUTEX_DESTROY = 1 |
| 412 | FUTEX_WAIT = 2 |
407 | FUTEX_WAIT = 2 |
| 413 | FUTEX_WAKE = 3 |
408 | FUTEX_WAKE = 3 |
| 414 | 409 | ||
| 415 | struct FILED |
410 | struct FILED |
| 416 | list LHEAD |
411 | list LHEAD |
| 417 | magic rd 1 |
412 | magic rd 1 |
| 418 | handle rd 1 |
413 | handle rd 1 |
| 419 | destroy rd 1 |
414 | destroy rd 1 |
| 420 | mode rd 1 |
415 | mode rd 1 |
| 421 | file rd 1 |
416 | file rd 1 |
| 422 | ends |
417 | ends |
| 423 | 418 | ||
| 424 | struct PIPE |
419 | struct PIPE |
| 425 | pipe_ops rd 1 |
420 | pipe_ops rd 1 |
| 426 | buffer rd 1 |
421 | buffer rd 1 |
| 427 | readers rd 1 |
422 | readers rd 1 |
| 428 | writers rd 1 |
423 | writers rd 1 |
| 429 | 424 | ||
| 430 | pipe_lock MUTEX |
425 | pipe_lock MUTEX |
| 431 | count rd 1 |
426 | count rd 1 |
| 432 | 427 | ||
| 433 | read_end rd 1 |
428 | read_end rd 1 |
| 434 | write_end rd 1 |
429 | write_end rd 1 |
| 435 | rlist LHEAD |
430 | rlist LHEAD |
| 436 | wlist LHEAD |
431 | wlist LHEAD |
| 437 | ends |
432 | ends |
| 438 | 433 | ||
| 439 | struct PROC |
434 | struct PROC |
| 440 | list LHEAD |
435 | list LHEAD |
| 441 | thr_list LHEAD |
436 | thr_list LHEAD |
| 442 | heap_lock MUTEX |
437 | heap_lock MUTEX |
| 443 | heap_base rd 1 |
438 | heap_base rd 1 |
| 444 | heap_top rd 1 |
439 | heap_top rd 1 |
| 445 | mem_used rd 1 |
440 | mem_used rd 1 |
| 446 | dlls_list_ptr rd 1 |
441 | dlls_list_ptr rd 1 |
| 447 | pdt_0_phys rd 1 |
442 | pdt_0_phys rd 1 |
| 448 | pdt_1_phys rd 1 |
443 | pdt_1_phys rd 1 |
| 449 | io_map_0 rd 1 |
444 | io_map_0 rd 1 |
| 450 | io_map_1 rd 1 |
445 | io_map_1 rd 1 |
| 451 | 446 | ||
| 452 | ht_lock rd 1 |
447 | ht_lock rd 1 |
| 453 | ht_free rd 1 ;htab[0] stdin |
448 | ht_free rd 1 ;htab[0] stdin |
| 454 | ht_next rd 1 ;htab[1] stdout |
449 | ht_next rd 1 ;htab[1] stdout |
| 455 | htab rd 1024-PROC.htab/4 ;htab[2] stderr |
450 | htab rd 1024-PROC.htab/4 ;htab[2] stderr |
| 456 | pdt_0 rd 1024 |
451 | pdt_0 rd 1024 |
| 457 | ends |
452 | ends |
| 458 | 453 | ||
| 459 | struct DBG_REGS |
454 | struct DBG_REGS |
| 460 | dr0 dd ? |
455 | dr0 dd ? |
| 461 | dr1 dd ? |
456 | dr1 dd ? |
| 462 | dr2 dd ? |
457 | dr2 dd ? |
| 463 | dr3 dd ? |
458 | dr3 dd ? |
| 464 | dr7 dd ? |
459 | dr7 dd ? |
| 465 | ends |
460 | ends |
| 466 | 461 | ||
| 467 | struct POINT |
462 | struct POINT |
| 468 | x dd ? |
463 | x dd ? |
| 469 | y dd ? |
464 | y dd ? |
| 470 | ends |
465 | ends |
| 471 | 466 | ||
| 472 | struct RECT |
467 | struct RECT |
| 473 | left dd ? |
468 | left dd ? |
| 474 | top dd ? |
469 | top dd ? |
| 475 | right dd ? |
470 | right dd ? |
| 476 | bottom dd ? |
471 | bottom dd ? |
| 477 | ends |
472 | ends |
| 478 | 473 | ||
| 479 | struct BOX |
474 | struct BOX |
| 480 | left dd ? |
475 | left dd ? |
| 481 | top dd ? |
476 | top dd ? |
| 482 | width dd ? |
477 | width dd ? |
| 483 | height dd ? |
478 | height dd ? |
| 484 | ends |
479 | ends |
| 485 | 480 | ||
| 486 | struct APPDATA |
481 | struct APPDATA |
| 487 | app_name rb 11 |
482 | app_name rb 11 |
| 488 | rb 5 |
483 | rb 5 |
| 489 | 484 | ||
| 490 | list LHEAD ;+16 |
485 | list LHEAD ;+16 |
| 491 | process dd ? ;+24 |
486 | process dd ? ;+24 |
| 492 | fpu_state dd ? ;+28 |
487 | fpu_state dd ? ;+28 |
| 493 | exc_handler dd ? ;+32 |
488 | exc_handler dd ? ;+32 |
| 494 | except_mask dd ? ;+36 |
489 | except_mask dd ? ;+36 |
| 495 | pl0_stack dd ? ;+40 |
490 | pl0_stack dd ? ;+40 |
| 496 | cursor dd ? ;+44 |
491 | cursor dd ? ;+44 |
| 497 | fd_ev dd ? ;+48 |
492 | fd_ev dd ? ;+48 |
| 498 | bk_ev dd ? ;+52 |
493 | bk_ev dd ? ;+52 |
| 499 | fd_obj dd ? ;+56 |
494 | fd_obj dd ? ;+56 |
| 500 | bk_obj dd ? ;+60 |
495 | bk_obj dd ? ;+60 |
| 501 | saved_esp dd ? ;+64 |
496 | saved_esp dd ? ;+64 |
| 502 | io_map rd 2 ;+68 |
497 | io_map rd 2 ;+68 |
| 503 | dbg_state dd ? ;+76 |
498 | dbg_state dd ? ;+76 |
| 504 | cur_dir dd ? ;+80 |
499 | cur_dir dd ? ;+80 |
| 505 | wait_timeout dd ? ;+84 |
500 | wait_timeout dd ? ;+84 |
| 506 | saved_esp0 dd ? ;+88 |
501 | saved_esp0 dd ? ;+88 |
| 507 | wait_begin dd ? ;+92 +++ |
502 | wait_begin dd ? ;+92 +++ |
| 508 | wait_test dd ? ;+96 +++ |
503 | wait_test dd ? ;+96 +++ |
| 509 | wait_param dd ? ;+100 +++ |
504 | wait_param dd ? ;+100 +++ |
| 510 | tls_base dd ? ;+104 |
505 | tls_base dd ? ;+104 |
| 511 | dd ? ;+108 |
506 | dd ? ;+108 |
| 512 | event_filter dd ? ;+112 |
507 | event_filter dd ? ;+112 |
| 513 | draw_bgr_x dd ? ;+116 |
508 | draw_bgr_x dd ? ;+116 |
| 514 | draw_bgr_y dd ? ;+120 |
509 | draw_bgr_y dd ? ;+120 |
| 515 | dd ? ;+124 |
510 | dd ? ;+124 |
| 516 | wnd_shape dd ? ;+128 |
511 | wnd_shape dd ? ;+128 |
| 517 | wnd_shape_scale dd ? ;+132 |
512 | wnd_shape_scale dd ? ;+132 |
| 518 | dd ? ;+136 |
513 | dd ? ;+136 |
| 519 | dd ? ;+140 |
514 | dd ? ;+140 |
| 520 | saved_box BOX ;+144 |
515 | saved_box BOX ;+144 |
| 521 | ipc_start dd ? ;+160 |
516 | ipc_start dd ? ;+160 |
| 522 | ipc_size dd ? ;+164 |
517 | ipc_size dd ? ;+164 |
| 523 | event_mask dd ? ;+168 |
518 | event_mask dd ? ;+168 |
| 524 | debugger_slot dd ? ;+172 |
519 | debugger_slot dd ? ;+172 |
| 525 | terminate_protection dd ? ;+176 |
520 | terminate_protection dd ? ;+176 |
| 526 | keyboard_mode db ? ;+180 |
521 | keyboard_mode db ? ;+180 |
| 527 | captionEncoding db ? |
522 | captionEncoding db ? |
| 528 | rb 2 |
523 | rb 2 |
| 529 | exec_params dd ? ;+184 |
524 | exec_params dd ? ;+184 |
| 530 | dbg_event_mem dd ? ;+188 |
525 | dbg_event_mem dd ? ;+188 |
| 531 | dbg_regs DBG_REGS ;+192 |
526 | dbg_regs DBG_REGS ;+192 |
| 532 | wnd_caption dd ? ;+212 |
527 | wnd_caption dd ? ;+212 |
| 533 | wnd_clientbox BOX ;+216 |
528 | wnd_clientbox BOX ;+216 |
| 534 | priority dd ? ;+232 |
529 | priority dd ? ;+232 |
| 535 | in_schedule LHEAD ;+236 |
530 | in_schedule LHEAD ;+236 |
| 536 | rd 3 ;+244 |
531 | rd 3 ;+244 |
| 537 | ends |
532 | ends |
| 538 | 533 | ||
| 539 | assert sizeof.APPDATA = 256 |
534 | assert sizeof.APPDATA = 256 |
| 540 | 535 | ||
| 541 | APP_OBJ_OFFSET = 48 |
536 | APP_OBJ_OFFSET = 48 |
| 542 | APP_EV_OFFSET = 40 |
537 | APP_EV_OFFSET = 40 |
| 543 | 538 | ||
| 544 | struct TASKDATA |
539 | struct TASKDATA |
| 545 | event_mask dd ? |
540 | event_mask dd ? |
| 546 | pid dd ? |
541 | pid dd ? |
| 547 | dw ? |
542 | dw ? |
| 548 | state db ? |
543 | state db ? |
| 549 | db ? |
544 | db ? |
| 550 | dw ? |
545 | dw ? |
| 551 | wnd_number db ? |
546 | wnd_number db ? |
| 552 | db ? |
547 | db ? |
| 553 | mem_start dd ? |
548 | mem_start dd ? |
| 554 | counter_sum dd ? |
549 | counter_sum dd ? |
| 555 | counter_add dd ? |
550 | counter_add dd ? |
| 556 | cpu_usage dd ? |
551 | cpu_usage dd ? |
| 557 | ends |
552 | ends |
| 558 | 553 | ||
| 559 | TSTATE_RUNNING = 0 |
554 | TSTATE_RUNNING = 0 |
| 560 | TSTATE_RUN_SUSPENDED = 1 |
555 | TSTATE_RUN_SUSPENDED = 1 |
| 561 | TSTATE_WAIT_SUSPENDED = 2 |
556 | TSTATE_WAIT_SUSPENDED = 2 |
| 562 | TSTATE_ZOMBIE = 3 |
557 | TSTATE_ZOMBIE = 3 |
| 563 | TSTATE_TERMINATING = 4 |
558 | TSTATE_TERMINATING = 4 |
| 564 | TSTATE_WAITING = 5 |
559 | TSTATE_WAITING = 5 |
| 565 | TSTATE_FREE = 9 |
560 | TSTATE_FREE = 9 |
| 566 | 561 | ||
| 567 | ; constants definition |
562 | ; constants definition |
| 568 | WSTATE_NORMAL = 00000000b |
563 | WSTATE_NORMAL = 00000000b |
| 569 | WSTATE_MAXIMIZED = 00000001b |
564 | WSTATE_MAXIMIZED = 00000001b |
| 570 | WSTATE_MINIMIZED = 00000010b |
565 | WSTATE_MINIMIZED = 00000010b |
| 571 | WSTATE_ROLLEDUP = 00000100b |
566 | WSTATE_ROLLEDUP = 00000100b |
| 572 | 567 | ||
| 573 | WSTATE_REDRAW = 00000001b |
568 | WSTATE_REDRAW = 00000001b |
| 574 | WSTATE_WNDDRAWN = 00000010b |
569 | WSTATE_WNDDRAWN = 00000010b |
| 575 | 570 | ||
| 576 | WSTYLE_HASCAPTION = 00010000b |
571 | WSTYLE_HASCAPTION = 00010000b |
| 577 | WSTYLE_CLIENTRELATIVE = 00100000b |
572 | WSTYLE_CLIENTRELATIVE = 00100000b |
| 578 | 573 | ||
| 579 | ZPOS_DESKTOP = -2 |
574 | ZPOS_DESKTOP = -2 |
| 580 | ZPOS_ALWAYS_BACK = -1 |
575 | ZPOS_ALWAYS_BACK = -1 |
| 581 | ZPOS_NORMAL = 0 |
576 | ZPOS_NORMAL = 0 |
| 582 | ZPOS_ALWAYS_TOP = 1 ;ZPOS_ALWAYS_TOP is always last and has max number! |
577 | ZPOS_ALWAYS_TOP = 1 ;ZPOS_ALWAYS_TOP is always last and has max number! |
| 583 | ; structures definition |
578 | ; structures definition |
| 584 | struct WDATA |
579 | struct WDATA |
| 585 | box BOX |
580 | box BOX |
| 586 | cl_workarea dd ? |
581 | cl_workarea dd ? |
| 587 | cl_titlebar dd ? |
582 | cl_titlebar dd ? |
| 588 | cl_frames dd ? |
583 | cl_frames dd ? |
| 589 | z_modif db ? |
584 | z_modif db ? |
| 590 | fl_wstate db ? |
585 | fl_wstate db ? |
| 591 | fl_wdrawn db ? |
586 | fl_wdrawn db ? |
| 592 | fl_redraw db ? |
587 | fl_redraw db ? |
| 593 | ends |
588 | ends |
| 594 | 589 | ||
| 595 | label WDATA.fl_wstyle byte at WDATA.cl_workarea + 3 |
590 | label WDATA.fl_wstyle byte at WDATA.cl_workarea + 3 |
| 596 | 591 | ||
| 597 | 592 | ||
| 598 | struct SYS_VARS |
593 | struct SYS_VARS |
| 599 | bpp dd ? |
594 | bpp dd ? |
| 600 | scanline dd ? |
595 | scanline dd ? |
| 601 | vesa_mode dd ? |
596 | vesa_mode dd ? |
| 602 | x_res dd ? |
597 | x_res dd ? |
| 603 | y_res dd ? |
598 | y_res dd ? |
| 604 | ends |
599 | ends |
| 605 | 600 | ||
| 606 | struct APPOBJ ; common object header |
601 | struct APPOBJ ; common object header |
| 607 | magic dd ? ; |
602 | magic dd ? ; |
| 608 | destroy dd ? ; internal destructor |
603 | destroy dd ? ; internal destructor |
| 609 | fd dd ? ; next object in list |
604 | fd dd ? ; next object in list |
| 610 | bk dd ? ; prev object in list |
605 | bk dd ? ; prev object in list |
| 611 | pid dd ? ; owner id |
606 | pid dd ? ; owner id |
| 612 | ends |
607 | ends |
| 613 | 608 | ||
| 614 | struct CURSOR APPOBJ |
609 | struct CURSOR APPOBJ |
| 615 | base dd ? ;allocated memory |
610 | base dd ? ;allocated memory |
| 616 | hot_x dd ? ;hotspot coords |
611 | hot_x dd ? ;hotspot coords |
| 617 | hot_y dd ? |
612 | hot_y dd ? |
| 618 | 613 | ||
| 619 | list_next dd ? ;next cursor in cursor list |
614 | list_next dd ? ;next cursor in cursor list |
| 620 | list_prev dd ? ;prev cursor in cursor list |
615 | list_prev dd ? ;prev cursor in cursor list |
| 621 | dev_obj dd ? ;device depended data |
616 | dev_obj dd ? ;device depended data |
| 622 | ends |
617 | ends |
| 623 | 618 | ||
| 624 | 619 | ||
| 625 | struct EVENT APPOBJ |
620 | struct EVENT APPOBJ |
| 626 | id dd ? ;event uid |
621 | id dd ? ;event uid |
| 627 | state dd ? ;internal flags |
622 | state dd ? ;internal flags |
| 628 | code dd ? |
623 | code dd ? |
| 629 | rd 5 |
624 | rd 5 |
| 630 | ends |
625 | ends |
| 631 | 626 | ||
| 632 | 627 | ||
| 633 | struct SMEM |
628 | struct SMEM |
| 634 | bk dd ? |
629 | bk dd ? |
| 635 | fd dd ? ;+4 |
630 | fd dd ? ;+4 |
| 636 | base dd ? ;+8 |
631 | base dd ? ;+8 |
| 637 | size dd ? ;+12 |
632 | size dd ? ;+12 |
| 638 | access dd ? ;+16 |
633 | access dd ? ;+16 |
| 639 | refcount dd ? ;+20 |
634 | refcount dd ? ;+20 |
| 640 | name rb 32 ;+24 |
635 | name rb 32 ;+24 |
| 641 | ends |
636 | ends |
| 642 | 637 | ||
| 643 | struct SMAP APPOBJ |
638 | struct SMAP APPOBJ |
| 644 | base dd ? ;mapped base |
639 | base dd ? ;mapped base |
| 645 | parent dd ? ;SMEM |
640 | parent dd ? ;SMEM |
| 646 | ends |
641 | ends |
| 647 | 642 | ||
| 648 | struct DLLDESCR |
643 | struct DLLDESCR |
| 649 | bk dd ? |
644 | bk dd ? |
| 650 | fd dd ? ;+4 |
645 | fd dd ? ;+4 |
| 651 | data dd ? ;+8 |
646 | data dd ? ;+8 |
| 652 | size dd ? ;+12 |
647 | size dd ? ;+12 |
| 653 | timestamp dq ? |
648 | timestamp dq ? |
| 654 | refcount dd ? |
649 | refcount dd ? |
| 655 | defaultbase dd ? |
650 | defaultbase dd ? |
| 656 | coff_hdr dd ? |
651 | coff_hdr dd ? |
| 657 | symbols_ptr dd ? |
652 | symbols_ptr dd ? |
| 658 | symbols_num dd ? |
653 | symbols_num dd ? |
| 659 | symbols_lim dd ? |
654 | symbols_lim dd ? |
| 660 | exports dd ? ;export table |
655 | exports dd ? ;export table |
| 661 | name rb 260 |
656 | name rb 260 |
| 662 | ends |
657 | ends |
| 663 | 658 | ||
| 664 | struct HDLL |
659 | struct HDLL |
| 665 | fd dd ? ;next object in list |
660 | fd dd ? ;next object in list |
| 666 | bk dd ? ;prev object in list |
661 | bk dd ? ;prev object in list |
| 667 | pid dd ? ;owner id |
662 | pid dd ? ;owner id |
| 668 | 663 | ||
| 669 | base dd ? ;mapped base |
664 | base dd ? ;mapped base |
| 670 | size dd ? ;mapped size |
665 | size dd ? ;mapped size |
| 671 | refcount dd ? ;reference counter for this process and this lib |
666 | refcount dd ? ;reference counter for this process and this lib |
| 672 | parent dd ? ;DLLDESCR |
667 | parent dd ? ;DLLDESCR |
| 673 | ends |
668 | ends |
| 674 | 669 | ||
| 675 | struct DQ |
670 | struct DQ |
| 676 | lo dd ? |
671 | lo dd ? |
| 677 | hi dd ? |
672 | hi dd ? |
| 678 | ends |
673 | ends |
| 679 | 674 | ||
| 680 | struct e820entry |
675 | struct e820entry |
| 681 | addr DQ ? |
676 | addr DQ ? |
| 682 | size DQ ? |
677 | size DQ ? |
| 683 | type dd ? |
678 | type dd ? |
| 684 | ends |
679 | ends |
| 685 | 680 | ||
| 686 | RD_LOAD_FROM_FLOPPY = 1 |
681 | RD_LOAD_FROM_FLOPPY = 1 |
| 687 | RD_LOAD_FROM_HD = 2 |
682 | RD_LOAD_FROM_HD = 2 |
| 688 | RD_LOAD_FROM_MEMORY = 3 |
683 | RD_LOAD_FROM_MEMORY = 3 |
| 689 | RD_LOAD_FROM_FORMAT = 4 |
684 | RD_LOAD_FROM_FORMAT = 4 |
| 690 | RD_LOAD_FROM_NONE = 5 |
685 | RD_LOAD_FROM_NONE = 5 |
| 691 | 686 | ||
| 692 | struct boot_data |
687 | struct boot_data |
| 693 | bpp db ? ; bits per pixel |
688 | bpp db ? ; bits per pixel |
| 694 | pitch dw ? ; scanline length |
689 | pitch dw ? ; scanline length |
| 695 | db ? |
690 | db ? |
| 696 | dd ? |
691 | dd ? |
| 697 | vesa_mode dw ? |
692 | vesa_mode dw ? |
| 698 | x_res dw ? |
693 | x_res dw ? |
| 699 | y_res dw ? |
694 | y_res dw ? |
| 700 | dw ? |
695 | dw ? |
| 701 | dd ? |
696 | dd ? |
| 702 | bank_switch dd ? ; Vesa 1.2 pm bank switch |
697 | bank_switch dd ? ; Vesa 1.2 pm bank switch |
| 703 | lfb dd ? ; Vesa 2.0 LFB address |
698 | lfb dd ? ; Vesa 2.0 LFB address |
| 704 | mtrr db ? ; 0 or 1: enable MTRR graphics acceleration |
699 | mtrr db ? ; 0 or 1: enable MTRR graphics acceleration |
| 705 | launcher_start db ? ; 0 or 1: start the first app (right now it's LAUNCHER) after kernel is loaded |
700 | launcher_start db ? ; 0 or 1: start the first app (right now it's |
| - | 701 | ; LAUNCHER) after kernel is loaded |
|
| 706 | debug_print db ? ; if nonzero, duplicates debug output to the screen |
702 | debug_print db ? ; if nonzero, duplicates debug output to the screen |
| 707 | dma db ? ; DMA write: 1=yes, 2=no |
703 | dma db ? ; DMA write: 1=yes, 2=no |
| 708 | pci_data rb 8 |
704 | pci_data rb 8 |
| 709 | rb 8 |
705 | rb 8 |
| 710 | shutdown_type db ? ; see sysfn 18.9 |
706 | shutdown_type db ? ; see sysfn 18.9 |
| 711 | rb 15 |
707 | rb 15 |
| 712 | apm_entry dd ? ; entry point of APM BIOS |
708 | apm_entry dd ? ; entry point of APM BIOS |
| 713 | apm_version dw ? ; BCD |
709 | apm_version dw ? ; BCD |
| 714 | apm_flags dw ? |
710 | apm_flags dw ? |
| 715 | rb 8 |
711 | rb 8 |
| 716 | apm_code_32 dw ? |
712 | apm_code_32 dw ? |
| 717 | apm_code_16 dw ? |
713 | apm_code_16 dw ? |
| 718 | apm_data_16 dw ? |
714 | apm_data_16 dw ? |
| 719 | rd_load_from db ? ; Device to load ramdisk from, RD_LOAD_FROM_* |
715 | rd_load_from db ? ; Device to load ramdisk from, RD_LOAD_FROM_* |
| 720 | db ? |
716 | db ? |
| 721 | kernel_restart dw ? |
717 | kernel_restart dw ? |
| 722 | sys_disk dw ? ; Device to mount on /sys/, see loader_doc.txt for details |
718 | sys_disk dw ? ; Device to mount on /sys/, see loader_doc.txt for details |
| 723 | acpi_rsdp dd ? |
719 | acpi_rsdp dd ? |
| 724 | syspath rb 0x17 |
720 | syspath rb 0x17 |
| 725 | devicesdat_data dd ? |
721 | devicesdat_data dd ? |
| 726 | devicesdat_size dd ? |
722 | devicesdat_size dd ? |
| 727 | bios_hd_cnt db ? ; number of BIOS hard disks |
723 | bios_hd_cnt db ? ; number of BIOS hard disks |
| 728 | bios_hd rb 0x80 ; BIOS hard disks |
724 | bios_hd rb 0x80 ; BIOS hard disks |
| 729 | memmap_block_cnt dd ? ; available physical memory map: number of blocks |
725 | memmap_block_cnt dd ? ; available physical memory map: number of blocks |
| 730 | memmap_blocks e820entry |
726 | memmap_blocks e820entry |
| 731 | rb sizeof.e820entry * (MAX_MEMMAP_BLOCKS - 1) |
727 | rb sizeof.e820entry * (MAX_MEMMAP_BLOCKS - 1) |
| 732 | ends |
728 | ends |
| 733 | 729 | ||
| 734 | virtual at BOOT_VARS |
730 | virtual at BOOT_VARS |
| 735 | BOOT_LO boot_data |
731 | BOOT_LO boot_data |
| 736 | end virtual |
732 | end virtual |
| 737 | virtual at OS_BASE + BOOT_VARS |
733 | virtual at OS_BASE + BOOT_VARS |
| 738 | BOOT boot_data |
734 | BOOT boot_data |
| 739 | end virtual |
735 | end virtual |
| 740 | 736 | ||
| 741 | MAX_SCREEN_WIDTH = 3840 |
737 | MAX_SCREEN_WIDTH = 3840 |
| 742 | MAX_SCREEN_HEIGHT = 2160 |
738 | MAX_SCREEN_HEIGHT = 2160 |
| 743 | 739 | ||
| 744 | struct display_t |
740 | struct display_t |
| 745 | x dd ? |
741 | x dd ? |
| 746 | y dd ? |
742 | y dd ? |
| 747 | width dd ? |
743 | width dd ? |
| 748 | height dd ? |
744 | height dd ? |
| 749 | bits_per_pixel dd ? |
745 | bits_per_pixel dd ? |
| 750 | vrefresh dd ? |
746 | vrefresh dd ? |
| 751 | current_lfb dd ? |
747 | current_lfb dd ? |
| 752 | lfb_pitch dd ? |
748 | lfb_pitch dd ? |
| 753 | 749 | ||
| 754 | win_map_lock RWSEM |
750 | win_map_lock RWSEM |
| 755 | win_map dd ? |
751 | win_map dd ? |
| 756 | win_map_pitch dd ? |
752 | win_map_pitch dd ? |
| 757 | win_map_size dd ? |
753 | win_map_size dd ? |
| 758 | 754 | ||
| 759 | modes dd ? |
755 | modes dd ? |
| 760 | ddev dd ? |
756 | ddev dd ? |
| 761 | connector dd ? |
757 | connector dd ? |
| 762 | crtc dd ? |
758 | crtc dd ? |
| 763 | 759 | ||
| 764 | cr_list.next dd ? |
760 | cr_list.next dd ? |
| 765 | cr_list.prev dd ? |
761 | cr_list.prev dd ? |
| 766 | 762 | ||
| 767 | cursor dd ? |
763 | cursor dd ? |
| 768 | 764 | ||
| 769 | init_cursor dd ? |
765 | init_cursor dd ? |
| 770 | select_cursor dd ? |
766 | select_cursor dd ? |
| 771 | show_cursor dd ? |
767 | show_cursor dd ? |
| 772 | move_cursor dd ? |
768 | move_cursor dd ? |
| 773 | restore_cursor dd ? |
769 | restore_cursor dd ? |
| 774 | disable_mouse dd ? |
770 | disable_mouse dd ? |
| 775 | mask_seqno dd ? |
771 | mask_seqno dd ? |
| 776 | check_mouse dd ? |
772 | check_mouse dd ? |
| 777 | check_m_pixel dd ? |
773 | check_m_pixel dd ? |
| 778 | 774 | ||
| 779 | bytes_per_pixel dd ? |
775 | bytes_per_pixel dd ? |
| 780 | ends |
776 | ends |
| 781 | 777 | ||
| 782 | struct DISPMODE |
778 | struct DISPMODE |
| 783 | width dw ? |
779 | width dw ? |
| 784 | height dw ? |
780 | height dw ? |
| 785 | bpp dw ? |
781 | bpp dw ? |
| 786 | freq dw ? |
782 | freq dw ? |
| 787 | ends |
783 | ends |
| 788 | 784 | ||
| 789 | 785 | ||
| 790 | struct PCIDEV |
786 | struct PCIDEV |
| 791 | bk dd ? |
787 | bk dd ? |
| 792 | fd dd ? |
788 | fd dd ? |
| 793 | vendor_device_id dd ? |
789 | vendor_device_id dd ? |
| 794 | class dd ? |
790 | class dd ? |
| 795 | devfn db ? |
791 | devfn db ? |
| 796 | bus db ? |
792 | bus db ? |
| 797 | rb 2 |
793 | rb 2 |
| 798 | owner dd ? ; pointer to SRV or 0 |
794 | owner dd ? ; pointer to SRV or 0 |
| 799 | ends |
795 | ends |
| 800 | 796 | ||
| 801 | struct IDE_DATA |
797 | struct IDE_DATA |
| 802 | ProgrammingInterface dd ? |
798 | ProgrammingInterface dd ? |
| 803 | Interrupt dw ? |
799 | Interrupt dw ? |
| 804 | RegsBaseAddres dw ? |
800 | RegsBaseAddres dw ? |
| 805 | BAR0_val dw ? |
801 | BAR0_val dw ? |
| 806 | BAR1_val dw ? |
802 | BAR1_val dw ? |
| 807 | BAR2_val dw ? |
803 | BAR2_val dw ? |
| 808 | BAR3_val dw ? |
804 | BAR3_val dw ? |
| 809 | dma_hdd_channel_1 db ? |
805 | dma_hdd_channel_1 db ? |
| 810 | dma_hdd_channel_2 db ? |
806 | dma_hdd_channel_2 db ? |
| 811 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
807 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
| 812 | ends |
808 | ends |
| 813 | 809 | ||
| 814 | struct IDE_CACHE |
810 | struct IDE_CACHE |
| 815 | pointer dd ? |
811 | pointer dd ? |
| 816 | size dd ? ; not use |
812 | size dd ? ; not use |
| 817 | data_pointer dd ? |
813 | data_pointer dd ? |
| 818 | system_data_size dd ? ; not use |
814 | system_data_size dd ? ; not use |
| 819 | appl_data_size dd ? ; not use |
815 | appl_data_size dd ? ; not use |
| 820 | system_data dd ? |
816 | system_data dd ? |
| 821 | appl_data dd ? |
817 | appl_data dd ? |
| 822 | system_sad_size dd ? |
818 | system_sad_size dd ? |
| 823 | appl_sad_size dd ? |
819 | appl_sad_size dd ? |
| 824 | search_start dd ? |
820 | search_start dd ? |
| 825 | appl_search_start dd ? |
821 | appl_search_start dd ? |
| 826 | ends |
822 | ends |
| 827 | 823 | ||
| 828 | struct IDE_DEVICE |
824 | struct IDE_DEVICE |
| 829 | UDMA_possible_modes db ? |
825 | UDMA_possible_modes db ? |
| 830 | UDMA_set_mode db ? |
826 | UDMA_set_mode db ? |
| 831 | ends |
827 | ends |
| 832 | 828 | ||
| 833 | ; The following macro assume that we are on uniprocessor machine. |
829 | ; The following macro assume that we are on uniprocessor machine. |
| 834 | ; Serious work is needed for multiprocessor machines. |
830 | ; Serious work is needed for multiprocessor machines. |
| 835 | macro spin_lock_irqsave spinlock |
831 | macro spin_lock_irqsave spinlock |
| 836 | { |
832 | { |
| 837 | pushf |
833 | pushf |
| 838 | cli |
834 | cli |
| 839 | } |
835 | } |
| 840 | macro spin_unlock_irqrestore spinlock |
836 | macro spin_unlock_irqrestore spinlock |
| 841 | { |
837 | { |
| 842 | popf |
838 | popf |
| 843 | } |
839 | } |
| 844 | macro spin_lock_irq spinlock |
840 | macro spin_lock_irq spinlock |
| 845 | { |
841 | { |
| 846 | cli |
842 | cli |
| 847 | } |
843 | } |
| 848 | macro spin_unlock_irq spinlock |
844 | macro spin_unlock_irq spinlock |
| 849 | { |
845 | { |
| 850 | sti |
846 | sti |
| 851 | } |
847 | } |
| 852 | 848 | ||
| 853 | struct MEM_STATE |
849 | struct MEM_STATE |
| 854 | mutex MUTEX |
850 | mutex MUTEX |
| 855 | smallmap dd ? |
851 | smallmap dd ? |
| 856 | treemap dd ? |
852 | treemap dd ? |
| 857 | topsize dd ? |
853 | topsize dd ? |
| 858 | top dd ? |
854 | top dd ? |
| 859 | smallbins rd 4*32 |
855 | smallbins rd 4*32 |
| 860 | treebins rd 32 |
856 | treebins rd 32 |
| 861 | ends |
857 | ends |
| 862 | 858 | ||
| 863 | struct PG_DATA |
859 | struct PG_DATA |
| 864 | mem_amount dd ? |
860 | mem_amount dd ? |
| 865 | vesa_mem dd ? |
861 | vesa_mem dd ? |
| 866 | pages_count dd ? |
862 | pages_count dd ? |
| 867 | pages_free dd ? |
863 | pages_free dd ? |
| 868 | pages_faults dd ? |
864 | pages_faults dd ? |
| 869 | pagemap_size dd ? |
865 | pagemap_size dd ? |
| 870 | kernel_pages dd ? |
866 | kernel_pages dd ? |
| 871 | kernel_tables dd ? |
867 | kernel_tables dd ? |
| 872 | sys_page_dir dd ? |
868 | sys_page_dir dd ? |
| 873 | mutex MUTEX |
869 | mutex MUTEX |
| 874 | ends |
870 | ends |
| 875 | 871 | ||
| 876 | struct SRV |
872 | struct SRV |
| 877 | srv_name rb 16 ;ASCIIZ string |
873 | srv_name rb 16 ;ASCIIZ string |
| 878 | magic dd ? ;+0x10 ;'SRV ' |
874 | magic dd ? ;+0x10 ;'SRV ' |
| 879 | size dd ? ;+0x14 ;size of structure SRV |
875 | size dd ? ;+0x14 ;size of structure SRV |
| 880 | fd dd ? ;+0x18 ;next SRV descriptor |
876 | fd dd ? ;+0x18 ;next SRV descriptor |
| 881 | bk dd ? ;+0x1C ;prev SRV descriptor |
877 | bk dd ? ;+0x1C ;prev SRV descriptor |
| 882 | base dd ? ;+0x20 ;service base address |
878 | base dd ? ;+0x20 ;service base address |
| 883 | entry dd ? ;+0x24 ;service START function |
879 | entry dd ? ;+0x24 ;service START function |
| 884 | srv_proc dd ? ;+0x28 ;user mode service handler |
880 | srv_proc dd ? ;+0x28 ;user mode service handler |
| 885 | srv_proc_ex dd ? ;+0x2C ;kernel mode service handler |
881 | srv_proc_ex dd ? ;+0x2C ;kernel mode service handler |
| 886 | ends |
882 | ends |
| 887 | 883 | ||
| 888 | struct USBSRV |
884 | struct USBSRV |
| 889 | srv SRV |
885 | srv SRV |
| 890 | usb_func dd ? |
886 | usb_func dd ? |
| 891 | ends |
887 | ends |
| 892 | 888 | ||
| 893 | struct USBFUNC |
889 | struct USBFUNC |
| 894 | strucsize dd ? |
890 | strucsize dd ? |
| 895 | add_device dd ? |
891 | add_device dd ? |
| 896 | device_disconnect dd ? |
892 | device_disconnect dd ? |
| 897 | ends |
893 | ends |
| 898 | 894 | ||
| 899 | DRV_ENTRY = 1 |
895 | DRV_ENTRY = 1 |
| 900 | DRV_EXIT = -1 |
896 | DRV_EXIT = -1 |
| 901 | 897 | ||
| 902 | struct COFF_HEADER |
898 | struct COFF_HEADER |
| 903 | machine dw ? |
899 | machine dw ? |
| 904 | nSections dw ? |
900 | nSections dw ? |
| 905 | DataTime dd ? |
901 | DataTime dd ? |
| 906 | pSymTable dd ? |
902 | pSymTable dd ? |
| 907 | nSymbols dd ? |
903 | nSymbols dd ? |
| 908 | optHeader dw ? |
904 | optHeader dw ? |
| 909 | flags dw ? |
905 | flags dw ? |
| 910 | ends |
906 | ends |
| 911 | 907 | ||
| 912 | struct COFF_SECTION |
908 | struct COFF_SECTION |
| 913 | Name rb 8 |
909 | Name rb 8 |
| 914 | VirtualSize dd ? |
910 | VirtualSize dd ? |
| 915 | VirtualAddress dd ? |
911 | VirtualAddress dd ? |
| 916 | SizeOfRawData dd ? |
912 | SizeOfRawData dd ? |
| 917 | PtrRawData dd ? |
913 | PtrRawData dd ? |
| 918 | PtrReloc dd ? |
914 | PtrReloc dd ? |
| 919 | PtrLinenumbers dd ? |
915 | PtrLinenumbers dd ? |
| 920 | NumReloc dw ? |
916 | NumReloc dw ? |
| 921 | NumLinenum dw ? |
917 | NumLinenum dw ? |
| 922 | Characteristics dd ? |
918 | Characteristics dd ? |
| 923 | ends |
919 | ends |
| 924 | 920 | ||
| 925 | struct COFF_RELOC |
921 | struct COFF_RELOC |
| 926 | VirtualAddress dd ? |
922 | VirtualAddress dd ? |
| 927 | SymIndex dd ? |
923 | SymIndex dd ? |
| 928 | Type dw ? |
924 | Type dw ? |
| 929 | ends |
925 | ends |
| 930 | 926 | ||
| 931 | struct COFF_SYM |
927 | struct COFF_SYM |
| 932 | Name rb 8 |
928 | Name rb 8 |
| 933 | Value dd ? |
929 | Value dd ? |
| 934 | SectionNumber dw ? |
930 | SectionNumber dw ? |
| 935 | Type dw ? |
931 | Type dw ? |
| 936 | StorageClass db ? |
932 | StorageClass db ? |
| 937 | NumAuxSymbols db ? |
933 | NumAuxSymbols db ? |
| 938 | ends |
934 | ends |
| 939 | 935 | ||
| 940 | struct STRIPPED_PE_HEADER |
936 | struct STRIPPED_PE_HEADER |
| 941 | Signature dw ? |
937 | Signature dw ? |
| 942 | Characteristics dw ? |
938 | Characteristics dw ? |
| 943 | AddressOfEntryPoint dd ? |
939 | AddressOfEntryPoint dd ? |
| 944 | ImageBase dd ? |
940 | ImageBase dd ? |
| 945 | SectionAlignmentLog db ? |
941 | SectionAlignmentLog db ? |
| 946 | FileAlignmentLog db ? |
942 | FileAlignmentLog db ? |
| 947 | MajorOSVersion db ? |
943 | MajorOSVersion db ? |
| 948 | MinorOSVersion db ? |
944 | MinorOSVersion db ? |
| 949 | SizeOfImage dd ? |
945 | SizeOfImage dd ? |
| 950 | SizeOfStackReserve dd ? |
946 | SizeOfStackReserve dd ? |
| 951 | SizeOfHeapReserve dd ? |
947 | SizeOfHeapReserve dd ? |
| 952 | SizeOfHeaders dd ? |
948 | SizeOfHeaders dd ? |
| 953 | Subsystem db ? |
949 | Subsystem db ? |
| 954 | NumberOfRvaAndSizes db ? |
950 | NumberOfRvaAndSizes db ? |
| 955 | NumberOfSections dw ? |
951 | NumberOfSections dw ? |
| 956 | ends |
952 | ends |
| 957 | STRIPPED_PE_SIGNATURE = 0x4503 ; 'PE' xor 'S' |
953 | STRIPPED_PE_SIGNATURE = 0x4503 ; 'PE' xor 'S' |
| 958 | SPE_DIRECTORY_IMPORT = 0 |
954 | SPE_DIRECTORY_IMPORT = 0 |
| 959 | SPE_DIRECTORY_EXPORT = 1 |
955 | SPE_DIRECTORY_EXPORT = 1 |
| 960 | SPE_DIRECTORY_BASERELOC = 2 |
956 | SPE_DIRECTORY_BASERELOC = 2 |
| 961 | 957 | ||
| 962 | struct IOCTL |
958 | struct IOCTL |
| 963 | handle dd ? |
959 | handle dd ? |
| 964 | io_code dd ? |
960 | io_code dd ? |
| 965 | input dd ? |
961 | input dd ? |
| 966 | inp_size dd ? |
962 | inp_size dd ? |
| 967 | output dd ? |
963 | output dd ? |
| 968 | out_size dd ? |
964 | out_size dd ? |
| 969 | ends |
965 | ends |
| 970 | 966 | ||
| 971 | struct IRQH |
967 | struct IRQH |
| 972 | list LHEAD |
968 | list LHEAD |
| 973 | handler dd ? ;handler roututine |
969 | handler dd ? ;handler roututine |
| 974 | data dd ? ;user-specific data |
970 | data dd ? ;user-specific data |
| 975 | num_ints dd ? ;how many times handled |
971 | num_ints dd ? ;how many times handled |
| 976 | ends |
972 | ends |
| 977 | 973 | ||
| 978 | MAX_MEMMAP_BLOCKS> |
974 | MAX_MEMMAP_BLOCKS> |
| 979 | 975 | ||
| 980 | MAX_MEMMAP_BLOCKS> |
976 | MAX_MEMMAP_BLOCKS> |
| 981 | 977 | ||
| 982 | MAX_MEMMAP_BLOCKS> |
978 | MAX_MEMMAP_BLOCKS> |
| 983 | 979 | ||
| 984 | MAX_MEMMAP_BLOCKS> |
980 | MAX_MEMMAP_BLOCKS> |
| 985 | 981 | ||
| 986 | MAX_MEMMAP_BLOCKS> |
982 | MAX_MEMMAP_BLOCKS> |
| 987 | 983 | ||
| 988 | MAX_MEMMAP_BLOCKS> |
984 | MAX_MEMMAP_BLOCKS> |