WebSVN – Kolibri OS – Diff – /kernel/trunk/bus/pci/pci32.inc


 
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
;;                                                              ;;
;;  PCI32.INC                                                   ;;
;;                                                              ;;
;;  32 bit PCI driver code                                      ;;
;;                                                              ;;
;;  Version 0.3  April 9, 2007                                  ;;
;;  Version 0.2  December 21st, 2002                            ;;
;;                                                              ;;
;;  Author: Victor Prodan, victorprodan@yahoo.com               ;;
;;          Mihailov Ilia, ghost.nsk@gmail.com                  ;;
;;    Credits:                                                  ;;
;;          Ralf Brown                                          ;;
;;          Mike Hibbett, mikeh@oceanfree.net                   ;;
;;                                                              ;;
;;  See file COPYING for details                                ;;
;;                                                              ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
$Revision: 593 $
 
 
;***************************************************************************
;   Function
;      pci_api:
;
;   Description
;       entry point for system PCI calls
;***************************************************************************
 
align 4
 
pci_api:
 
        cmp  [pci_access_enabled],1
        jne  no_pci_access_for_applications
 
        or al,al
        jnz pci_fn_1
        ; PCI function 0: get pci version (AH.AL)
        movzx eax,word [BOOT_VAR+0x9022]
        ret
 
pci_fn_1:
        cmp al,1
        jnz pci_fn_2
 
        ; PCI function 1: get last bus in AL
        mov al,[BOOT_VAR+0x9021]
        ret
 
pci_fn_2:
        cmp al,2
        jne pci_fn_3
        ; PCI function 2: get pci access mechanism
        mov al,[BOOT_VAR+0x9020]
        ret
pci_fn_3:
 
        cmp al,4
        jz pci_read_reg   ;byte
        cmp al,5
        jz pci_read_reg   ;word
        cmp al,6
        jz pci_read_reg   ;dword
 
        cmp al,8
        jz pci_write_reg  ;byte
        cmp al,9
        jz pci_write_reg  ;word
        cmp al,10
        jz pci_write_reg  ;dword
 
      no_pci_access_for_applications:
 
        mov eax,-1
 
        ret
 
;***************************************************************************
;   Function
;      pci_make_config_cmd
;
;   Description
;       creates a command dword  for use with the PCI bus
;       bus # in ah
;       device+func in bh (dddddfff)
;       register in bl
;
;      command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
;***************************************************************************
 
align 4
 
pci_make_config_cmd:
    shl     eax,8          ; move bus to bits 16-23
    mov     ax,bx          ; combine all
    and     eax,0xffffff
    or      eax,0x80000000
    ret
 
;***************************************************************************
;   Function
;      pci_read_reg:
;
;   Description
;       read a register from the PCI config space into EAX/AX/AL
;       IN: ah=bus,device+func=bh,register address=bl
;           number of bytes to read (1,2,4) coded into AL, bits 0-1
;           (0 - byte, 1 - word, 2 - dword)
;***************************************************************************
 
align 4
 
pci_read_reg:
        cmp     byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
        je      pci_read_reg_2
 
                ; mechanism 1
        push    esi   ; save register size into ESI
        mov     esi,eax
        and     esi,3
 
        call    pci_make_config_cmd
        mov     ebx,eax
                ; get current state
        mov     dx,0xcf8
        in      eax, dx
        push    eax
                ; set up addressing to config data
        mov     eax,ebx
        and     al,0xfc ; make address dword-aligned
        out     dx,eax
                ; get requested DWORD of config data
        mov     dl,0xfc
        and     bl,3
        or      dl,bl    ; add to port address first 2 bits of register address
 
        or      esi,esi
        jz      pci_read_byte1
        cmp     esi,1
        jz      pci_read_word1
        cmp     esi,2
        jz      pci_read_dword1
        jmp     pci_fin_read1
 
pci_read_byte1:
        in      al,dx
        jmp pci_fin_read1
pci_read_word1:
        in      ax,dx
        jmp pci_fin_read1
pci_read_dword1:
        in      eax,dx
        jmp     pci_fin_read1
pci_fin_read1:
                ; restore configuration control
        xchg    eax,[esp]
        mov     dx,0xcf8
        out     dx,eax
 
        pop     eax
        pop     esi
        ret
pci_read_reg_2:
 
        test    bh,128  ;mech#2 only supports 16 devices per bus
        jnz     pci_read_reg_err
 
        push esi   ; save register size into ESI
        mov esi,eax
        and esi,3
 
        push    eax
                ;store current state of config space
        mov     dx,0xcf8
        in      al,dx
        mov     ah,al
        mov     dl,0xfa
        in      al,dx
 
        xchg    eax,[esp]
                ; out 0xcfa,bus
        mov     al,ah
        out     dx,al
                ; out 0xcf8,0x80
        mov     dl,0xf8
        mov     al,0x80
        out     dx,al
                ; compute addr
        shr     bh,3 ; func is ignored in mechanism 2
        or      bh,0xc0
        mov     dx,bx
 
        or      esi,esi
        jz      pci_read_byte2
        cmp     esi,1
        jz      pci_read_word2
        cmp     esi,2
        jz      pci_read_dword2
        jmp     pci_fin_read2
 
pci_read_byte2:
        in      al,dx
        jmp pci_fin_read2
pci_read_word2:
        in      ax,dx
        jmp pci_fin_read2
pci_read_dword2:
        in      eax,dx
;       jmp pci_fin_read2
pci_fin_read2:
 
                ; restore configuration space
        xchg    eax,[esp]
        mov     dx,0xcfa
        out     dx,al
        mov     dl,0xf8
        mov     al,ah
        out     dx,al
 
        pop     eax
        pop     esi
        ret
 
pci_read_reg_err:
        xor     eax,eax
        dec     eax
        ret
 
 
;***************************************************************************
;   Function
;      pci_write_reg:
;
;   Description
;       write a register from ECX/CX/CL into the PCI config space
;       IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
;           value to write in ecx
;           number of bytes to write (1,2,4) coded into AL, bits 0-1
;           (0 - byte, 1 - word, 2 - dword)
;***************************************************************************
 
align 4
 
pci_write_reg:
        cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
        je pci_write_reg_2
 
                ; mechanism 1
        push    esi   ; save register size into ESI
        mov     esi,eax
        and     esi,3
 
        call    pci_make_config_cmd
        mov     ebx,eax
                ; get current state into ecx
        mov     dx,0xcf8
        in      eax, dx
        push    eax
                ; set up addressing to config data
        mov     eax,ebx
        and     al,0xfc ; make address dword-aligned
        out     dx,eax
                ; write DWORD of config data
        mov     dl,0xfc
        and     bl,3
        or      dl,bl
        mov     eax,ecx
 
        or      esi,esi
        jz      pci_write_byte1
        cmp     esi,1
        jz      pci_write_word1
        cmp     esi,2
        jz      pci_write_dword1
        jmp     pci_fin_write1
 
pci_write_byte1:
        out     dx,al
        jmp pci_fin_write1
pci_write_word1:
        out     dx,ax
        jmp pci_fin_write1
pci_write_dword1:
        out     dx,eax
        jmp     pci_fin_write1
pci_fin_write1:
 
                ; restore configuration control
        pop     eax
        mov     dl,0xf8
        out     dx,eax
 
        xor     eax,eax
        pop     esi
 
        ret
pci_write_reg_2:
 
        test    bh,128  ;mech#2 only supports 16 devices per bus
        jnz     pci_write_reg_err
 
 
        push esi   ; save register size into ESI
        mov esi,eax
        and esi,3
 
        push    eax
                ;store current state of config space
        mov     dx,0xcf8
        in      al,dx
        mov     ah,al
        mov     dl,0xfa
        in      al,dx
        xchg    eax,[esp]
                ; out 0xcfa,bus
        mov     al,ah
        out     dx,al
                ; out 0xcf8,0x80
        mov     dl,0xf8
        mov     al,0x80
        out     dx,al
                ; compute addr
        shr     bh,3 ; func is ignored in mechanism 2
        or      bh,0xc0
        mov     dx,bx
                ; write register
        mov     eax,ecx
 
        or      esi,esi
        jz      pci_write_byte2
        cmp     esi,1
        jz      pci_write_word2
        cmp     esi,2
        jz      pci_write_dword2
        jmp     pci_fin_write2
 
pci_write_byte2:
        out     dx,al
        jmp pci_fin_write2
pci_write_word2:
        out     dx,ax
        jmp pci_fin_write2
pci_write_dword2:
        out     dx,eax
        jmp     pci_fin_write2
pci_fin_write2:
                ; restore configuration space
        pop     eax
        mov     dx,0xcfa
        out     dx,al
        mov     dl,0xf8
        mov     al,ah
        out     dx,al
 
        xor     eax,eax
        pop     esi
        ret
 
pci_write_reg_err:
        xor     eax,eax
        dec     eax
        ret
 
;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
 
; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1)
pci_emu_dat:	times	30*10 db 0
 
;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
align 4
sys_pcibios:
	cmp	[pci_access_enabled], 1
        jne	.unsupported_func
	mov	edi, [pci_bios_entry]
	test	edi, edi
	jz	.emulate_bios
	xchg	ebx, eax
	xchg	ecx, eax
	xchg	edx, eax
	xchg	esi, eax
        mov     edi, eax
 
        push ds
        mov ax, pci_data_sel
        mov ds, ax
        mov eax, ebp
        call pword [cs:pci_bios_entry]
        pop ds
 
	jmp	.return
	;-=-=-=-=-=-=-=-=
.emulate_bios:
	cmp	ebp, 1			; PCI_FUNCTION_ID
	jnz	.not_PCI_BIOS_PRESENT
	mov	edx, 'PCI '
	xor	ah, ah
        mov     al, [OS_BASE+0x2F0000 + 0x9020]
        mov     bx, [OS_BASE+0x2F0000 + 0x9022]
        mov     cl, [OS_BASE+0x2F0000 + 0x9021]
	jmp	.return
 
.not_PCI_BIOS_PRESENT:
	cmp	ebp, 2			; FIND_PCI_DEVICE
	jne	.not_FIND_PCI_DEVICE
	mov	esi, pci_emu_dat
..nxt:	cmp	[esi], cx
	jne	..no
	cmp	[esi + 2], bx
	jne	..no
	dec	dx
	jns	..no
	mov	bx, [esi + 4]
	xor	ah, ah
	jmp	.return
..no:	cmp	word[esi], 0
	je	..dev_not_found
	add	esi, 10
	jmp	..nxt
..dev_not_found:
	mov	ah, 0x86		; DEVICE_NOT_FOUND
	jmp	.return
 
.not_FIND_PCI_DEVICE:
	cmp	ebp, 3			; FIND_PCI_CLASS_CODE
	jne	.not_FIND_PCI_CLASS_CODE
	mov	esi, pci_emu_dat
	shl	ebx, 8
..nxt2:	cmp	[esi], ebx
	jne	..no2
	mov	bx, [esi]
	xor	ah, ah
	jmp	.return
..no2:	cmp	dword[esi], 0
	je	..dev_not_found2
	add	esi, 10
	jmp	..nxt2
..dev_not_found2:
	mov	ah, 0x86		; DEVICE_NOT_FOUND
	jmp	.return
 
.not_FIND_PCI_CLASS_CODE:
	cmp	ebp, 8			; READ_CONFIG_*
	jb	.not_READ_CONFIG
	cmp	ebp, 0x0A
	ja	.not_READ_CONFIG
	mov	ebx, esi
	mov	bh, al
	mov	edx, ebp
	mov	al, dl
	call	pci_read_reg
	mov	ecx, eax
	xor	ah, ah			; SUCCESSFUL
	jmp	.return
.not_READ_CONFIG:
	cmp	ebp, 0x0B		; WRITE_CONFIG_*
	jb	.not_WRITE_CONFIG
	cmp	ebp, 0x0D
	ja	.not_WRITE_CONFIG
	mov	ecx, ebx
	mov	ebx, esi
	mov	bh, al
	mov	edx, ebp
	inc	edx
	mov	al, dl
	call	pci_write_reg
	xor	ah, ah			; SUCCESSFUL
	jmp	.return
.not_WRITE_CONFIG:
.unsupported_func:
	mov	ah, 0x81		; FUNC_NOT_SUPPORTED
.return:mov	dword[esp + 8 ], edi
	mov	dword[esp + 12], esi
	mov	dword[esp + 24], ebx
	mov	dword[esp + 28], edx
	mov	dword[esp + 32], ecx
	mov	dword[esp + 36], eax
	ret

Rev 586	Rev 593
1	$Revision: 586 $	-
2	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3	;; ;;	2	;; ;;
4	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;	3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
5	;; Distributed under terms of the GNU General Public License ;;	4	;; Distributed under terms of the GNU General Public License ;;
6	;; ;;	5	;; ;;
7	;; ;;	6	;; ;;
8	;; PCI32.INC ;;	7	;; PCI32.INC ;;
9	;; ;;	8	;; ;;
10	;; 32 bit PCI driver code ;;	9	;; 32 bit PCI driver code ;;
11	;; ;;	10	;; ;;
12	;; Version 0.3 April 9, 2007 ;;	11	;; Version 0.3 April 9, 2007 ;;
13	;; Version 0.2 December 21st, 2002 ;;	12	;; Version 0.2 December 21st, 2002 ;;
14	;; ;;	13	;; ;;
15	;; Author: Victor Prodan, victorprodan@yahoo.com ;;	14	;; Author: Victor Prodan, victorprodan@yahoo.com ;;
16	;; Mihailov Ilia, ghost.nsk@gmail.com ;;	15	;; Mihailov Ilia, ghost.nsk@gmail.com ;;
17	;; Credits: ;;	16	;; Credits: ;;
18	;; Ralf Brown ;;	17	;; Ralf Brown ;;
19	;; Mike Hibbett, mikeh@oceanfree.net ;;	18	;; Mike Hibbett, mikeh@oceanfree.net ;;
20	;; ;;	19	;; ;;
21	;; See file COPYING for details ;;	20	;; See file COPYING for details ;;
22	;; ;;	21	;; ;;
23	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	22	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-		23
-		24	$Revision: 593 $
24		25
25		26
26	;***************************************************************************	27	;***************************************************************************
27	; Function	28	; Function
28	; pci_api:	29	; pci_api:
29	;	30	;
30	; Description	31	; Description
31	; entry point for system PCI calls	32	; entry point for system PCI calls
32	;***************************************************************************	33	;***************************************************************************
33		34
34	align 4	35	align 4
35		36
36	pci_api:	37	pci_api:
37		38
38	cmp [pci_access_enabled],1	39	cmp [pci_access_enabled],1
39	jne no_pci_access_for_applications	40	jne no_pci_access_for_applications
40		41
41	or al,al	42	or al,al
42	jnz pci_fn_1	43	jnz pci_fn_1
43	; PCI function 0: get pci version (AH.AL)	44	; PCI function 0: get pci version (AH.AL)
44	movzx eax,word [BOOT_VAR+0x9022]	45	movzx eax,word [BOOT_VAR+0x9022]
45	ret	46	ret
46		47
47	pci_fn_1:	48	pci_fn_1:
48	cmp al,1	49	cmp al,1
49	jnz pci_fn_2	50	jnz pci_fn_2
50		51
51	; PCI function 1: get last bus in AL	52	; PCI function 1: get last bus in AL
52	mov al,[BOOT_VAR+0x9021]	53	mov al,[BOOT_VAR+0x9021]
53	ret	54	ret
54		55
55	pci_fn_2:	56	pci_fn_2:
56	cmp al,2	57	cmp al,2
57	jne pci_fn_3	58	jne pci_fn_3
58	; PCI function 2: get pci access mechanism	59	; PCI function 2: get pci access mechanism
59	mov al,[BOOT_VAR+0x9020]	60	mov al,[BOOT_VAR+0x9020]
60	ret	61	ret
61	pci_fn_3:	62	pci_fn_3:
62		63
63	cmp al,4	64	cmp al,4
64	jz pci_read_reg ;byte	65	jz pci_read_reg ;byte
65	cmp al,5	66	cmp al,5
66	jz pci_read_reg ;word	67	jz pci_read_reg ;word
67	cmp al,6	68	cmp al,6
68	jz pci_read_reg ;dword	69	jz pci_read_reg ;dword
69		70
70	cmp al,8	71	cmp al,8
71	jz pci_write_reg ;byte	72	jz pci_write_reg ;byte
72	cmp al,9	73	cmp al,9
73	jz pci_write_reg ;word	74	jz pci_write_reg ;word
74	cmp al,10	75	cmp al,10
75	jz pci_write_reg ;dword	76	jz pci_write_reg ;dword
76		77
77	no_pci_access_for_applications:	78	no_pci_access_for_applications:
78		79
79	mov eax,-1	80	mov eax,-1
80		81
81	ret	82	ret
82		83
83	;***************************************************************************	84	;***************************************************************************
84	; Function	85	; Function
85	; pci_make_config_cmd	86	; pci_make_config_cmd
86	;	87	;
87	; Description	88	; Description
88	; creates a command dword for use with the PCI bus	89	; creates a command dword for use with the PCI bus
89	; bus # in ah	90	; bus # in ah
90	; device+func in bh (dddddfff)	91	; device+func in bh (dddddfff)
91	; register in bl	92	; register in bl
92	;	93	;
93	; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )	94	; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
94	;***************************************************************************	95	;***************************************************************************
95		96
96	align 4	97	align 4
97		98
98	pci_make_config_cmd:	99	pci_make_config_cmd:
99	shl eax,8 ; move bus to bits 16-23	100	shl eax,8 ; move bus to bits 16-23
100	mov ax,bx ; combine all	101	mov ax,bx ; combine all
101	and eax,0xffffff	102	and eax,0xffffff
102	or eax,0x80000000	103	or eax,0x80000000
103	ret	104	ret
104		105
105	;***************************************************************************	106	;***************************************************************************
106	; Function	107	; Function
107	; pci_read_reg:	108	; pci_read_reg:
108	;	109	;
109	; Description	110	; Description
110	; read a register from the PCI config space into EAX/AX/AL	111	; read a register from the PCI config space into EAX/AX/AL
111	; IN: ah=bus,device+func=bh,register address=bl	112	; IN: ah=bus,device+func=bh,register address=bl
112	; number of bytes to read (1,2,4) coded into AL, bits 0-1	113	; number of bytes to read (1,2,4) coded into AL, bits 0-1
113	; (0 - byte, 1 - word, 2 - dword)	114	; (0 - byte, 1 - word, 2 - dword)
114	;***************************************************************************	115	;***************************************************************************
115		116
116	align 4	117	align 4
117		118
118	pci_read_reg:	119	pci_read_reg:
119	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?	120	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
120	je pci_read_reg_2	121	je pci_read_reg_2
121		122
122	; mechanism 1	123	; mechanism 1
123	push esi ; save register size into ESI	124	push esi ; save register size into ESI
124	mov esi,eax	125	mov esi,eax
125	and esi,3	126	and esi,3
126		127
127	call pci_make_config_cmd	128	call pci_make_config_cmd
128	mov ebx,eax	129	mov ebx,eax
129	; get current state	130	; get current state
130	mov dx,0xcf8	131	mov dx,0xcf8
131	in eax, dx	132	in eax, dx
132	push eax	133	push eax
133	; set up addressing to config data	134	; set up addressing to config data
134	mov eax,ebx	135	mov eax,ebx
135	and al,0xfc ; make address dword-aligned	136	and al,0xfc ; make address dword-aligned
136	out dx,eax	137	out dx,eax
137	; get requested DWORD of config data	138	; get requested DWORD of config data
138	mov dl,0xfc	139	mov dl,0xfc
139	and bl,3	140	and bl,3
140	or dl,bl ; add to port address first 2 bits of register address	141	or dl,bl ; add to port address first 2 bits of register address
141		142
142	or esi,esi	143	or esi,esi
143	jz pci_read_byte1	144	jz pci_read_byte1
144	cmp esi,1	145	cmp esi,1
145	jz pci_read_word1	146	jz pci_read_word1
146	cmp esi,2	147	cmp esi,2
147	jz pci_read_dword1	148	jz pci_read_dword1
148	jmp pci_fin_read1	149	jmp pci_fin_read1
149		150
150	pci_read_byte1:	151	pci_read_byte1:
151	in al,dx	152	in al,dx
152	jmp pci_fin_read1	153	jmp pci_fin_read1
153	pci_read_word1:	154	pci_read_word1:
154	in ax,dx	155	in ax,dx
155	jmp pci_fin_read1	156	jmp pci_fin_read1
156	pci_read_dword1:	157	pci_read_dword1:
157	in eax,dx	158	in eax,dx
158	jmp pci_fin_read1	159	jmp pci_fin_read1
159	pci_fin_read1:	160	pci_fin_read1:
160	; restore configuration control	161	; restore configuration control
161	xchg eax,[esp]	162	xchg eax,[esp]
162	mov dx,0xcf8	163	mov dx,0xcf8
163	out dx,eax	164	out dx,eax
164		165
165	pop eax	166	pop eax
166	pop esi	167	pop esi
167	ret	168	ret
168	pci_read_reg_2:	169	pci_read_reg_2:
169		170
170	test bh,128 ;mech#2 only supports 16 devices per bus	171	test bh,128 ;mech#2 only supports 16 devices per bus
171	jnz pci_read_reg_err	172	jnz pci_read_reg_err
172		173
173	push esi ; save register size into ESI	174	push esi ; save register size into ESI
174	mov esi,eax	175	mov esi,eax
175	and esi,3	176	and esi,3
176		177
177	push eax	178	push eax
178	;store current state of config space	179	;store current state of config space
179	mov dx,0xcf8	180	mov dx,0xcf8
180	in al,dx	181	in al,dx
181	mov ah,al	182	mov ah,al
182	mov dl,0xfa	183	mov dl,0xfa
183	in al,dx	184	in al,dx
184		185
185	xchg eax,[esp]	186	xchg eax,[esp]
186	; out 0xcfa,bus	187	; out 0xcfa,bus
187	mov al,ah	188	mov al,ah
188	out dx,al	189	out dx,al
189	; out 0xcf8,0x80	190	; out 0xcf8,0x80
190	mov dl,0xf8	191	mov dl,0xf8
191	mov al,0x80	192	mov al,0x80
192	out dx,al	193	out dx,al
193	; compute addr	194	; compute addr
194	shr bh,3 ; func is ignored in mechanism 2	195	shr bh,3 ; func is ignored in mechanism 2
195	or bh,0xc0	196	or bh,0xc0
196	mov dx,bx	197	mov dx,bx
197		198
198	or esi,esi	199	or esi,esi
199	jz pci_read_byte2	200	jz pci_read_byte2
200	cmp esi,1	201	cmp esi,1
201	jz pci_read_word2	202	jz pci_read_word2
202	cmp esi,2	203	cmp esi,2
203	jz pci_read_dword2	204	jz pci_read_dword2
204	jmp pci_fin_read2	205	jmp pci_fin_read2
205		206
206	pci_read_byte2:	207	pci_read_byte2:
207	in al,dx	208	in al,dx
208	jmp pci_fin_read2	209	jmp pci_fin_read2
209	pci_read_word2:	210	pci_read_word2:
210	in ax,dx	211	in ax,dx
211	jmp pci_fin_read2	212	jmp pci_fin_read2
212	pci_read_dword2:	213	pci_read_dword2:
213	in eax,dx	214	in eax,dx
214	; jmp pci_fin_read2	215	; jmp pci_fin_read2
215	pci_fin_read2:	216	pci_fin_read2:
216		217
217	; restore configuration space	218	; restore configuration space
218	xchg eax,[esp]	219	xchg eax,[esp]
219	mov dx,0xcfa	220	mov dx,0xcfa
220	out dx,al	221	out dx,al
221	mov dl,0xf8	222	mov dl,0xf8
222	mov al,ah	223	mov al,ah
223	out dx,al	224	out dx,al
224		225
225	pop eax	226	pop eax
226	pop esi	227	pop esi
227	ret	228	ret
228		229
229	pci_read_reg_err:	230	pci_read_reg_err:
230	xor eax,eax	231	xor eax,eax
231	dec eax	232	dec eax
232	ret	233	ret
233		234
234		235
235	;***************************************************************************	236	;***************************************************************************
236	; Function	237	; Function
237	; pci_write_reg:	238	; pci_write_reg:
238	;	239	;
239	; Description	240	; Description
240	; write a register from ECX/CX/CL into the PCI config space	241	; write a register from ECX/CX/CL into the PCI config space
241	; IN: ah=bus,device+func=bh,register address (dword aligned)=bl,	242	; IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
242	; value to write in ecx	243	; value to write in ecx
243	; number of bytes to write (1,2,4) coded into AL, bits 0-1	244	; number of bytes to write (1,2,4) coded into AL, bits 0-1
244	; (0 - byte, 1 - word, 2 - dword)	245	; (0 - byte, 1 - word, 2 - dword)
245	;***************************************************************************	246	;***************************************************************************
246		247
247	align 4	248	align 4
248		249
249	pci_write_reg:	250	pci_write_reg:
250	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?	251	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
251	je pci_write_reg_2	252	je pci_write_reg_2
252		253
253	; mechanism 1	254	; mechanism 1
254	push esi ; save register size into ESI	255	push esi ; save register size into ESI
255	mov esi,eax	256	mov esi,eax
256	and esi,3	257	and esi,3
257		258
258	call pci_make_config_cmd	259	call pci_make_config_cmd
259	mov ebx,eax	260	mov ebx,eax
260	; get current state into ecx	261	; get current state into ecx
261	mov dx,0xcf8	262	mov dx,0xcf8
262	in eax, dx	263	in eax, dx
263	push eax	264	push eax
264	; set up addressing to config data	265	; set up addressing to config data
265	mov eax,ebx	266	mov eax,ebx
266	and al,0xfc ; make address dword-aligned	267	and al,0xfc ; make address dword-aligned
267	out dx,eax	268	out dx,eax
268	; write DWORD of config data	269	; write DWORD of config data
269	mov dl,0xfc	270	mov dl,0xfc
270	and bl,3	271	and bl,3
271	or dl,bl	272	or dl,bl
272	mov eax,ecx	273	mov eax,ecx
273		274
274	or esi,esi	275	or esi,esi
275	jz pci_write_byte1	276	jz pci_write_byte1
276	cmp esi,1	277	cmp esi,1
277	jz pci_write_word1	278	jz pci_write_word1
278	cmp esi,2	279	cmp esi,2
279	jz pci_write_dword1	280	jz pci_write_dword1
280	jmp pci_fin_write1	281	jmp pci_fin_write1
281		282
282	pci_write_byte1:	283	pci_write_byte1:
283	out dx,al	284	out dx,al
284	jmp pci_fin_write1	285	jmp pci_fin_write1
285	pci_write_word1:	286	pci_write_word1:
286	out dx,ax	287	out dx,ax
287	jmp pci_fin_write1	288	jmp pci_fin_write1
288	pci_write_dword1:	289	pci_write_dword1:
289	out dx,eax	290	out dx,eax
290	jmp pci_fin_write1	291	jmp pci_fin_write1
291	pci_fin_write1:	292	pci_fin_write1:
292		293
293	; restore configuration control	294	; restore configuration control
294	pop eax	295	pop eax
295	mov dl,0xf8	296	mov dl,0xf8
296	out dx,eax	297	out dx,eax
297		298
298	xor eax,eax	299	xor eax,eax
299	pop esi	300	pop esi
300		301
301	ret	302	ret
302	pci_write_reg_2:	303	pci_write_reg_2:
303		304
304	test bh,128 ;mech#2 only supports 16 devices per bus	305	test bh,128 ;mech#2 only supports 16 devices per bus
305	jnz pci_write_reg_err	306	jnz pci_write_reg_err
306		307
307		308
308	push esi ; save register size into ESI	309	push esi ; save register size into ESI
309	mov esi,eax	310	mov esi,eax
310	and esi,3	311	and esi,3
311		312
312	push eax	313	push eax
313	;store current state of config space	314	;store current state of config space
314	mov dx,0xcf8	315	mov dx,0xcf8
315	in al,dx	316	in al,dx
316	mov ah,al	317	mov ah,al
317	mov dl,0xfa	318	mov dl,0xfa
318	in al,dx	319	in al,dx
319	xchg eax,[esp]	320	xchg eax,[esp]
320	; out 0xcfa,bus	321	; out 0xcfa,bus
321	mov al,ah	322	mov al,ah
322	out dx,al	323	out dx,al
323	; out 0xcf8,0x80	324	; out 0xcf8,0x80
324	mov dl,0xf8	325	mov dl,0xf8
325	mov al,0x80	326	mov al,0x80
326	out dx,al	327	out dx,al
327	; compute addr	328	; compute addr
328	shr bh,3 ; func is ignored in mechanism 2	329	shr bh,3 ; func is ignored in mechanism 2
329	or bh,0xc0	330	or bh,0xc0
330	mov dx,bx	331	mov dx,bx
331	; write register	332	; write register
332	mov eax,ecx	333	mov eax,ecx
333		334
334	or esi,esi	335	or esi,esi
335	jz pci_write_byte2	336	jz pci_write_byte2
336	cmp esi,1	337	cmp esi,1
337	jz pci_write_word2	338	jz pci_write_word2
338	cmp esi,2	339	cmp esi,2
339	jz pci_write_dword2	340	jz pci_write_dword2
340	jmp pci_fin_write2	341	jmp pci_fin_write2
341		342
342	pci_write_byte2:	343	pci_write_byte2:
343	out dx,al	344	out dx,al
344	jmp pci_fin_write2	345	jmp pci_fin_write2
345	pci_write_word2:	346	pci_write_word2:
346	out dx,ax	347	out dx,ax
347	jmp pci_fin_write2	348	jmp pci_fin_write2
348	pci_write_dword2:	349	pci_write_dword2:
349	out dx,eax	350	out dx,eax
350	jmp pci_fin_write2	351	jmp pci_fin_write2
351	pci_fin_write2:	352	pci_fin_write2:
352	; restore configuration space	353	; restore configuration space
353	pop eax	354	pop eax
354	mov dx,0xcfa	355	mov dx,0xcfa
355	out dx,al	356	out dx,al
356	mov dl,0xf8	357	mov dl,0xf8
357	mov al,ah	358	mov al,ah
358	out dx,al	359	out dx,al
359		360
360	xor eax,eax	361	xor eax,eax
361	pop esi	362	pop esi
362	ret	363	ret
363		364
364	pci_write_reg_err:	365	pci_write_reg_err:
365	xor eax,eax	366	xor eax,eax
366	dec eax	367	dec eax
367	ret	368	ret
368		369
369	;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=	370	;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
370		371
371	; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1)	372	; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1)
372	pci_emu_dat: times 30*10 db 0	373	pci_emu_dat: times 30*10 db 0
373		374
374	;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=	375	;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
375	align 4	376	align 4
376	sys_pcibios:	377	sys_pcibios:
377	cmp [pci_access_enabled], 1	378	cmp [pci_access_enabled], 1
378	jne .unsupported_func	379	jne .unsupported_func
379	mov edi, [pci_bios_entry]	380	mov edi, [pci_bios_entry]
380	test edi, edi	381	test edi, edi
381	jz .emulate_bios	382	jz .emulate_bios
382	xchg ebx, eax	383	xchg ebx, eax
383	xchg ecx, eax	384	xchg ecx, eax
384	xchg edx, eax	385	xchg edx, eax
385	xchg esi, eax	386	xchg esi, eax
386	mov edi, eax	387	mov edi, eax
387		388
388	push ds	389	push ds
389	mov ax, pci_data_sel	390	mov ax, pci_data_sel
390	mov ds, ax	391	mov ds, ax
391	mov eax, ebp	392	mov eax, ebp
392	call pword [cs:pci_bios_entry]	393	call pword [cs:pci_bios_entry]
393	pop ds	394	pop ds
394		395
395	jmp .return	396	jmp .return
396	;-=-=-=-=-=-=-=-=	397	;-=-=-=-=-=-=-=-=
397	.emulate_bios:	398	.emulate_bios:
398	cmp ebp, 1 ; PCI_FUNCTION_ID	399	cmp ebp, 1 ; PCI_FUNCTION_ID
399	jnz .not_PCI_BIOS_PRESENT	400	jnz .not_PCI_BIOS_PRESENT
400	mov edx, 'PCI '	401	mov edx, 'PCI '
401	xor ah, ah	402	xor ah, ah
402	mov al, [OS_BASE+0x2F0000 + 0x9020]	403	mov al, [OS_BASE+0x2F0000 + 0x9020]
403	mov bx, [OS_BASE+0x2F0000 + 0x9022]	404	mov bx, [OS_BASE+0x2F0000 + 0x9022]
404	mov cl, [OS_BASE+0x2F0000 + 0x9021]	405	mov cl, [OS_BASE+0x2F0000 + 0x9021]
405	jmp .return	406	jmp .return
406		407
407	.not_PCI_BIOS_PRESENT:	408	.not_PCI_BIOS_PRESENT:
408	cmp ebp, 2 ; FIND_PCI_DEVICE	409	cmp ebp, 2 ; FIND_PCI_DEVICE
409	jne .not_FIND_PCI_DEVICE	410	jne .not_FIND_PCI_DEVICE
410	mov esi, pci_emu_dat	411	mov esi, pci_emu_dat
411	..nxt: cmp [esi], cx	412	..nxt: cmp [esi], cx
412	jne ..no	413	jne ..no
413	cmp [esi + 2], bx	414	cmp [esi + 2], bx
414	jne ..no	415	jne ..no
415	dec dx	416	dec dx
416	jns ..no	417	jns ..no
417	mov bx, [esi + 4]	418	mov bx, [esi + 4]
418	xor ah, ah	419	xor ah, ah
419	jmp .return	420	jmp .return
420	..no: cmp word[esi], 0	421	..no: cmp word[esi], 0
421	je ..dev_not_found	422	je ..dev_not_found
422	add esi, 10	423	add esi, 10
423	jmp ..nxt	424	jmp ..nxt
424	..dev_not_found:	425	..dev_not_found:
425	mov ah, 0x86 ; DEVICE_NOT_FOUND	426	mov ah, 0x86 ; DEVICE_NOT_FOUND
426	jmp .return	427	jmp .return
427		428
428	.not_FIND_PCI_DEVICE:	429	.not_FIND_PCI_DEVICE:
429	cmp ebp, 3 ; FIND_PCI_CLASS_CODE	430	cmp ebp, 3 ; FIND_PCI_CLASS_CODE
430	jne .not_FIND_PCI_CLASS_CODE	431	jne .not_FIND_PCI_CLASS_CODE
431	mov esi, pci_emu_dat	432	mov esi, pci_emu_dat
432	shl ebx, 8	433	shl ebx, 8
433	..nxt2: cmp [esi], ebx	434	..nxt2: cmp [esi], ebx
434	jne ..no2	435	jne ..no2
435	mov bx, [esi]	436	mov bx, [esi]
436	xor ah, ah	437	xor ah, ah
437	jmp .return	438	jmp .return
438	..no2: cmp dword[esi], 0	439	..no2: cmp dword[esi], 0
439	je ..dev_not_found2	440	je ..dev_not_found2
440	add esi, 10	441	add esi, 10
441	jmp ..nxt2	442	jmp ..nxt2
442	..dev_not_found2:	443	..dev_not_found2:
443	mov ah, 0x86 ; DEVICE_NOT_FOUND	444	mov ah, 0x86 ; DEVICE_NOT_FOUND
444	jmp .return	445	jmp .return
445		446
446	.not_FIND_PCI_CLASS_CODE:	447	.not_FIND_PCI_CLASS_CODE:
447	cmp ebp, 8 ; READ_CONFIG_*	448	cmp ebp, 8 ; READ_CONFIG_*
448	jb .not_READ_CONFIG	449	jb .not_READ_CONFIG
449	cmp ebp, 0x0A	450	cmp ebp, 0x0A
450	ja .not_READ_CONFIG	451	ja .not_READ_CONFIG
451	mov ebx, esi	452	mov ebx, esi
452	mov bh, al	453	mov bh, al
453	mov edx, ebp	454	mov edx, ebp
454	mov al, dl	455	mov al, dl
455	call pci_read_reg	456	call pci_read_reg
456	mov ecx, eax	457	mov ecx, eax
457	xor ah, ah ; SUCCESSFUL	458	xor ah, ah ; SUCCESSFUL
458	jmp .return	459	jmp .return
459	.not_READ_CONFIG:	460	.not_READ_CONFIG:
460	cmp ebp, 0x0B ; WRITE_CONFIG_*	461	cmp ebp, 0x0B ; WRITE_CONFIG_*
461	jb .not_WRITE_CONFIG	462	jb .not_WRITE_CONFIG
462	cmp ebp, 0x0D	463	cmp ebp, 0x0D
463	ja .not_WRITE_CONFIG	464	ja .not_WRITE_CONFIG
464	mov ecx, ebx	465	mov ecx, ebx
465	mov ebx, esi	466	mov ebx, esi
466	mov bh, al	467	mov bh, al
467	mov edx, ebp	468	mov edx, ebp
468	inc edx	469	inc edx
469	mov al, dl	470	mov al, dl
470	call pci_write_reg	471	call pci_write_reg
471	xor ah, ah ; SUCCESSFUL	472	xor ah, ah ; SUCCESSFUL
472	jmp .return	473	jmp .return
473	.not_WRITE_CONFIG:	474	.not_WRITE_CONFIG:
474	.unsupported_func:	475	.unsupported_func:
475	mov ah, 0x81 ; FUNC_NOT_SUPPORTED	476	mov ah, 0x81 ; FUNC_NOT_SUPPORTED
476	.return:mov dword[esp + 8 ], edi	477	.return:mov dword[esp + 8 ], edi
477	mov dword[esp + 12], esi	478	mov dword[esp + 12], esi
478	mov dword[esp + 24], ebx	479	mov dword[esp + 24], ebx
479	mov dword[esp + 28], edx	480	mov dword[esp + 28], edx
480	mov dword[esp + 32], ecx	481	mov dword[esp + 32], ecx
481	mov dword[esp + 36], eax	482	mov dword[esp + 36], eax
482	ret	483	ret

Subversion Repositories Kolibri OS

(root)/kernel/trunk/bus/pci/pci32.inc – Rev 586 → 593