WebSVN – Kolibri OS – Diff – /kernel/trunk/bus/pci/pci32.inc


$Revision: 431 $
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;                                                              ;;
;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
;; Distributed under terms of the GNU General Public License    ;;
;;                                                              ;;
;;                                                              ;;
;;  PCI32.INC                                                   ;;
;;                                                              ;;
;;  32 bit PCI driver code                                      ;;
;;                                                              ;;
;;  Version 0.2  December 21st, 2002                            ;;
;;                                                              ;;
;;  Author: Victor Prodan, victorprodan@yahoo.com               ;;
;;    Credits:                                                  ;;
;;          Ralf Brown                                          ;;
;;          Mike Hibbett, mikeh@oceanfree.net                   ;;
;;                                                              ;;
;;  See file COPYING for details                                ;;
;;                                                              ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 
;***************************************************************************
;   Function
;      pci_api:
;
;   Description
;       entry point for system PCI calls
;***************************************************************************
 
align 4
 
pci_api:
 
        cmp  [pci_access_enabled],1
        jne  no_pci_access_for_applications
 
        or al,al
        jnz pci_fn_1
        ; PCI function 0: get pci version (AH.AL)
        movzx eax,word [0x2F0000+0x9022]
        ret
 
pci_fn_1:
        cmp al,1
        jnz pci_fn_2
 
        ; PCI function 1: get last bus in AL
        mov al,[0x2F0000+0x9021]
        ret
 
pci_fn_2:
        cmp al,2
        jne pci_fn_3
        ; PCI function 2: get pci access mechanism
        mov al,[0x2F0000+0x9020]
        ret
pci_fn_3:
 
        cmp al,4
        jz pci_read_reg   ;byte
        cmp al,5
        jz pci_read_reg   ;word
        cmp al,6
        jz pci_read_reg   ;dword
 
        cmp al,8
        jz pci_write_reg  ;byte
        cmp al,9
        jz pci_write_reg  ;word
        cmp al,10
        jz pci_write_reg  ;dword
 
      no_pci_access_for_applications:
 
        mov eax,-1
 
        ret
 
;***************************************************************************
;   Function
;      pci_make_config_cmd
;
;   Description
;       creates a command dword  for use with the PCI bus
;       bus # in ah
;       device+func in bh (dddddfff)
;       register in bl
;
;      command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
;***************************************************************************
 
align 4
 
pci_make_config_cmd:
    shl     eax,8          ; move bus to bits 16-23
    mov     ax,bx          ; combine all
    and     eax,0xffffff
    or      eax,0x80000000
    ret
 
;***************************************************************************
;   Function
;      pci_read_reg:
;
;   Description
;       read a register from the PCI config space into EAX/AX/AL
;       IN: ah=bus,device+func=bh,register address=bl
;           number of bytes to read (1,2,4) coded into AL, bits 0-1
;***************************************************************************
 
align 4
 
pci_read_reg:
        cmp     byte [0x2F0000+0x9020],2 ;what mechanism will we use?
        je      pci_read_reg_2
 
                ; mechanism 1
        push    esi   ; save register size into ESI
        mov     esi,eax
        and     esi,3
 
        call    pci_make_config_cmd
        mov     ebx,eax
                ; get current state
        mov     dx,0xcf8
        in      eax, dx
        push    eax
                ; set up addressing to config data
        mov     eax,ebx
        and     al,0xfc ; make address dword-aligned
        out     dx,eax
                ; get requested DWORD of config data
        mov     dl,0xfc
        and     bl,3
        or      dl,bl    ; add to port address first 2 bits of register address
 
        or      esi,esi
        jz      pci_read_byte1
        cmp     esi,1
        jz      pci_read_word1
        cmp     esi,2
        jz      pci_read_dword1
        jmp     pci_fin_read1
 
pci_read_byte1:
        in      al,dx
        jmp pci_fin_read1
pci_read_word1:
        in      ax,dx
        jmp pci_fin_read1
pci_read_dword1:
        in      eax,dx
        jmp     pci_fin_read1
pci_fin_read1:
                ; restore configuration control
        xchg    eax,[esp]
        mov     dx,0xcf8
        out     dx,eax
 
        pop     eax
        pop     esi
        ret
pci_read_reg_2:
 
        test    bh,128  ;mech#2 only supports 16 devices per bus
        jnz     pci_read_reg_err
 
        push esi   ; save register size into ESI
        mov esi,eax
        and esi,3
 
        push    eax
                ;store current state of config space
        mov     dx,0xcf8
        in      al,dx
        mov     ah,al
        mov     dl,0xfa
        in      al,dx
 
        xchg    eax,[esp]
                ; out 0xcfa,bus
        mov     al,ah
        out     dx,al
                ; out 0xcf8,0x80
        mov     dl,0xf8
        mov     al,0x80
        out     dx,al
                ; compute addr
        shr     bh,3 ; func is ignored in mechanism 2
        or      bh,0xc0
        mov     dx,bx
 
        or      esi,esi
        jz      pci_read_byte2
        cmp     esi,1
        jz      pci_read_word2
        cmp     esi,2
        jz      pci_read_dword2
        jmp     pci_fin_read2
 
pci_read_byte2:
        in      al,dx
        jmp pci_fin_read2
pci_read_word2:
        in      ax,dx
        jmp pci_fin_read2
pci_read_dword2:
        in      eax,dx
;       jmp pci_fin_read2
pci_fin_read2:
 
                ; restore configuration space
        xchg    eax,[esp]
        mov     dx,0xcfa
        out     dx,al
        mov     dl,0xf8
        mov     al,ah
        out     dx,al
 
        pop     eax
        pop     esi
        ret
 
pci_read_reg_err:
        xor     eax,eax
        dec     eax
        ret
 
 
;***************************************************************************
;   Function
;      pci_write_reg:
;
;   Description
;       write a register from ECX/CX/CL into the PCI config space
;       IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
;           value to write in ecx
;           number of bytes to write (1,2,4) coded into AL, bits 0-1
;***************************************************************************
 
align 4
 
pci_write_reg:
        cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?
        je pci_write_reg_2
 
                ; mechanism 1
        push    esi   ; save register size into ESI
        mov     esi,eax
        and     esi,3
 
        call    pci_make_config_cmd
        mov     ebx,eax
                ; get current state into ecx
        mov     dx,0xcf8
        in      eax, dx
        push    eax
                ; set up addressing to config data
        mov     eax,ebx
        and     al,0xfc ; make address dword-aligned
        out     dx,eax
                ; write DWORD of config data
        mov     dl,0xfc
        and     bl,3
        or      dl,bl
        mov     eax,ecx
 
        or      esi,esi
        jz      pci_write_byte1
        cmp     esi,1
        jz      pci_write_word1
        cmp     esi,2
        jz      pci_write_dword1
        jmp     pci_fin_write1
 
pci_write_byte1:
        out     dx,al
        jmp pci_fin_write1
pci_write_word1:
        out     dx,ax
        jmp pci_fin_write1
pci_write_dword1:
        out     dx,eax
        jmp     pci_fin_write1
pci_fin_write1:
 
                ; restore configuration control
        pop     eax
        mov     dl,0xf8
        out     dx,eax
 
        xor     eax,eax
        pop     esi
 
        ret
pci_write_reg_2:
 
        test    bh,128  ;mech#2 only supports 16 devices per bus
        jnz     pci_write_reg_err
 
 
        push esi   ; save register size into ESI
        mov esi,eax
        and esi,3
 
        push    eax
                ;store current state of config space
        mov     dx,0xcf8
        in      al,dx
        mov     ah,al
        mov     dl,0xfa
        in      al,dx
        xchg    eax,[esp]
                ; out 0xcfa,bus
        mov     al,ah
        out     dx,al
                ; out 0xcf8,0x80
        mov     dl,0xf8
        mov     al,0x80
        out     dx,al
                ; compute addr
        shr     bh,3 ; func is ignored in mechanism 2
        or      bh,0xc0
        mov     dx,bx
                ; write register
        mov     eax,ecx
 
        or      esi,esi
        jz      pci_write_byte2
        cmp     esi,1
        jz      pci_write_word2
        cmp     esi,2
        jz      pci_write_dword2
        jmp     pci_fin_write2
 
pci_write_byte2:
        out     dx,al
        jmp pci_fin_write2
pci_write_word2:
        out     dx,ax
        jmp pci_fin_write2
pci_write_dword2:
        out     dx,eax
        jmp     pci_fin_write2
pci_fin_write2:
                ; restore configuration space
        pop     eax
        mov     dx,0xcfa
        out     dx,al
        mov     dl,0xf8
        mov     al,ah
        out     dx,al
 
        xor     eax,eax
        pop     esi
        ret
 
pci_write_reg_err:
        xor     eax,eax
        dec     eax
        ret

Rev 425	Rev 431
1	$Revision: 425 $	1	$Revision: 431 $
2	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	2	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-		3	;; ;;
-		4	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
-		5	;; Distributed under terms of the GNU General Public License ;;
-		6	;; ;;
3	;; ;;	7	;; ;;
4	;; PCI32.INC ;;	8	;; PCI32.INC ;;
5	;; ;;	9	;; ;;
6	;; 32 bit PCI driver code ;;	10	;; 32 bit PCI driver code ;;
7	;; ;;	11	;; ;;
8	;; Version 0.2 December 21st, 2002 ;;	12	;; Version 0.2 December 21st, 2002 ;;
9	;; ;;	13	;; ;;
10	;; Author: Victor Prodan, victorprodan@yahoo.com ;;	14	;; Author: Victor Prodan, victorprodan@yahoo.com ;;
11	;; Credits: ;;	15	;; Credits: ;;
12	;; Ralf Brown ;;	16	;; Ralf Brown ;;
13	;; Mike Hibbett, mikeh@oceanfree.net ;;	17	;; Mike Hibbett, mikeh@oceanfree.net ;;
14	;; ;;	18	;; ;;
15	;; See file COPYING for details ;;	19	;; See file COPYING for details ;;
16	;; ;;	20	;; ;;
17	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;	21	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
18		22
19		23
20	;***************************************************************************	24	;***************************************************************************
21	; Function	25	; Function
22	; pci_api:	26	; pci_api:
23	;	27	;
24	; Description	28	; Description
25	; entry point for system PCI calls	29	; entry point for system PCI calls
26	;***************************************************************************	30	;***************************************************************************
27		31
28	align 4	32	align 4
29		33
30	pci_api:	34	pci_api:
31		35
32	cmp [pci_access_enabled],1	36	cmp [pci_access_enabled],1
33	jne no_pci_access_for_applications	37	jne no_pci_access_for_applications
34		38
35	or al,al	39	or al,al
36	jnz pci_fn_1	40	jnz pci_fn_1
37	; PCI function 0: get pci version (AH.AL)	41	; PCI function 0: get pci version (AH.AL)
38	movzx eax,word [0x2F0000+0x9022]	42	movzx eax,word [0x2F0000+0x9022]
39	ret	43	ret
40		44
41	pci_fn_1:	45	pci_fn_1:
42	cmp al,1	46	cmp al,1
43	jnz pci_fn_2	47	jnz pci_fn_2
44		48
45	; PCI function 1: get last bus in AL	49	; PCI function 1: get last bus in AL
46	mov al,[0x2F0000+0x9021]	50	mov al,[0x2F0000+0x9021]
47	ret	51	ret
48		52
49	pci_fn_2:	53	pci_fn_2:
50	cmp al,2	54	cmp al,2
51	jne pci_fn_3	55	jne pci_fn_3
52	; PCI function 2: get pci access mechanism	56	; PCI function 2: get pci access mechanism
53	mov al,[0x2F0000+0x9020]	57	mov al,[0x2F0000+0x9020]
54	ret	58	ret
55	pci_fn_3:	59	pci_fn_3:
56		60
57	cmp al,4	61	cmp al,4
58	jz pci_read_reg ;byte	62	jz pci_read_reg ;byte
59	cmp al,5	63	cmp al,5
60	jz pci_read_reg ;word	64	jz pci_read_reg ;word
61	cmp al,6	65	cmp al,6
62	jz pci_read_reg ;dword	66	jz pci_read_reg ;dword
63		67
64	cmp al,8	68	cmp al,8
65	jz pci_write_reg ;byte	69	jz pci_write_reg ;byte
66	cmp al,9	70	cmp al,9
67	jz pci_write_reg ;word	71	jz pci_write_reg ;word
68	cmp al,10	72	cmp al,10
69	jz pci_write_reg ;dword	73	jz pci_write_reg ;dword
70		74
71	no_pci_access_for_applications:	75	no_pci_access_for_applications:
72		76
73	mov eax,-1	77	mov eax,-1
74		78
75	ret	79	ret
76		80
77	;***************************************************************************	81	;***************************************************************************
78	; Function	82	; Function
79	; pci_make_config_cmd	83	; pci_make_config_cmd
80	;	84	;
81	; Description	85	; Description
82	; creates a command dword for use with the PCI bus	86	; creates a command dword for use with the PCI bus
83	; bus # in ah	87	; bus # in ah
84	; device+func in bh (dddddfff)	88	; device+func in bh (dddddfff)
85	; register in bl	89	; register in bl
86	;	90	;
87	; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )	91	; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
88	;***************************************************************************	92	;***************************************************************************
89		93
90	align 4	94	align 4
91		95
92	pci_make_config_cmd:	96	pci_make_config_cmd:
93	shl eax,8 ; move bus to bits 16-23	97	shl eax,8 ; move bus to bits 16-23
94	mov ax,bx ; combine all	98	mov ax,bx ; combine all
95	and eax,0xffffff	99	and eax,0xffffff
96	or eax,0x80000000	100	or eax,0x80000000
97	ret	101	ret
98		102
99	;***************************************************************************	103	;***************************************************************************
100	; Function	104	; Function
101	; pci_read_reg:	105	; pci_read_reg:
102	;	106	;
103	; Description	107	; Description
104	; read a register from the PCI config space into EAX/AX/AL	108	; read a register from the PCI config space into EAX/AX/AL
105	; IN: ah=bus,device+func=bh,register address=bl	109	; IN: ah=bus,device+func=bh,register address=bl
106	; number of bytes to read (1,2,4) coded into AL, bits 0-1	110	; number of bytes to read (1,2,4) coded into AL, bits 0-1
107	;***************************************************************************	111	;***************************************************************************
108		112
109	align 4	113	align 4
110		114
111	pci_read_reg:	115	pci_read_reg:
112	cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?	116	cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?
113	je pci_read_reg_2	117	je pci_read_reg_2
114		118
115	; mechanism 1	119	; mechanism 1
116	push esi ; save register size into ESI	120	push esi ; save register size into ESI
117	mov esi,eax	121	mov esi,eax
118	and esi,3	122	and esi,3
119		123
120	call pci_make_config_cmd	124	call pci_make_config_cmd
121	mov ebx,eax	125	mov ebx,eax
122	; get current state	126	; get current state
123	mov dx,0xcf8	127	mov dx,0xcf8
124	in eax, dx	128	in eax, dx
125	push eax	129	push eax
126	; set up addressing to config data	130	; set up addressing to config data
127	mov eax,ebx	131	mov eax,ebx
128	and al,0xfc ; make address dword-aligned	132	and al,0xfc ; make address dword-aligned
129	out dx,eax	133	out dx,eax
130	; get requested DWORD of config data	134	; get requested DWORD of config data
131	mov dl,0xfc	135	mov dl,0xfc
132	and bl,3	136	and bl,3
133	or dl,bl ; add to port address first 2 bits of register address	137	or dl,bl ; add to port address first 2 bits of register address
134		138
135	or esi,esi	139	or esi,esi
136	jz pci_read_byte1	140	jz pci_read_byte1
137	cmp esi,1	141	cmp esi,1
138	jz pci_read_word1	142	jz pci_read_word1
139	cmp esi,2	143	cmp esi,2
140	jz pci_read_dword1	144	jz pci_read_dword1
141	jmp pci_fin_read1	145	jmp pci_fin_read1
142		146
143	pci_read_byte1:	147	pci_read_byte1:
144	in al,dx	148	in al,dx
145	jmp pci_fin_read1	149	jmp pci_fin_read1
146	pci_read_word1:	150	pci_read_word1:
147	in ax,dx	151	in ax,dx
148	jmp pci_fin_read1	152	jmp pci_fin_read1
149	pci_read_dword1:	153	pci_read_dword1:
150	in eax,dx	154	in eax,dx
151	jmp pci_fin_read1	155	jmp pci_fin_read1
152	pci_fin_read1:	156	pci_fin_read1:
153	; restore configuration control	157	; restore configuration control
154	xchg eax,[esp]	158	xchg eax,[esp]
155	mov dx,0xcf8	159	mov dx,0xcf8
156	out dx,eax	160	out dx,eax
157		161
158	pop eax	162	pop eax
159	pop esi	163	pop esi
160	ret	164	ret
161	pci_read_reg_2:	165	pci_read_reg_2:
162		166
163	test bh,128 ;mech#2 only supports 16 devices per bus	167	test bh,128 ;mech#2 only supports 16 devices per bus
164	jnz pci_read_reg_err	168	jnz pci_read_reg_err
165		169
166	push esi ; save register size into ESI	170	push esi ; save register size into ESI
167	mov esi,eax	171	mov esi,eax
168	and esi,3	172	and esi,3
169		173
170	push eax	174	push eax
171	;store current state of config space	175	;store current state of config space
172	mov dx,0xcf8	176	mov dx,0xcf8
173	in al,dx	177	in al,dx
174	mov ah,al	178	mov ah,al
175	mov dl,0xfa	179	mov dl,0xfa
176	in al,dx	180	in al,dx
177		181
178	xchg eax,[esp]	182	xchg eax,[esp]
179	; out 0xcfa,bus	183	; out 0xcfa,bus
180	mov al,ah	184	mov al,ah
181	out dx,al	185	out dx,al
182	; out 0xcf8,0x80	186	; out 0xcf8,0x80
183	mov dl,0xf8	187	mov dl,0xf8
184	mov al,0x80	188	mov al,0x80
185	out dx,al	189	out dx,al
186	; compute addr	190	; compute addr
187	shr bh,3 ; func is ignored in mechanism 2	191	shr bh,3 ; func is ignored in mechanism 2
188	or bh,0xc0	192	or bh,0xc0
189	mov dx,bx	193	mov dx,bx
190		194
191	or esi,esi	195	or esi,esi
192	jz pci_read_byte2	196	jz pci_read_byte2
193	cmp esi,1	197	cmp esi,1
194	jz pci_read_word2	198	jz pci_read_word2
195	cmp esi,2	199	cmp esi,2
196	jz pci_read_dword2	200	jz pci_read_dword2
197	jmp pci_fin_read2	201	jmp pci_fin_read2
198		202
199	pci_read_byte2:	203	pci_read_byte2:
200	in al,dx	204	in al,dx
201	jmp pci_fin_read2	205	jmp pci_fin_read2
202	pci_read_word2:	206	pci_read_word2:
203	in ax,dx	207	in ax,dx
204	jmp pci_fin_read2	208	jmp pci_fin_read2
205	pci_read_dword2:	209	pci_read_dword2:
206	in eax,dx	210	in eax,dx
207	; jmp pci_fin_read2	211	; jmp pci_fin_read2
208	pci_fin_read2:	212	pci_fin_read2:
209		213
210	; restore configuration space	214	; restore configuration space
211	xchg eax,[esp]	215	xchg eax,[esp]
212	mov dx,0xcfa	216	mov dx,0xcfa
213	out dx,al	217	out dx,al
214	mov dl,0xf8	218	mov dl,0xf8
215	mov al,ah	219	mov al,ah
216	out dx,al	220	out dx,al
217		221
218	pop eax	222	pop eax
219	pop esi	223	pop esi
220	ret	224	ret
221		225
222	pci_read_reg_err:	226	pci_read_reg_err:
223	xor eax,eax	227	xor eax,eax
224	dec eax	228	dec eax
225	ret	229	ret
226		230
227		231
228	;***************************************************************************	232	;***************************************************************************
229	; Function	233	; Function
230	; pci_write_reg:	234	; pci_write_reg:
231	;	235	;
232	; Description	236	; Description
233	; write a register from ECX/CX/CL into the PCI config space	237	; write a register from ECX/CX/CL into the PCI config space
234	; IN: ah=bus,device+func=bh,register address (dword aligned)=bl,	238	; IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
235	; value to write in ecx	239	; value to write in ecx
236	; number of bytes to write (1,2,4) coded into AL, bits 0-1	240	; number of bytes to write (1,2,4) coded into AL, bits 0-1
237	;***************************************************************************	241	;***************************************************************************
238		242
239	align 4	243	align 4
240		244
241	pci_write_reg:	245	pci_write_reg:
242	cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?	246	cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use?
243	je pci_write_reg_2	247	je pci_write_reg_2
244		248
245	; mechanism 1	249	; mechanism 1
246	push esi ; save register size into ESI	250	push esi ; save register size into ESI
247	mov esi,eax	251	mov esi,eax
248	and esi,3	252	and esi,3
249		253
250	call pci_make_config_cmd	254	call pci_make_config_cmd
251	mov ebx,eax	255	mov ebx,eax
252	; get current state into ecx	256	; get current state into ecx
253	mov dx,0xcf8	257	mov dx,0xcf8
254	in eax, dx	258	in eax, dx
255	push eax	259	push eax
256	; set up addressing to config data	260	; set up addressing to config data
257	mov eax,ebx	261	mov eax,ebx
258	and al,0xfc ; make address dword-aligned	262	and al,0xfc ; make address dword-aligned
259	out dx,eax	263	out dx,eax
260	; write DWORD of config data	264	; write DWORD of config data
261	mov dl,0xfc	265	mov dl,0xfc
262	and bl,3	266	and bl,3
263	or dl,bl	267	or dl,bl
264	mov eax,ecx	268	mov eax,ecx
265		269
266	or esi,esi	270	or esi,esi
267	jz pci_write_byte1	271	jz pci_write_byte1
268	cmp esi,1	272	cmp esi,1
269	jz pci_write_word1	273	jz pci_write_word1
270	cmp esi,2	274	cmp esi,2
271	jz pci_write_dword1	275	jz pci_write_dword1
272	jmp pci_fin_write1	276	jmp pci_fin_write1
273		277
274	pci_write_byte1:	278	pci_write_byte1:
275	out dx,al	279	out dx,al
276	jmp pci_fin_write1	280	jmp pci_fin_write1
277	pci_write_word1:	281	pci_write_word1:
278	out dx,ax	282	out dx,ax
279	jmp pci_fin_write1	283	jmp pci_fin_write1
280	pci_write_dword1:	284	pci_write_dword1:
281	out dx,eax	285	out dx,eax
282	jmp pci_fin_write1	286	jmp pci_fin_write1
283	pci_fin_write1:	287	pci_fin_write1:
284		288
285	; restore configuration control	289	; restore configuration control
286	pop eax	290	pop eax
287	mov dl,0xf8	291	mov dl,0xf8
288	out dx,eax	292	out dx,eax
289		293
290	xor eax,eax	294	xor eax,eax
291	pop esi	295	pop esi
292		296
293	ret	297	ret
294	pci_write_reg_2:	298	pci_write_reg_2:
295		299
296	test bh,128 ;mech#2 only supports 16 devices per bus	300	test bh,128 ;mech#2 only supports 16 devices per bus
297	jnz pci_write_reg_err	301	jnz pci_write_reg_err
298		302
299		303
300	push esi ; save register size into ESI	304	push esi ; save register size into ESI
301	mov esi,eax	305	mov esi,eax
302	and esi,3	306	and esi,3
303		307
304	push eax	308	push eax
305	;store current state of config space	309	;store current state of config space
306	mov dx,0xcf8	310	mov dx,0xcf8
307	in al,dx	311	in al,dx
308	mov ah,al	312	mov ah,al
309	mov dl,0xfa	313	mov dl,0xfa
310	in al,dx	314	in al,dx
311	xchg eax,[esp]	315	xchg eax,[esp]
312	; out 0xcfa,bus	316	; out 0xcfa,bus
313	mov al,ah	317	mov al,ah
314	out dx,al	318	out dx,al
315	; out 0xcf8,0x80	319	; out 0xcf8,0x80
316	mov dl,0xf8	320	mov dl,0xf8
317	mov al,0x80	321	mov al,0x80
318	out dx,al	322	out dx,al
319	; compute addr	323	; compute addr
320	shr bh,3 ; func is ignored in mechanism 2	324	shr bh,3 ; func is ignored in mechanism 2
321	or bh,0xc0	325	or bh,0xc0
322	mov dx,bx	326	mov dx,bx
323	; write register	327	; write register
324	mov eax,ecx	328	mov eax,ecx
325		329
326	or esi,esi	330	or esi,esi
327	jz pci_write_byte2	331	jz pci_write_byte2
328	cmp esi,1	332	cmp esi,1
329	jz pci_write_word2	333	jz pci_write_word2
330	cmp esi,2	334	cmp esi,2
331	jz pci_write_dword2	335	jz pci_write_dword2
332	jmp pci_fin_write2	336	jmp pci_fin_write2
333		337
334	pci_write_byte2:	338	pci_write_byte2:
335	out dx,al	339	out dx,al
336	jmp pci_fin_write2	340	jmp pci_fin_write2
337	pci_write_word2:	341	pci_write_word2:
338	out dx,ax	342	out dx,ax
339	jmp pci_fin_write2	343	jmp pci_fin_write2
340	pci_write_dword2:	344	pci_write_dword2:
341	out dx,eax	345	out dx,eax
342	jmp pci_fin_write2	346	jmp pci_fin_write2
343	pci_fin_write2:	347	pci_fin_write2:
344	; restore configuration space	348	; restore configuration space
345	pop eax	349	pop eax
346	mov dx,0xcfa	350	mov dx,0xcfa
347	out dx,al	351	out dx,al
348	mov dl,0xf8	352	mov dl,0xf8
349	mov al,ah	353	mov al,ah
350	out dx,al	354	out dx,al
351		355
352	xor eax,eax	356	xor eax,eax
353	pop esi	357	pop esi
354	ret	358	ret
355		359
356	pci_write_reg_err:	360	pci_write_reg_err:
357	xor eax,eax	361	xor eax,eax
358	dec eax	362	dec eax
359	ret	363	ret

Subversion Repositories Kolibri OS

(root)/kernel/trunk/bus/pci/pci32.inc – Rev 425 → 431