WebSVN – Kolibri OS – Diff – /kernel/trunk/bus/pci/pci32.inc

 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;                                                              ;;
-;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;;
+;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
 ;; Distributed under terms of the GNU General Public License    ;;
 ;;                                                              ;;
 ;;                                                              ;;
 ;;  PCI32.INC                                                   ;;
 ;;                                                              ;;
 ;;                                                              ;;
 ;;  See file COPYING for details                                ;;
 ;;                                                              ;;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-$Revision: 1598 $
+$Revision: 1602 $
 ;***************************************************************************
 ;   Function
 ;mmio_pci_addr	equ  0x400		 ; set actual PCI address here to activate user-MMIO
 iglobal
 align 4
 f62call:
-	dd	pci_api.0
+	dd	pci_fn_0
-	dd	pci_api.1
+	dd	pci_fn_1
-	dd	pci_api.2
+	dd	pci_fn_2
-	dd	pci_api.not_support	;3
+	dd	pci_service_not_supported	;3
 	dd	pci_read_reg		;4 byte
 	dd	pci_read_reg            ;5 word
 	dd	pci_read_reg            ;6 dword
-	dd	pci_api.not_support     ;7
+	dd	pci_service_not_supported   ;7
 	dd	pci_write_reg           ;8 byte
 	dd	pci_write_reg           ;9 word
 	dd	pci_write_reg           ;10 dword
 if defined mmio_pci_addr
 	dd	pci_mmio_init		;11
 	dd	pci_mmio_map		;12
 	dd	pci_mmio_unmap		;13
-end if
-f62_rcall:
-	dd	pci_read_reg.0		;4 byte
-	dd	pci_read_reg.1		;5 word
-	dd	pci_read_reg.2		;6 dword
-f62_rcall2:
-	dd	pci_read_reg_2.0	;4 byte
-	dd	pci_read_reg_2.1	;5 word
-	dd	pci_read_reg_2.2	;6 dword
-f62_wcall:
-	dd	pci_write_reg.0		;4 byte
-	dd	pci_write_reg.1		;5 word
-	dd	pci_write_reg.2		;6 dword
-f62_wcall2:
-	dd	pci_write_reg_2.0	;4 byte
-	dd	pci_write_reg_2.1	;5 word
-	dd	pci_write_reg_2.2	;6 dword
+end if
 endg
+endg
 align 4
-pci_api:
+pci_api:
+	cmp  [pci_access_enabled],1
+	jne  pci_service_not_supported
+;cross
+	mov	eax,ebx
-        movzx	eax,bl
+	mov	ebx,ecx
-	cmp  [pci_access_enabled],1
+	mov	ecx,edx
-	jne  .no_pci_access_for_applications
+;;;;;;;;;;;;;;;;;;;
 if defined mmio_pci_addr
         cmp eax, 13
-        jb .not_support
+        jb pci_service_not_supported
+else
-else
+        cmp eax, 10
-        cmp eax, 10
+        jb pci_service_not_supported
-        jb .not_support
+end if
-end if
-        call dword [f62call+eax*4]
-        mov	dword [esp+32],eax
-        ret
+        call 	dword [f62call+eax*4]
         mov	dword [esp+32],eax
         ret
-;	or al,al
+;; ============================================
-;	jnz pci_fn_1
-	; PCI function 0: get pci version (AH.AL)
-.0:
-	movzx	eax, word [BOOT_VAR+0x9022]
-	ret
+pci_fn_0:
-;pci_fn_1:
+; PCI function 0: get pci version (AH.AL)
-;	cmp al,1
+	movzx eax,word [BOOT_VAR+0x9022]
-;	jnz pci_fn_2
+	ret
-	; PCI function 1: get last bus in AL
 .1:
-	movzx	eax, byte [BOOT_VAR+0x9021]
-	ret
+pci_fn_1:
 ; PCI function 1: get last bus in AL
-;pci_fn_2:
-;	cmp al,2
-;	jne pci_fn_3
-	; PCI function 2: get pci access mechanism
-.2:
-	movzx	eax, byte [BOOT_VAR+0x9020]
-	ret
-;pci_fn_3:
-;	cmp al,4
-;	jz pci_read_reg   ;byte
-;	cmp al,5
-;	jz pci_read_reg   ;word
-;	cmp al,6
-;	jz pci_read_reg   ;dword
-;	cmp al,8
-;	jz pci_write_reg  ;byte
-;	cmp al,9
-;	jz pci_write_reg  ;word
-;	cmp al,10
-;	jz pci_write_reg  ;dword
-;if defined mmio_pci_addr
-;	cmp al,11	    ;  user-level MMIO functions
+	mov al,[BOOT_VAR+0x9021]
-;	jz pci_mmio_init
-;	cmp al,12
+	ret
 ;	jz pci_mmio_map
-;	cmp al,13
+pci_fn_2:
-;	jz pci_mmio_unmap
+; PCI function 2: get pci access mechanism
-;end if
+	mov al,[BOOT_VAR+0x9020]
 	ret
 .not_support:
-.no_pci_access_for_applications:
+pci_service_not_supported:
-	or 	eax,-1
+	or eax,-1
 	ret
 ;***************************************************************************
 ;   Function
 ;      pci_make_config_cmd
+;
 ;   Description
 ;       creates a command dword  for use with the PCI bus
-;       bus # in bh;ah
+;       bus # in ah
-;       device+func in ch;bh (dddddfff)
+;       device+func in bh (dddddfff)
-;       register in cl;bl
+;       register in bl
+;
-;      command dword returned in ebx;eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
+;      command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
 ;***************************************************************************
 align 4
 pci_make_config_cmd:
-    shl     ebx,8;eax,8	   ; move bus to bits 16-23
+    shl     eax,8	   ; move bus to bits 16-23
-    mov     bx,cx;ax,bx	   ; combine all
+    mov     ax,bx	   ; combine all
-    and     ebx,0xffffff;eax,0xffffff
+    and     eax,0xffffff
-    or	    ebx,0x80000000;eax,0x80000000
+    or	    eax,0x80000000
     ret
 ;***************************************************************************
 ;   Function
 ;      pci_read_reg:
 ;
 ;   Description
 ;       read a register from the PCI config space into EAX/AX/AL
-;       IN: bh=bus,device+func=ch,register address=cl
+;       IN: ah=bus,device+func=bh,register address=bl
-;           number of bytes to read (1,2,4) coded into BL, bits 0-1
+;           number of bytes to read (1,2,4) coded into AL, bits 0-1
 ;           (0 - byte, 1 - word, 2 - dword)
 ;***************************************************************************
 align 4
 		; get requested DWORD of config data
 	mov	dl,0xfc
 	and	bl,3
 	or	dl,bl	 ; add to port address first 2 bits of register address
-;	or	esi,esi
+	or	esi,esi
-;	jz	pci_read_byte1
+	jz	pci_read_byte1
-;	cmp	esi,1
+	cmp	esi,1
-;	jz	pci_read_word1
+	jz	pci_read_word1
-;	cmp	esi,2
+	cmp	esi,2
-;	jz	pci_read_dword1
+	jz	pci_read_dword1
-;	jmp	pci_fin_read1
-	jmp	dword [f62_rcall+esi*4]
+	jmp	pci_fin_read1
-.0:
+pci_read_byte1:
 	in	al,dx
-	jmp .pci_fin_read1
+	jmp pci_fin_read1
-.1:
+pci_read_word1:
 	in	ax,dx
-	jmp .pci_fin_read1
+	jmp pci_fin_read1
-.2:
+pci_read_dword1:
 	in	eax,dx
-;	jmp	pci_fin_read1
+	jmp	pci_fin_read1
-.pci_fin_read1:
+pci_fin_read1:
 		; restore configuration control
 	xchg	eax,[esp]
 	mov	dx,0xcf8
 	out	dx,eax
 	pop	eax
-	;pop	esi
+	pop	esi
 	ret
 pci_read_reg_2:
-	test	ch,128;bh,128	;mech#2 only supports 16 devices per bus
+	test	bh,128	;mech#2 only supports 16 devices per bus
-	jnz	pci_api.not_support
+	jnz	pci_read_reg_err
 ;	push esi   ; save register size into ESI
-	mov esi,ebx;eax
+	push esi   ; save register size into ESI
-	and esi,3
+	mov esi,eax
 	and esi,3
 	push	ebx;eax
 		; out 0xcf8,0x80
 	mov	dl,0xf8
 	mov	al,0x80
 	out	dx,al
 		; compute addr
-	shr	ch,3;bh,3 ; func is ignored in mechanism 2
+	shr	bh,3 ; func is ignored in mechanism 2
-	or	ch,0xc0;bh,0xc0
+	or	bh,0xc0
-	mov	dx,cx;bx
+	mov	dx,bx
-;	or	esi,esi
-;	jz	pci_read_byte2
-;	cmp	esi,1
-;	jz	pci_read_word2
-;	cmp	esi,2
-;	jz	pci_read_dword2
-;	jmp	pci_fin_read2
-	jmp	dword [f62_rcall2+esi*4]
+	or	esi,esi
+	jz	pci_read_byte2
+	cmp	esi,1
+	jz	pci_read_word2
+	cmp	esi,2
+	jz	pci_read_dword2
+	jmp	pci_fin_read2
-.0:
+pci_read_byte2:
 	in	al,dx
-	jmp .pci_fin_read2
+	jmp pci_fin_read2
-.1:
+pci_read_word2:
 	in	ax,dx
-	jmp .pci_fin_read2
+	jmp pci_fin_read2
-.2:
+pci_read_dword2:
 	in	eax,dx
-;       jmp pci_fin_read2
+;       jmp pci_fin_read2
-.pci_fin_read2:
+pci_fin_read2:
 		; restore configuration space
 	xchg	eax,[esp]
 	mov	dx,0xcfa
 	out	dx,al
 	mov	dl,0xf8
 	mov	al,ah
 	out	dx,al
 	pop	eax
-;	pop	esi
+	pop	esi
+	ret
-	ret
 pci_read_reg_err:
-;pci_read_reg_err:
+	xor	eax,eax
-;	or 	dword [esp+32],-1
+	dec	eax
-;	ret
+	ret
 ;***************************************************************************
 ;   Function
 ;      pci_write_reg:
+;
 ;   Description
 ;       write a register from ECX/CX/CL into the PCI config space
-;       IN: bh=bus,device+func=ch,register address (dword aligned)=cl,
+;       IN: ah=bus,device+func=bh,register address (dword aligned)=bl,
-;           value to write in edx
+;           value to write in ecx
-;           number of bytes to write (1,2,4) coded into BL, bits 0-1
+;           number of bytes to write (1,2,4) coded into AL, bits 0-1
 ;           (0 - byte, 1 - word, 2 - dword)
 ;***************************************************************************
 align 4
 pci_write_reg:
-	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
-	je pci_write_reg_2
+	cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
 	je pci_write_reg_2
 		; mechanism 1
-;	push	esi   ; save register size into ESI
+		; mechanism 1
-	mov	esi,ebx;eax
+	push	esi   ; save register size into ESI
 	mov	dl,0xfc
 	and	bl,3
 	or	dl,bl
 	mov	eax,ecx
-;	or	esi,esi
+	or	esi,esi
-;	jz	pci_write_byte1
+	jz	pci_write_byte1
-;	cmp	esi,1
+	cmp	esi,1
-;	jz	pci_write_word1
+	jz	pci_write_word1
-;	cmp	esi,2
+	cmp	esi,2
-;	jz	pci_write_dword1
+	jz	pci_write_dword1
-;	jmp	pci_fin_write1
-	jmp	dword [f62_wcall+esi*4]
+	jmp	pci_fin_write1
-.0:
+pci_write_byte1:
 	out	dx,al
-	jmp .pci_fin_write1
+	jmp pci_fin_write1
-.1:
+pci_write_word1:
 	out	dx,ax
-	jmp .pci_fin_write1
+	jmp pci_fin_write1
-.2:
+pci_write_dword1:
+	out	dx,eax
-	out	dx,eax
+	jmp	pci_fin_write1
-.pci_fin_write1:
+pci_fin_write1:
 		; restore configuration control
 	pop	eax
 	mov	dl,0xf8
 	out	dx,eax
 	xor	eax,eax
-	xor	eax,eax
+	pop	esi
-	;pop	esi
 	ret
 pci_write_reg_2:
-	test	ch,128;bh,128	;mech#2 only supports 16 devices per bus
+	test	bh,128	;mech#2 only supports 16 devices per bus
-	jnz	pci_api.not_support
+	jnz	pci_write_reg_err
 ;	push esi   ; save register size into ESI
-	mov esi,eax
+	push esi   ; save register size into ESI
-	and esi,3	;not need
+	mov esi,eax
 	and esi,3
 	or	bh,0xc0
 	mov	dx,bx
 		; write register
 	mov	eax,ecx
-;	or	esi,esi
+	or	esi,esi
-;	jz	pci_write_byte2
+	jz	pci_write_byte2
-;	cmp	esi,1
+	cmp	esi,1
-;	jz	pci_write_word2
+	jz	pci_write_word2
-;	cmp	esi,2
+	cmp	esi,2
-;	jz	pci_write_dword2
+	jz	pci_write_dword2
-;	jmp	pci_fin_write2
-	jmp	dword [f62_wcall2+esi*4]
+	jmp	pci_fin_write2
-.0:
+pci_write_byte2:
 	out	dx,al
-	jmp .pci_fin_write2
+	jmp pci_fin_write2
-.1:
+pci_write_word2:
 	out	dx,ax
-	jmp .pci_fin_write2
+	jmp pci_fin_write2
-.2:
+pci_write_dword2:
+	out	dx,eax
-	out	dx,eax
+	jmp	pci_fin_write2
-.pci_fin_write2:
+pci_fin_write2:
 		; restore configuration space
 	pop	eax
 	mov	dx,0xcfa
 	out	dx,al
 	mov	dl,0xf8
 	mov	al,ah
 	out	dx,al
 	xor	eax,eax
-	;pop	esi
+	pop	esi
 	ret
-;pci_write_reg_err:
+pci_write_reg_err:
-;	xor	eax,eax
+	xor	eax,eax
-;	dec	eax
+	dec	eax
-;	ret
+	ret
 if defined mmio_pci_addr	; must be set above
 ;***************************************************************************
 ;   Function
 ;      pci_mmio_init
+;
 ;   Description
-;       IN:  cx = device's PCI bus address (bbbbbbbbdddddfff)
+;       IN:  bx = device's PCI bus address (bbbbbbbbdddddfff)
 ;   Returns  eax = user heap space available (bytes)
 ;   Error codes
 ;       eax = -1 : PCI user access blocked,
 ;       eax = -2 : device not registered for uMMIO service
 ;       eax = -3 : user heap initialization failure
 ;***************************************************************************
 pci_mmio_init:
-    cmp     cx, mmio_pci_addr
+    cmp     bx, mmio_pci_addr
     jz	    @f
 ;       maps a block of PCI memory to user-accessible linear address
+;
 ;       WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only!
 ;       The target device address should be set in kernel var mmio_pci_addr
+;
-;       IN:  bh = BAR#;
+;       IN:  ah = BAR#;
-;       IN: ecx = block size (bytes);
+;       IN: ebx = block size (bytes);
-;       IN: edx = offset in MMIO block (in 4K-pages, to avoid misaligned pages);
+;       IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages);
+;
 ;   Returns eax = MMIO block's linear address in the userspace (if no error)
+;
+;
 ;   Error codes
 ;       eax = -5 : dynamic userspace allocation problem
 ;***************************************************************************
 pci_mmio_map:
     and     edx,0x0ffff
-    cmp     bh, 6
+    cmp     ah,6
     jc     .bar_0_5
     jz     .bar_rom
     mov     eax,-2
     ret
 .bar_rom:
     mov    ah, 8	; bar6 = Expansion ROM base address
-.bar_0_5:
-    push    edx
-    add     ecx, 4095
-    and     ecx, 0xFFFFF000	; 4k-alignment
+.bar_0_5:
+    push    ecx
+    add     ebx, 4095
+    and     ebx,-4096
-    push    ecx
+    push    ebx
-    mov     cl, bh	; cl = BAR# (0..5), however cl=8 for BAR6
+    mov     bl, ah	; bl = BAR# (0..5), however bl=8 for BAR6
-    shl     cl, 1
+    shl     bl, 1
-    shl     cl, 1
+    shl     bl, 1
-    add     cl, 0x10	; now cl = BAR offset in PCI config. space
+    add     bl, 0x10	; now bl = BAR offset in PCI config. space
     mov     ax, mmio_pci_addr
-    mov     ch, al	; ch = dddddfff
+    mov     bh, al	; bh = dddddfff
-    mov     bl, 2		; bl : DW to read
+    mov     al, 2	; al : DW to read
-    call    pci_read_reg	; new call
+    call    pci_read_reg
     or	    eax, eax
     jnz     @f
     mov     eax,-3	; empty I/O space
     jmp     mmio_ret_fail
     mov     eax,-4	; damned ports (not MMIO space)
     jmp     mmio_ret_fail
 @@:
-    pop     ecx 		; ecx = block size, bytes (expanded to whole page)
+    pop     ecx 	; ecx = block size, bytes (expanded to whole page)
     mov     ebx, ecx	; user_alloc destroys eax, ecx, edx, but saves ebx
-    and     al, 0xF0	; clear flags
+    and     eax, 0xFFFFFFF0
     push    eax 	      ; store MMIO physical address + keep 2DWords in the stack
     stdcall user_alloc, ecx
-    or	eax, eax
+    or	    eax, eax
     jnz     mmio_map_over
     mov     eax,-5	; problem with page allocation
     mov     ebx, eax	; ebx = linear address
-    pop     eax 		; eax = MMIO start
+    pop     eax 	; eax = MMIO start
-    pop     edx 		; edx = MMIO shift (pages)
+    pop     edx 	; edx = MMIO shift (pages)
     shl     edx, 12	; edx = MMIO shift (bytes)
     add     eax, edx	; eax = uMMIO physical address
+    or	    eax, PG_SHARED
+    or	    eax, PG_UW
-    or	eax, PG_SHARED+PG_UW+PG_NOCACHE
+    or	    eax, PG_NOCACHE
     mov     edi, ebx
     call    commit_pages
     mov     eax, edi
     ret
 ;       eax = -1 if no user PCI access allowed,
 ;       eax =  0 if unmapping failed
 ;***************************************************************************
 pci_mmio_unmap:
-    stdcall user_free, ecx;ebx
+    stdcall user_free, ebx
     ret
 	je	..dev_not_found
 	add	esi, 10
 	jmp	..nxt2
-.not_FIND_PCI_CLASS_CODE:
-	mov	edx, ecx
+.not_FIND_PCI_CLASS_CODE:
 	cmp	ebp, 8			; READ_CONFIG_*
 	jb	.not_READ_CONFIG
 	cmp	ebp, 0x0A
 	ja	.not_READ_CONFIG
-	mov	eax, ebp	; -- ??
+	mov	eax, ebp
-;	mov	ah, bh	; bus
+	mov	ah, bh
-	mov	ecx, edi
+	mov	edx, edi
-	mov	ch, bl	; dev+fn
+	mov	bh, bl
-;	mov	cl, dl	; reg#
+	mov	bl, dl
 	call	pci_read_reg
-	mov	edx, eax
+	mov	ecx, eax
 	xor	ah, ah			; SUCCESSFUL
 	jmp	.return_abc
 .not_READ_CONFIG:
 	cmp	ebp, 0x0B		; WRITE_CONFIG_*
 	jb	.not_WRITE_CONFIG
 	cmp	ebp, 0x0D
 	ja	.not_WRITE_CONFIG
 	lea	eax, [ebp+1]
-;	mov	ah, bh	; bus
+	mov	ah, bh
-	mov	ecx, edi
+	mov	edx, edi
-	mov	ch, bl
+	mov	bh, bl
-;	mov	cl, dl
+	mov	bl, dl
 	call	pci_write_reg
 	xor	ah, ah			; SUCCESSFUL
 	jmp	.return_abc
 .not_WRITE_CONFIG:

Subversion Repositories Kolibri OS

(root)/kernel/trunk/bus/pci/pci32.inc – Rev 1598 → 1602