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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;; RTL8169 driver for KolibriOS ;; |
6 | ;; RTL8169 driver for KolibriOS ;; |
7 | ;; ;; |
7 | ;; ;; |
8 | ;; Copyright 2007 mike.dld, ;; |
8 | ;; Copyright 2007 mike.dld, ;; |
9 | ;; mike.dld@gmail.com ;; |
9 | ;; mike.dld@gmail.com ;; |
10 | ;; ;; |
10 | ;; ;; |
11 | ;; Version 0.1 11 February 2007 ;; |
11 | ;; Version 0.1 11 February 2007 ;; |
12 | ;; Version 0.2 3 August 2010 - port to net branch by hidnplayr ;; |
12 | ;; Version 0.2 3 August 2010 - port to net branch by hidnplayr ;; |
13 | ;; Version 0.3 31 Januari 2011 - bugfixes by hidnplayr ;; |
13 | ;; Version 0.3 31 Januari 2011 - bugfixes by hidnplayr ;; |
14 | ;; ;; |
14 | ;; ;; |
15 | ;; References: ;; |
15 | ;; References: ;; |
16 | ;; r8169.c - linux driver (etherboot project) ;; |
16 | ;; r8169.c - linux driver (etherboot project) ;; |
17 | ;; ;; |
17 | ;; ;; |
18 | ;; GNU GENERAL PUBLIC LICENSE ;; |
18 | ;; GNU GENERAL PUBLIC LICENSE ;; |
19 | ;; Version 2, June 1991 ;; |
19 | ;; Version 2, June 1991 ;; |
20 | ;; ;; |
20 | ;; ;; |
21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
22 | 22 | ||
23 | format MS COFF |
23 | format MS COFF |
24 | 24 | ||
25 | API_VERSION = 0x01000100 |
25 | API_VERSION = 0x01000100 |
26 | DRIVER_VERSION = 5 |
26 | DRIVER_VERSION = 5 |
27 | 27 | ||
28 | MAX_DEVICES = 16 |
28 | MAX_DEVICES = 16 |
29 | 29 | ||
30 | DEBUG = 1 |
30 | DEBUG = 1 |
31 | __DEBUG__ = 1 |
31 | __DEBUG__ = 1 |
32 | __DEBUG_LEVEL__ = 1 |
32 | __DEBUG_LEVEL__ = 1 |
33 | 33 | ||
34 | NUM_TX_DESC = 4 |
34 | NUM_TX_DESC = 4 |
35 | NUM_RX_DESC = 4 |
35 | NUM_RX_DESC = 4 |
36 | 36 | ||
37 | include 'proc32.inc' |
37 | include 'proc32.inc' |
38 | include 'imports.inc' |
38 | include 'imports.inc' |
39 | include 'fdo.inc' |
39 | include 'fdo.inc' |
40 | include 'netdrv.inc' |
40 | include 'netdrv.inc' |
41 | 41 | ||
42 | public START |
42 | public START |
43 | public service_proc |
43 | public service_proc |
44 | public version |
44 | public version |
45 | 45 | ||
46 | 46 | ||
47 | REG_MAC0 = 0x0 ; Ethernet hardware address |
47 | REG_MAC0 = 0x0 ; Ethernet hardware address |
48 | REG_MAR0 = 0x8 ; Multicast filter |
48 | REG_MAR0 = 0x8 ; Multicast filter |
49 | REG_TxDescStartAddr = 0x20 |
49 | REG_TxDescStartAddr = 0x20 |
50 | REG_TxHDescStartAddr = 0x28 |
50 | REG_TxHDescStartAddr = 0x28 |
51 | REG_FLASH = 0x30 |
51 | REG_FLASH = 0x30 |
52 | REG_ERSR = 0x36 |
52 | REG_ERSR = 0x36 |
53 | REG_ChipCmd = 0x37 |
53 | REG_ChipCmd = 0x37 |
54 | REG_TxPoll = 0x38 |
54 | REG_TxPoll = 0x38 |
55 | REG_IntrMask = 0x3C |
55 | REG_IntrMask = 0x3C |
56 | REG_IntrStatus = 0x3E |
56 | REG_IntrStatus = 0x3E |
57 | REG_TxConfig = 0x40 |
57 | REG_TxConfig = 0x40 |
58 | REG_RxConfig = 0x44 |
58 | REG_RxConfig = 0x44 |
59 | REG_RxMissed = 0x4C |
59 | REG_RxMissed = 0x4C |
60 | REG_Cfg9346 = 0x50 |
60 | REG_Cfg9346 = 0x50 |
61 | REG_Config0 = 0x51 |
61 | REG_Config0 = 0x51 |
62 | REG_Config1 = 0x52 |
62 | REG_Config1 = 0x52 |
63 | REG_Config2 = 0x53 |
63 | REG_Config2 = 0x53 |
64 | REG_Config3 = 0x54 |
64 | REG_Config3 = 0x54 |
65 | REG_Config4 = 0x55 |
65 | REG_Config4 = 0x55 |
66 | REG_Config5 = 0x56 |
66 | REG_Config5 = 0x56 |
67 | REG_MultiIntr = 0x5C |
67 | REG_MultiIntr = 0x5C |
68 | REG_PHYAR = 0x60 |
68 | REG_PHYAR = 0x60 |
69 | REG_TBICSR = 0x64 |
69 | REG_TBICSR = 0x64 |
70 | REG_TBI_ANAR = 0x68 |
70 | REG_TBI_ANAR = 0x68 |
71 | REG_TBI_LPAR = 0x6A |
71 | REG_TBI_LPAR = 0x6A |
72 | REG_PHYstatus = 0x6C |
72 | REG_PHYstatus = 0x6C |
73 | REG_RxMaxSize = 0xDA |
73 | REG_RxMaxSize = 0xDA |
74 | REG_CPlusCmd = 0xE0 |
74 | REG_CPlusCmd = 0xE0 |
75 | REG_RxDescStartAddr = 0xE4 |
75 | REG_RxDescStartAddr = 0xE4 |
76 | REG_ETThReg = 0xEC |
76 | REG_ETThReg = 0xEC |
77 | REG_FuncEvent = 0xF0 |
77 | REG_FuncEvent = 0xF0 |
78 | REG_FuncEventMask = 0xF4 |
78 | REG_FuncEventMask = 0xF4 |
79 | REG_FuncPresetState = 0xF8 |
79 | REG_FuncPresetState = 0xF8 |
80 | REG_FuncForceEvent = 0xFC |
80 | REG_FuncForceEvent = 0xFC |
81 | 81 | ||
82 | ; InterruptStatusBits |
82 | ; InterruptStatusBits |
83 | ISB_SYSErr = 0x8000 |
83 | ISB_SYSErr = 0x8000 |
84 | ISB_PCSTimeout = 0x4000 |
84 | ISB_PCSTimeout = 0x4000 |
85 | ISB_SWInt = 0x0100 |
85 | ISB_SWInt = 0x0100 |
86 | ISB_TxDescUnavail = 0x80 |
86 | ISB_TxDescUnavail = 0x80 |
87 | ISB_RxFIFOOver = 0x40 |
87 | ISB_RxFIFOOver = 0x40 |
88 | ISB_LinkChg = 0x20 |
88 | ISB_LinkChg = 0x20 |
89 | ISB_RxOverflow = 0x10 |
89 | ISB_RxOverflow = 0x10 |
90 | ISB_TxErr = 0x08 |
90 | ISB_TxErr = 0x08 |
91 | ISB_TxOK = 0x04 |
91 | ISB_TxOK = 0x04 |
92 | ISB_RxErr = 0x02 |
92 | ISB_RxErr = 0x02 |
93 | ISB_RxOK = 0x01 |
93 | ISB_RxOK = 0x01 |
94 | 94 | ||
95 | ; RxStatusDesc |
95 | ; RxStatusDesc |
96 | SD_RxRES = 0x00200000 |
96 | SD_RxRES = 0x00200000 |
97 | SD_RxCRC = 0x00080000 |
97 | SD_RxCRC = 0x00080000 |
98 | SD_RxRUNT = 0x00100000 |
98 | SD_RxRUNT = 0x00100000 |
99 | SD_RxRWT = 0x00400000 |
99 | SD_RxRWT = 0x00400000 |
100 | 100 | ||
101 | ; ChipCmdBits |
101 | ; ChipCmdBits |
102 | CMD_Reset = 0x10 |
102 | CMD_Reset = 0x10 |
103 | CMD_RxEnb = 0x08 |
103 | CMD_RxEnb = 0x08 |
104 | CMD_TxEnb = 0x04 |
104 | CMD_TxEnb = 0x04 |
105 | CMD_RxBufEmpty = 0x01 |
105 | CMD_RxBufEmpty = 0x01 |
106 | 106 | ||
107 | ; Cfg9346Bits |
107 | ; Cfg9346Bits |
108 | CFG_9346_Lock = 0x00 |
108 | CFG_9346_Lock = 0x00 |
109 | CFG_9346_Unlock = 0xC0 |
109 | CFG_9346_Unlock = 0xC0 |
110 | 110 | ||
111 | ; rx_mode_bits |
111 | ; rx_mode_bits |
112 | RXM_AcceptErr = 0x20 |
112 | RXM_AcceptErr = 0x20 |
113 | RXM_AcceptRunt = 0x10 |
113 | RXM_AcceptRunt = 0x10 |
114 | RXM_AcceptBroadcast = 0x08 |
114 | RXM_AcceptBroadcast = 0x08 |
115 | RXM_AcceptMulticast = 0x04 |
115 | RXM_AcceptMulticast = 0x04 |
116 | RXM_AcceptMyPhys = 0x02 |
116 | RXM_AcceptMyPhys = 0x02 |
117 | RXM_AcceptAllPhys = 0x01 |
117 | RXM_AcceptAllPhys = 0x01 |
118 | 118 | ||
119 | ; RxConfigBits |
119 | ; RxConfigBits |
120 | RXC_FIFOShift = 13 |
120 | RXC_FIFOShift = 13 |
121 | RXC_DMAShift = 8 |
121 | RXC_DMAShift = 8 |
122 | 122 | ||
123 | ; TxConfigBits |
123 | ; TxConfigBits |
124 | TXC_InterFrameGapShift = 24 |
124 | TXC_InterFrameGapShift = 24 |
125 | TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits |
125 | TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits |
126 | 126 | ||
127 | ; PHYstatus |
127 | ; PHYstatus |
128 | PHYS_TBI_Enable = 0x80 |
128 | PHYS_TBI_Enable = 0x80 |
129 | PHYS_TxFlowCtrl = 0x40 |
129 | PHYS_TxFlowCtrl = 0x40 |
130 | PHYS_RxFlowCtrl = 0x20 |
130 | PHYS_RxFlowCtrl = 0x20 |
131 | PHYS_1000bpsF = 0x10 |
131 | PHYS_1000bpsF = 0x10 |
132 | PHYS_100bps = 0x08 |
132 | PHYS_100bps = 0x08 |
133 | PHYS_10bps = 0x04 |
133 | PHYS_10bps = 0x04 |
134 | PHYS_LinkStatus = 0x02 |
134 | PHYS_LinkStatus = 0x02 |
135 | PHYS_FullDup = 0x01 |
135 | PHYS_FullDup = 0x01 |
136 | 136 | ||
137 | ; GIGABIT_PHY_registers |
137 | ; GIGABIT_PHY_registers |
138 | PHY_CTRL_REG = 0 |
138 | PHY_CTRL_REG = 0 |
139 | PHY_STAT_REG = 1 |
139 | PHY_STAT_REG = 1 |
140 | PHY_AUTO_NEGO_REG = 4 |
140 | PHY_AUTO_NEGO_REG = 4 |
141 | PHY_1000_CTRL_REG = 9 |
141 | PHY_1000_CTRL_REG = 9 |
142 | 142 | ||
143 | ; GIGABIT_PHY_REG_BIT |
143 | ; GIGABIT_PHY_REG_BIT |
144 | PHY_Restart_Auto_Nego = 0x0200 |
144 | PHY_Restart_Auto_Nego = 0x0200 |
145 | PHY_Enable_Auto_Nego = 0x1000 |
145 | PHY_Enable_Auto_Nego = 0x1000 |
146 | 146 | ||
147 | ; PHY_STAT_REG = 1 |
147 | ; PHY_STAT_REG = 1 |
148 | PHY_Auto_Neco_Comp = 0x0020 |
148 | PHY_Auto_Neco_Comp = 0x0020 |
149 | 149 | ||
150 | ; PHY_AUTO_NEGO_REG = 4 |
150 | ; PHY_AUTO_NEGO_REG = 4 |
151 | PHY_Cap_10_Half = 0x0020 |
151 | PHY_Cap_10_Half = 0x0020 |
152 | PHY_Cap_10_Full = 0x0040 |
152 | PHY_Cap_10_Full = 0x0040 |
153 | PHY_Cap_100_Half = 0x0080 |
153 | PHY_Cap_100_Half = 0x0080 |
154 | PHY_Cap_100_Full = 0x0100 |
154 | PHY_Cap_100_Full = 0x0100 |
155 | 155 | ||
156 | ; PHY_1000_CTRL_REG = 9 |
156 | ; PHY_1000_CTRL_REG = 9 |
157 | PHY_Cap_1000_Full = 0x0200 |
157 | PHY_Cap_1000_Full = 0x0200 |
158 | PHY_Cap_1000_Half = 0x0100 |
158 | PHY_Cap_1000_Half = 0x0100 |
159 | 159 | ||
160 | PHY_Cap_PAUSE = 0x0400 |
160 | PHY_Cap_PAUSE = 0x0400 |
161 | PHY_Cap_ASYM_PAUSE = 0x0800 |
161 | PHY_Cap_ASYM_PAUSE = 0x0800 |
162 | 162 | ||
163 | PHY_Cap_Null = 0x0 |
163 | PHY_Cap_Null = 0x0 |
164 | 164 | ||
165 | ; _MediaType |
165 | ; _MediaType |
166 | MT_10_Half = 0x01 |
166 | MT_10_Half = 0x01 |
167 | MT_10_Full = 0x02 |
167 | MT_10_Full = 0x02 |
168 | MT_100_Half = 0x04 |
168 | MT_100_Half = 0x04 |
169 | MT_100_Full = 0x08 |
169 | MT_100_Full = 0x08 |
170 | MT_1000_Full = 0x10 |
170 | MT_1000_Full = 0x10 |
171 | 171 | ||
172 | ; _TBICSRBit |
172 | ; _TBICSRBit |
173 | TBI_LinkOK = 0x02000000 |
173 | TBI_LinkOK = 0x02000000 |
174 | 174 | ||
175 | ; _DescStatusBit |
175 | ; _DescStatusBit |
176 | DSB_OWNbit = 0x80000000 |
176 | DSB_OWNbit = 0x80000000 |
177 | DSB_EORbit = 0x40000000 |
177 | DSB_EORbit = 0x40000000 |
178 | DSB_FSbit = 0x20000000 |
178 | DSB_FSbit = 0x20000000 |
179 | DSB_LSbit = 0x10000000 |
179 | DSB_LSbit = 0x10000000 |
180 | 180 | ||
181 | RX_BUF_SIZE = 1536 ; Rx Buffer size |
181 | RX_BUF_SIZE = 1536 ; Rx Buffer size |
182 | 182 | ||
183 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
183 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
184 | MAX_ETH_FRAME_SIZE = 1536 |
184 | MAX_ETH_FRAME_SIZE = 1536 |
185 | 185 | ||
186 | TX_FIFO_THRESH = 256 ; In bytes |
186 | TX_FIFO_THRESH = 256 ; In bytes |
187 | 187 | ||
188 | RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
188 | RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
189 | RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
189 | RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
190 | TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
190 | TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
191 | ETTh = 0x3F ; 0x3F means NO threshold |
191 | ETTh = 0x3F ; 0x3F means NO threshold |
192 | 192 | ||
193 | EarlyTxThld = 0x3F ; 0x3F means NO early transmit |
193 | EarlyTxThld = 0x3F ; 0x3F means NO early transmit |
194 | RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1 |
194 | RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1 |
195 | InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one |
195 | InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one |
196 | 196 | ||
197 | HZ = 1000 |
197 | HZ = 1000 |
198 | 198 | ||
199 | RTL_MIN_IO_SIZE = 0x80 |
199 | RTL_MIN_IO_SIZE = 0x80 |
200 | TX_TIMEOUT = (6*HZ) |
200 | TX_TIMEOUT = (6*HZ) |
201 | 201 | ||
202 | TIMER_EXPIRE_TIME = 100 |
202 | TIMER_EXPIRE_TIME = 100 |
203 | 203 | ||
204 | ETH_HDR_LEN = 14 |
204 | ETH_HDR_LEN = 14 |
205 | DEFAULT_MTU = 1500 |
205 | DEFAULT_MTU = 1500 |
206 | DEFAULT_RX_BUF_LEN = 1536 |
206 | DEFAULT_RX_BUF_LEN = 1536 |
207 | 207 | ||
208 | 208 | ||
209 | ;ifdef JUMBO_FRAME_SUPPORT |
209 | ;ifdef JUMBO_FRAME_SUPPORT |
210 | ; MAX_JUMBO_FRAME_MTU = 10000 |
210 | ; MAX_JUMBO_FRAME_MTU = 10000 |
211 | ; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
211 | ; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
212 | ;else |
212 | ;else |
213 | MAX_RX_SKBDATA_SIZE = 1600 |
213 | MAX_RX_SKBDATA_SIZE = 1600 |
214 | ;end if |
214 | ;end if |
215 | 215 | ||
216 | MCFG_METHOD_01 = 0x01 |
216 | MCFG_METHOD_01 = 0x01 |
217 | MCFG_METHOD_02 = 0x02 |
217 | MCFG_METHOD_02 = 0x02 |
218 | MCFG_METHOD_03 = 0x03 |
218 | MCFG_METHOD_03 = 0x03 |
219 | MCFG_METHOD_04 = 0x04 |
219 | MCFG_METHOD_04 = 0x04 |
220 | MCFG_METHOD_05 = 0x05 |
220 | MCFG_METHOD_05 = 0x05 |
221 | MCFG_METHOD_11 = 0x0b |
221 | MCFG_METHOD_11 = 0x0b |
222 | MCFG_METHOD_12 = 0x0c |
222 | MCFG_METHOD_12 = 0x0c |
223 | MCFG_METHOD_13 = 0x0d |
223 | MCFG_METHOD_13 = 0x0d |
224 | MCFG_METHOD_14 = 0x0e |
224 | MCFG_METHOD_14 = 0x0e |
225 | MCFG_METHOD_15 = 0x0f |
225 | MCFG_METHOD_15 = 0x0f |
226 | 226 | ||
227 | PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
227 | PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
228 | PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
228 | PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
229 | PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
229 | PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
230 | 230 | ||
231 | virtual at 0 |
231 | virtual at 0 |
232 | tx_desc: |
232 | tx_desc: |
233 | .status dd ? |
233 | .status dd ? |
234 | .vlan_tag dd ? |
234 | .vlan_tag dd ? |
235 | .buf_addr dq ? |
235 | .buf_addr dq ? |
236 | .size = $ |
236 | .size = $ |
237 | rb (NUM_TX_DESC-1)*tx_desc.size |
237 | rb (NUM_TX_DESC-1)*tx_desc.size |
238 | .buf_soft_addr dd ? |
238 | .buf_soft_addr dd ? |
239 | end virtual |
239 | end virtual |
240 | 240 | ||
241 | virtual at 0 |
241 | virtual at 0 |
242 | rx_desc: |
242 | rx_desc: |
243 | .status dd ? |
243 | .status dd ? |
244 | .vlan_tag dd ? |
244 | .vlan_tag dd ? |
245 | .buf_addr dq ? |
245 | .buf_addr dq ? |
246 | .size = $ |
246 | .size = $ |
247 | rb (NUM_RX_DESC-1)*rx_desc.size |
247 | rb (NUM_RX_DESC-1)*rx_desc.size |
248 | .buf_soft_addr dd ? |
248 | .buf_soft_addr dd ? |
249 | end virtual |
249 | end virtual |
250 | 250 | ||
251 | virtual at ebx |
251 | virtual at ebx |
252 | 252 | ||
253 | device: |
253 | device: |
254 | 254 | ||
255 | ETH_DEVICE |
255 | ETH_DEVICE |
256 | 256 | ||
257 | .io_addr dd ? |
257 | .io_addr dd ? |
258 | .pci_bus db ? |
258 | .pci_bus db ? |
259 | .pci_dev db ? |
259 | .pci_dev db ? |
260 | .irq_line db ? |
260 | .irq_line db ? |
261 | 261 | ||
262 | rb 256-(($ - device) and 255) ; align 256 |
262 | rb 256-(($ - device) and 255) ; align 256 |
263 | .tx_ring rb NUM_TX_DESC * tx_desc.size * 2 |
263 | .tx_ring rb NUM_TX_DESC * tx_desc.size * 2 |
264 | 264 | ||
265 | rb 256-(($ - device) and 255) ; align 256 |
265 | rb 256-(($ - device) and 255) ; align 256 |
266 | .rx_ring rb NUM_RX_DESC * rx_desc.size * 2 |
266 | .rx_ring rb NUM_RX_DESC * rx_desc.size * 2 |
267 | 267 | ||
268 | tpc: |
268 | tpc: |
269 | .mmio_addr dd ? ; memory map physical address |
269 | .mmio_addr dd ? ; memory map physical address |
270 | .chipset dd ? |
270 | .chipset dd ? |
271 | .pcfg dd ? |
271 | .pcfg dd ? |
272 | .mcfg dd ? |
272 | .mcfg dd ? |
273 | .cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
273 | .cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
274 | .cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
274 | .cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
275 | .TxDescArrays dd ? ; Index of Tx Descriptor buffer |
275 | .TxDescArrays dd ? ; Index of Tx Descriptor buffer |
276 | .RxDescArrays dd ? ; Index of Rx Descriptor buffer |
276 | .RxDescArrays dd ? ; Index of Rx Descriptor buffer |
277 | .TxDescArray dd ? ; Index of 256-alignment Tx Descriptor buffer |
277 | .TxDescArray dd ? ; Index of 256-alignment Tx Descriptor buffer |
278 | .RxDescArray dd ? ; Index of 256-alignment Rx Descriptor buffer |
278 | .RxDescArray dd ? ; Index of 256-alignment Rx Descriptor buffer |
279 | 279 | ||
280 | device_size = $ - device |
280 | device_size = $ - device |
281 | 281 | ||
282 | end virtual |
282 | end virtual |
283 | 283 | ||
284 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
284 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
285 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
285 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
286 | 286 | ||
287 | 287 | ||
288 | macro udelay msec { |
288 | macro udelay msec { |
289 | 289 | ||
290 | push esi |
290 | push esi |
291 | mov esi, msec |
291 | mov esi, msec |
292 | call Sleep |
292 | call Sleep |
293 | pop esi |
293 | pop esi |
294 | 294 | ||
295 | } |
295 | } |
296 | 296 | ||
297 | macro WRITE_GMII_REG RegAddr, value { |
297 | macro WRITE_GMII_REG RegAddr, value { |
298 | 298 | ||
299 | set_io REG_PHYAR |
299 | set_io REG_PHYAR |
300 | if value eq ax |
300 | if value eq ax |
301 | and eax, 0x0000ffff |
301 | and eax, 0x0000ffff |
302 | or eax, 0x80000000 + (RegAddr shl 16) |
302 | or eax, 0x80000000 + (RegAddr shl 16) |
303 | else |
303 | else |
304 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
304 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
305 | end if |
305 | end if |
306 | out dx, eax |
306 | out dx, eax |
307 | 307 | ||
308 | call PHY_WAIT_WRITE |
308 | call PHY_WAIT_WRITE |
309 | } |
309 | } |
310 | 310 | ||
311 | macro READ_GMII_REG RegAddr { |
311 | macro READ_GMII_REG RegAddr { |
312 | 312 | ||
313 | local .error, .done |
313 | local .error, .done |
314 | 314 | ||
315 | set_io REG_PHYAR |
315 | set_io REG_PHYAR |
316 | mov eax, RegAddr shl 16 |
316 | mov eax, RegAddr shl 16 |
317 | out dx, eax |
317 | out dx, eax |
318 | 318 | ||
319 | call PHY_WAIT_READ |
319 | call PHY_WAIT_READ |
320 | jz .error |
320 | jz .error |
321 | 321 | ||
322 | in eax, dx |
322 | in eax, dx |
323 | and eax, 0xFFFF |
323 | and eax, 0xFFFF |
324 | jmp .done |
324 | jmp .done |
325 | 325 | ||
326 | .error: |
326 | .error: |
327 | or eax, -1 |
327 | or eax, -1 |
328 | .done: |
328 | .done: |
329 | } |
329 | } |
330 | 330 | ||
331 | align 4 |
331 | align 4 |
332 | PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR |
332 | PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR |
333 | 333 | ||
334 | udelay 1 ;;;1000 |
334 | udelay 1 ;;;1000 |
335 | 335 | ||
336 | push ecx |
336 | push ecx |
337 | mov ecx, 2000 |
337 | mov ecx, 2000 |
338 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
338 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
339 | @@: |
339 | @@: |
340 | in eax, dx |
340 | in eax, dx |
341 | test eax, 0x80000000 |
341 | test eax, 0x80000000 |
342 | jnz .exit |
342 | jnz .exit |
343 | udelay 1 ;;;100 |
343 | udelay 1 ;;;100 |
344 | loop @b |
344 | loop @b |
345 | .exit: |
345 | .exit: |
346 | pop ecx |
346 | pop ecx |
347 | ret |
347 | ret |
348 | 348 | ||
349 | align 4 |
349 | align 4 |
350 | PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR |
350 | PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR |
351 | 351 | ||
352 | udelay 1 ;;;1000 |
352 | udelay 1 ;;;1000 |
353 | 353 | ||
354 | push ecx |
354 | push ecx |
355 | mov ecx, 2000 |
355 | mov ecx, 2000 |
356 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
356 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
357 | @@: |
357 | @@: |
358 | in eax, dx |
358 | in eax, dx |
359 | test eax, 0x80000000 |
359 | test eax, 0x80000000 |
360 | jz .exit |
360 | jz .exit |
361 | udelay 1 ;;;100 |
361 | udelay 1 ;;;100 |
362 | loop @b |
362 | loop @b |
363 | .exit: |
363 | .exit: |
364 | pop ecx |
364 | pop ecx |
365 | ret |
365 | ret |
366 | 366 | ||
367 | 367 | ||
368 | 368 | ||
369 | section '.flat' code readable align 16 |
369 | section '.flat' code readable align 16 |
370 | 370 | ||
371 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
371 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
372 | ;; ;; |
372 | ;; ;; |
373 | ;; proc START ;; |
373 | ;; proc START ;; |
374 | ;; ;; |
374 | ;; ;; |
375 | ;; (standard driver proc) ;; |
375 | ;; (standard driver proc) ;; |
376 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
376 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
377 | 377 | ||
378 | align 4 |
378 | align 4 |
379 | proc START stdcall, state:dword |
379 | proc START stdcall, state:dword |
380 | 380 | ||
381 | cmp [state], 1 |
381 | cmp [state], 1 |
382 | jne .exit |
382 | jne .exit |
383 | 383 | ||
384 | .entry: |
384 | .entry: |
385 | 385 | ||
386 | DEBUGF 2,"Loading %s driver\n", my_service |
386 | DEBUGF 2,"Loading %s driver\n", my_service |
387 | stdcall RegService, my_service, service_proc |
387 | stdcall RegService, my_service, service_proc |
388 | ret |
388 | ret |
389 | 389 | ||
390 | .fail: |
390 | .fail: |
391 | .exit: |
391 | .exit: |
392 | xor eax, eax |
392 | xor eax, eax |
393 | ret |
393 | ret |
394 | 394 | ||
395 | endp |
395 | endp |
396 | 396 | ||
397 | 397 | ||
398 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
398 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
399 | ;; ;; |
399 | ;; ;; |
400 | ;; proc SERVICE_PROC ;; |
400 | ;; proc SERVICE_PROC ;; |
401 | ;; ;; |
401 | ;; ;; |
402 | ;; (standard driver proc) ;; |
402 | ;; (standard driver proc) ;; |
403 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
403 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
404 | 404 | ||
405 | align 4 |
405 | align 4 |
406 | proc service_proc stdcall, ioctl:dword |
406 | proc service_proc stdcall, ioctl:dword |
407 | 407 | ||
408 | mov edx, [ioctl] |
408 | mov edx, [ioctl] |
409 | mov eax, [IOCTL.io_code] |
409 | mov eax, [IOCTL.io_code] |
410 | 410 | ||
411 | ;------------------------------------------------------ |
411 | ;------------------------------------------------------ |
412 | 412 | ||
413 | cmp eax, 0 ;SRV_GETVERSION |
413 | cmp eax, 0 ;SRV_GETVERSION |
414 | jne @F |
414 | jne @F |
415 | 415 | ||
416 | cmp [IOCTL.out_size], 4 |
416 | cmp [IOCTL.out_size], 4 |
417 | jl .fail |
417 | jl .fail |
418 | mov eax, [IOCTL.output] |
418 | mov eax, [IOCTL.output] |
419 | mov [eax], dword API_VERSION |
419 | mov [eax], dword API_VERSION |
420 | 420 | ||
421 | xor eax, eax |
421 | xor eax, eax |
422 | ret |
422 | ret |
423 | 423 | ||
424 | ;------------------------------------------------------ |
424 | ;------------------------------------------------------ |
425 | @@: |
425 | @@: |
426 | cmp eax, 1 ;SRV_HOOK |
426 | cmp eax, 1 ;SRV_HOOK |
427 | jne .fail |
427 | jne .fail |
428 | 428 | ||
429 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
429 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
430 | jl .fail |
430 | jl .fail |
431 | 431 | ||
432 | mov eax, [IOCTL.input] |
432 | mov eax, [IOCTL.input] |
433 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
433 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
434 | jne .fail ; other types arent supported for this card yet |
434 | jne .fail ; other types arent supported for this card yet |
435 | 435 | ||
436 | ; check if the device is already listed |
436 | ; check if the device is already listed |
437 | 437 | ||
438 | mov esi, device_list |
438 | mov esi, device_list |
439 | mov ecx, [devices] |
439 | mov ecx, [devices] |
440 | test ecx, ecx |
440 | test ecx, ecx |
441 | jz .firstdevice |
441 | jz .firstdevice |
442 | 442 | ||
443 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
443 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
444 | mov ax , [eax+1] ; |
444 | mov ax , [eax+1] ; |
445 | .nextdevice: |
445 | .nextdevice: |
446 | mov ebx, [esi] |
446 | mov ebx, [esi] |
447 | cmp ax , word [device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
447 | cmp ax , word [device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
448 | je .find_devicenum ; Device is already loaded, let's find it's device number |
448 | je .find_devicenum ; Device is already loaded, let's find it's device number |
449 | add esi, 4 |
449 | add esi, 4 |
450 | loop .nextdevice |
450 | loop .nextdevice |
451 | 451 | ||
452 | 452 | ||
453 | ; This device doesnt have its own eth_device structure yet, lets create one |
453 | ; This device doesnt have its own eth_device structure yet, lets create one |
454 | .firstdevice: |
454 | .firstdevice: |
455 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
455 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
456 | jge .fail |
456 | jge .fail |
457 | 457 | ||
458 | allocate_and_clear ebx, device_size, .fail ; Allocate memory to put the device structure in |
458 | allocate_and_clear ebx, device_size, .fail ; Allocate memory to put the device structure in |
459 | 459 | ||
460 | ; Fill in the direct call addresses into the struct |
460 | ; Fill in the direct call addresses into the struct |
461 | 461 | ||
462 | mov [device.reset], reset |
462 | mov [device.reset], reset |
463 | mov [device.transmit], transmit |
463 | mov [device.transmit], transmit |
464 | mov [device.get_MAC], read_mac |
464 | mov [device.get_MAC], read_mac |
465 | mov [device.set_MAC], write_mac |
465 | mov [device.set_MAC], write_mac |
466 | mov [device.unload], unload |
466 | mov [device.unload], unload |
467 | mov [device.name], my_service |
467 | mov [device.name], my_service |
468 | 468 | ||
469 | ; save the pci bus and device numbers |
469 | ; save the pci bus and device numbers |
470 | 470 | ||
471 | mov eax, [IOCTL.input] |
471 | mov eax, [IOCTL.input] |
472 | mov cl , [eax+1] |
472 | mov cl , [eax+1] |
473 | mov [device.pci_bus], cl |
473 | mov [device.pci_bus], cl |
474 | mov cl , [eax+2] |
474 | mov cl , [eax+2] |
475 | mov [device.pci_dev], cl |
475 | mov [device.pci_dev], cl |
476 | 476 | ||
477 | ; Now, it's time to find the base io addres of the PCI device |
477 | ; Now, it's time to find the base io addres of the PCI device |
478 | 478 | ||
479 | find_io [device.pci_bus], [device.pci_dev], [device.io_addr] |
479 | find_io [device.pci_bus], [device.pci_dev], [device.io_addr] |
480 | mov eax, [device.io_addr] |
480 | mov eax, [device.io_addr] |
481 | mov [tpc.mmio_addr], eax |
481 | mov [tpc.mmio_addr], eax |
482 | 482 | ||
483 | ; We've found the io address, find IRQ now |
483 | ; We've found the io address, find IRQ now |
484 | 484 | ||
485 | find_irq [device.pci_bus], [device.pci_dev], [device.irq_line] |
485 | find_irq [device.pci_bus], [device.pci_dev], [device.irq_line] |
486 | 486 | ||
487 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
487 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
488 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8 |
488 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8 |
489 | 489 | ||
490 | ; Ok, the eth_device structure is ready, let's probe the device |
490 | ; Ok, the eth_device structure is ready, let's probe the device |
491 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
491 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
492 | mov eax, [devices] ; Add the device structure to our device list |
492 | mov eax, [devices] ; Add the device structure to our device list |
493 | mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device) |
493 | mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device) |
494 | inc [devices] ; |
494 | inc [devices] ; |
495 | 495 | ||
496 | call probe ; this function will output in eax |
496 | call probe ; this function will output in eax |
497 | test eax, eax |
497 | test eax, eax |
498 | jnz .err2 ; If an error occured, exit |
498 | jnz .err2 ; If an error occured, exit |
499 | 499 | ||
500 | mov [device.type], NET_TYPE_ETH |
500 | mov [device.type], NET_TYPE_ETH |
501 | call NetRegDev |
501 | call NetRegDev |
502 | 502 | ||
503 | cmp eax, -1 |
503 | cmp eax, -1 |
504 | je .destroy |
504 | je .destroy |
505 | 505 | ||
506 | ret |
506 | ret |
507 | 507 | ||
508 | ; If the device was already loaded, find the device number and return it in eax |
508 | ; If the device was already loaded, find the device number and return it in eax |
509 | 509 | ||
510 | .find_devicenum: |
510 | .find_devicenum: |
511 | DEBUGF 2,"Trying to find device number of already registered device\n" |
511 | DEBUGF 2,"Trying to find device number of already registered device\n" |
512 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
512 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
513 | ; into a device number in edi |
513 | ; into a device number in edi |
514 | mov eax, edi ; Application wants it in eax instead |
514 | mov eax, edi ; Application wants it in eax instead |
515 | DEBUGF 2,"Kernel says: %u\n", eax |
515 | DEBUGF 2,"Kernel says: %u\n", eax |
516 | ret |
516 | ret |
517 | 517 | ||
518 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
518 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
519 | 519 | ||
520 | .destroy: |
520 | .destroy: |
521 | ; todo: reset device into virgin state |
521 | ; todo: reset device into virgin state |
522 | 522 | ||
523 | .err2: |
523 | .err2: |
524 | dec [devices] |
524 | dec [devices] |
525 | .err: |
525 | .err: |
526 | DEBUGF 2,"removing device structure\n" |
526 | DEBUGF 2,"removing device structure\n" |
527 | stdcall KernelFree, ebx |
527 | stdcall KernelFree, ebx |
528 | .fail: |
528 | .fail: |
529 | or eax, -1 |
529 | or eax, -1 |
530 | ret |
530 | ret |
531 | 531 | ||
532 | ;------------------------------------------------------ |
532 | ;------------------------------------------------------ |
533 | endp |
533 | endp |
534 | 534 | ||
535 | 535 | ||
536 | align 4 |
536 | align 4 |
537 | unload: |
537 | unload: |
538 | 538 | ||
539 | ret |
539 | ret |
540 | 540 | ||
541 | 541 | ||
542 | align 4 |
542 | align 4 |
543 | init_board: |
543 | init_board: |
544 | 544 | ||
545 | DEBUGF 1,"init_board\n" |
545 | DEBUGF 1,"init_board\n" |
546 | 546 | ||
547 | make_bus_master [device.pci_bus], [device.pci_dev] |
547 | make_bus_master [device.pci_bus], [device.pci_dev] |
548 | 548 | ||
549 | ; Soft reset the chip |
549 | ; Soft reset the chip |
550 | set_io 0 |
550 | set_io 0 |
551 | set_io REG_ChipCmd |
551 | set_io REG_ChipCmd |
552 | mov al, CMD_Reset |
552 | mov al, CMD_Reset |
553 | out dx, al |
553 | out dx, al |
554 | 554 | ||
555 | ; Check that the chip has finished the reset |
555 | ; Check that the chip has finished the reset |
556 | mov ecx, 1000 |
556 | mov ecx, 1000 |
557 | set_io REG_ChipCmd |
557 | set_io REG_ChipCmd |
558 | @@: in al, dx |
558 | @@: in al, dx |
559 | test al, CMD_Reset |
559 | test al, CMD_Reset |
560 | jz @f |
560 | jz @f |
561 | udelay 10 |
561 | udelay 10 |
562 | loop @b |
562 | loop @b |
563 | @@: |
563 | @@: |
564 | ; identify config method |
564 | ; identify config method |
565 | set_io REG_TxConfig |
565 | set_io REG_TxConfig |
566 | in eax, dx |
566 | in eax, dx |
567 | and eax, 0x7c800000 |
567 | and eax, 0x7c800000 |
568 | DEBUGF 1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax |
568 | DEBUGF 1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax |
569 | mov esi, mac_info-8 |
569 | mov esi, mac_info-8 |
570 | @@: add esi, 8 |
570 | @@: add esi, 8 |
571 | mov ecx, eax |
571 | mov ecx, eax |
572 | and ecx, [esi] |
572 | and ecx, [esi] |
573 | cmp ecx, [esi] |
573 | cmp ecx, [esi] |
574 | jne @b |
574 | jne @b |
575 | mov eax, [esi+4] |
575 | mov eax, [esi+4] |
576 | mov [tpc.mcfg], eax |
576 | mov [tpc.mcfg], eax |
577 | 577 | ||
578 | mov [tpc.pcfg], PCFG_METHOD_3 |
578 | mov [tpc.pcfg], PCFG_METHOD_3 |
579 | READ_GMII_REG 3 |
579 | READ_GMII_REG 3 |
580 | and al, 0x0f |
580 | and al, 0x0f |
581 | or al, al |
581 | or al, al |
582 | jnz @f |
582 | jnz @f |
583 | mov [tpc.pcfg], PCFG_METHOD_1 |
583 | mov [tpc.pcfg], PCFG_METHOD_1 |
584 | jmp .pconf |
584 | jmp .pconf |
585 | @@: dec al |
585 | @@: dec al |
586 | jnz .pconf |
586 | jnz .pconf |
587 | mov [tpc.pcfg], PCFG_METHOD_2 |
587 | mov [tpc.pcfg], PCFG_METHOD_2 |
588 | .pconf: |
588 | .pconf: |
589 | 589 | ||
590 | ; identify chip attached to board |
590 | ; identify chip attached to board |
591 | mov ecx, 10 |
591 | mov ecx, 10 |
592 | mov eax, [tpc.mcfg] |
592 | mov eax, [tpc.mcfg] |
593 | @@: dec ecx |
593 | @@: dec ecx |
594 | js @f |
594 | js @f |
595 | cmp eax, [rtl_chip_info + ecx*8] |
595 | cmp eax, [rtl_chip_info + ecx*8] |
596 | jne @b |
596 | jne @b |
597 | mov [tpc.chipset], ecx |
597 | mov [tpc.chipset], ecx |
598 | jmp .match |
598 | jmp .match |
599 | @@: |
599 | @@: |
600 | ; if unknown chip, assume array element #0, original RTL-8169 in this case |
600 | ; if unknown chip, assume array element #0, original RTL-8169 in this case |
601 | DEBUGF 1,"init_board: PCI device: unknown chip version, assuming RTL-8169\n" |
601 | DEBUGF 1,"init_board: PCI device: unknown chip version, assuming RTL-8169\n" |
602 | set_io REG_TxConfig |
602 | set_io REG_TxConfig |
603 | in eax, dx |
603 | in eax, dx |
604 | DEBUGF 1,"init_board: PCI device: TxConfig = 0x%x\n", eax |
604 | DEBUGF 1,"init_board: PCI device: TxConfig = 0x%x\n", eax |
605 | 605 | ||
606 | mov [tpc.chipset], 0 |
606 | mov [tpc.chipset], 0 |
607 | 607 | ||
608 | xor eax, eax |
608 | xor eax, eax |
609 | inc eax |
609 | inc eax |
610 | ret |
610 | ret |
611 | 611 | ||
612 | .match: |
612 | .match: |
613 | DEBUGF 1,"init_board: chipset=%u\n", ecx |
613 | DEBUGF 1,"init_board: chipset=%u\n", ecx |
614 | xor eax,eax |
614 | xor eax,eax |
615 | ret |
615 | ret |
616 | 616 | ||
617 | 617 | ||
618 | 618 | ||
619 | ;*************************************************************************** |
619 | ;*************************************************************************** |
620 | ; Function |
620 | ; Function |
621 | ; probe |
621 | ; probe |
622 | ; Description |
622 | ; Description |
623 | ; Searches for an ethernet card, enables it and clears the rx buffer |
623 | ; Searches for an ethernet card, enables it and clears the rx buffer |
624 | ; If a card was found, it enables the ethernet -> TCPIP link |
624 | ; If a card was found, it enables the ethernet -> TCPIP link |
625 | ; Destroyed registers |
625 | ; Destroyed registers |
626 | ; eax, ebx, ecx, edx |
626 | ; eax, ebx, ecx, edx |
627 | ; |
627 | ; |
628 | ;*************************************************************************** |
628 | ;*************************************************************************** |
629 | align 4 |
629 | align 4 |
630 | probe: |
630 | probe: |
631 | 631 | ||
632 | DEBUGF 1,"probe\n" |
632 | DEBUGF 1,"probe\n" |
633 | 633 | ||
634 | call init_board |
634 | call init_board |
635 | call read_mac |
635 | call read_mac |
636 | call PHY_config |
636 | call PHY_config |
637 | 637 | ||
638 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
638 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
639 | set_io 0 |
639 | set_io 0 |
640 | set_io 0x82 |
640 | set_io 0x82 |
641 | mov al, 0x01 |
641 | mov al, 0x01 |
642 | out dx, al |
642 | out dx, al |
643 | cmp [tpc.mcfg], MCFG_METHOD_03 |
643 | cmp [tpc.mcfg], MCFG_METHOD_03 |
644 | jae @f |
644 | jae @f |
645 | ; DEBUGF 1,"K : Set PCI Latency=0x40\n" |
645 | ; DEBUGF 1,"K : Set PCI Latency=0x40\n" |
646 | ; stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40 |
646 | ; stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40 |
647 | @@: |
647 | @@: |
648 | cmp [tpc.mcfg], MCFG_METHOD_02 |
648 | cmp [tpc.mcfg], MCFG_METHOD_02 |
649 | jne @f |
649 | jne @f |
650 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
650 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
651 | set_io 0x82 |
651 | set_io 0x82 |
652 | mov al, 0x01 |
652 | mov al, 0x01 |
653 | out dx, al |
653 | out dx, al |
654 | ; DEBUGF 1,"K : Set PHY Reg 0x0bh = 0x00h\n" |
654 | ; DEBUGF 1,"K : Set PHY Reg 0x0bh = 0x00h\n" |
655 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
655 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
656 | @@: |
656 | @@: |
657 | ; if TBI is not enabled |
657 | ; if TBI is not enabled |
658 | set_io 0 |
658 | set_io 0 |
659 | set_io REG_PHYstatus |
659 | set_io REG_PHYstatus |
660 | in al, dx |
660 | in al, dx |
661 | test al, PHYS_TBI_Enable |
661 | test al, PHYS_TBI_Enable |
662 | jz .tbi_dis |
662 | jz .tbi_dis |
663 | READ_GMII_REG PHY_AUTO_NEGO_REG |
663 | READ_GMII_REG PHY_AUTO_NEGO_REG |
664 | 664 | ||
665 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
665 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
666 | and eax, 0x0C1F |
666 | and eax, 0x0C1F |
667 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
667 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
668 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
668 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
669 | 669 | ||
670 | ; enable 1000 Full Mode |
670 | ; enable 1000 Full Mode |
671 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
671 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
672 | 672 | ||
673 | ; Enable auto-negotiation and restart auto-nigotiation |
673 | ; Enable auto-negotiation and restart auto-nigotiation |
674 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
674 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
675 | 675 | ||
676 | udelay 100 |
676 | udelay 100 |
677 | mov ecx, 10000 |
677 | mov ecx, 10000 |
678 | ; wait for auto-negotiation process |
678 | ; wait for auto-negotiation process |
679 | @@: dec ecx |
679 | @@: dec ecx |
680 | jz @f |
680 | jz @f |
681 | set_io 0 |
681 | set_io 0 |
682 | READ_GMII_REG PHY_STAT_REG |
682 | READ_GMII_REG PHY_STAT_REG |
683 | udelay 100 |
683 | udelay 100 |
684 | test eax, PHY_Auto_Neco_Comp |
684 | test eax, PHY_Auto_Neco_Comp |
685 | jz @b |
685 | jz @b |
686 | set_io REG_PHYstatus |
686 | set_io REG_PHYstatus |
687 | in al, dx |
687 | in al, dx |
688 | jmp @f |
688 | jmp @f |
689 | .tbi_dis: |
689 | .tbi_dis: |
690 | udelay 100 |
690 | udelay 100 |
691 | @@: |
691 | @@: |
692 | 692 | ||
693 | 693 | ||
694 | ;*************************************************************************** |
694 | ;*************************************************************************** |
695 | ; Function |
695 | ; Function |
696 | ; rt8169_reset |
696 | ; rt8169_reset |
697 | ; Description |
697 | ; Description |
698 | ; Place the chip (ie, the ethernet card) into a virgin state |
698 | ; Place the chip (ie, the ethernet card) into a virgin state |
699 | ; Destroyed registers |
699 | ; Destroyed registers |
700 | ; eax, ebx, ecx, edx |
700 | ; eax, ebx, ecx, edx |
701 | ; |
701 | ; |
702 | ;*************************************************************************** |
702 | ;*************************************************************************** |
703 | align 4 |
703 | align 4 |
704 | reset: |
704 | reset: |
705 | 705 | ||
706 | DEBUGF 1,"reset\n" |
706 | DEBUGF 1,"reset\n" |
707 | 707 | ||
708 | lea eax, [device.tx_ring] |
708 | lea eax, [device.tx_ring] |
709 | mov [tpc.TxDescArrays], eax |
709 | mov [tpc.TxDescArrays], eax |
710 | mov [tpc.TxDescArray], eax |
710 | mov [tpc.TxDescArray], eax |
711 | 711 | ||
712 | lea eax, [device.rx_ring] |
712 | lea eax, [device.rx_ring] |
713 | mov [tpc.RxDescArrays], eax |
713 | mov [tpc.RxDescArrays], eax |
714 | mov [tpc.RxDescArray], eax |
714 | mov [tpc.RxDescArray], eax |
715 | 715 | ||
716 | call init_ring |
716 | call init_ring |
717 | call hw_start |
717 | call hw_start |
718 | 718 | ||
719 | ; clear packet/byte counters |
719 | ; clear packet/byte counters |
720 | 720 | ||
721 | xor eax, eax |
721 | xor eax, eax |
722 | lea edi, [device.bytes_tx] |
722 | lea edi, [device.bytes_tx] |
723 | mov ecx, 6 |
723 | mov ecx, 6 |
724 | rep stosd |
724 | rep stosd |
725 | 725 | ||
726 | mov [device.mtu], 1500 |
726 | mov [device.mtu], 1500 |
727 | 727 | ||
728 | xor eax, eax |
728 | xor eax, eax |
729 | ret |
729 | ret |
730 | 730 | ||
731 | 731 | ||
732 | 732 | ||
733 | 733 | ||
734 | 734 | ||
735 | align 4 |
735 | align 4 |
736 | PHY_config: |
736 | PHY_config: |
737 | 737 | ||
738 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg] |
738 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg] |
739 | 739 | ||
740 | cmp [tpc.mcfg], MCFG_METHOD_04 |
740 | cmp [tpc.mcfg], MCFG_METHOD_04 |
741 | jne .not_4 |
741 | jne .not_4 |
742 | set_io 0 |
742 | set_io 0 |
743 | ; WRITE_GMII_REG 0x1F, 0x0001 |
743 | ; WRITE_GMII_REG 0x1F, 0x0001 |
744 | ; WRITE_GMII_REG 0x1b, 0x841e |
744 | ; WRITE_GMII_REG 0x1b, 0x841e |
745 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
745 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
746 | ; WRITE_GMII_REG 0x09, 0x273a |
746 | ; WRITE_GMII_REG 0x09, 0x273a |
747 | WRITE_GMII_REG 0x1F, 0x0002 |
747 | WRITE_GMII_REG 0x1F, 0x0002 |
748 | WRITE_GMII_REG 0x01, 0x90D0 |
748 | WRITE_GMII_REG 0x01, 0x90D0 |
749 | WRITE_GMII_REG 0x1F, 0x0000 |
749 | WRITE_GMII_REG 0x1F, 0x0000 |
750 | jmp .exit |
750 | jmp .exit |
751 | .not_4: |
751 | .not_4: |
752 | cmp [tpc.mcfg], MCFG_METHOD_02 |
752 | cmp [tpc.mcfg], MCFG_METHOD_02 |
753 | je @f |
753 | je @f |
754 | cmp [tpc.mcfg], MCFG_METHOD_03 |
754 | cmp [tpc.mcfg], MCFG_METHOD_03 |
755 | jne .not_2_or_3 |
755 | jne .not_2_or_3 |
756 | @@: |
756 | @@: |
757 | set_io 0 |
757 | set_io 0 |
758 | WRITE_GMII_REG 0x1F, 0x0001 |
758 | WRITE_GMII_REG 0x1F, 0x0001 |
759 | WRITE_GMII_REG 0x15, 0x1000 |
759 | WRITE_GMII_REG 0x15, 0x1000 |
760 | WRITE_GMII_REG 0x18, 0x65C7 |
760 | WRITE_GMII_REG 0x18, 0x65C7 |
761 | WRITE_GMII_REG 0x04, 0x0000 |
761 | WRITE_GMII_REG 0x04, 0x0000 |
762 | WRITE_GMII_REG 0x03, 0x00A1 |
762 | WRITE_GMII_REG 0x03, 0x00A1 |
763 | WRITE_GMII_REG 0x02, 0x0008 |
763 | WRITE_GMII_REG 0x02, 0x0008 |
764 | WRITE_GMII_REG 0x01, 0x1020 |
764 | WRITE_GMII_REG 0x01, 0x1020 |
765 | WRITE_GMII_REG 0x00, 0x1000 |
765 | WRITE_GMII_REG 0x00, 0x1000 |
766 | WRITE_GMII_REG 0x04, 0x0800 |
766 | WRITE_GMII_REG 0x04, 0x0800 |
767 | WRITE_GMII_REG 0x04, 0x0000 |
767 | WRITE_GMII_REG 0x04, 0x0000 |
768 | WRITE_GMII_REG 0x04, 0x7000 |
768 | WRITE_GMII_REG 0x04, 0x7000 |
769 | WRITE_GMII_REG 0x03, 0xFF41 |
769 | WRITE_GMII_REG 0x03, 0xFF41 |
770 | WRITE_GMII_REG 0x02, 0xDE60 |
770 | WRITE_GMII_REG 0x02, 0xDE60 |
771 | WRITE_GMII_REG 0x01, 0x0140 |
771 | WRITE_GMII_REG 0x01, 0x0140 |
772 | WRITE_GMII_REG 0x00, 0x0077 |
772 | WRITE_GMII_REG 0x00, 0x0077 |
773 | WRITE_GMII_REG 0x04, 0x7800 |
773 | WRITE_GMII_REG 0x04, 0x7800 |
774 | WRITE_GMII_REG 0x04, 0x7000 |
774 | WRITE_GMII_REG 0x04, 0x7000 |
775 | WRITE_GMII_REG 0x04, 0xA000 |
775 | WRITE_GMII_REG 0x04, 0xA000 |
776 | WRITE_GMII_REG 0x03, 0xDF01 |
776 | WRITE_GMII_REG 0x03, 0xDF01 |
777 | WRITE_GMII_REG 0x02, 0xDF20 |
777 | WRITE_GMII_REG 0x02, 0xDF20 |
778 | WRITE_GMII_REG 0x01, 0xFF95 |
778 | WRITE_GMII_REG 0x01, 0xFF95 |
779 | WRITE_GMII_REG 0x00, 0xFA00 |
779 | WRITE_GMII_REG 0x00, 0xFA00 |
780 | WRITE_GMII_REG 0x04, 0xA800 |
780 | WRITE_GMII_REG 0x04, 0xA800 |
781 | WRITE_GMII_REG 0x04, 0xA000 |
781 | WRITE_GMII_REG 0x04, 0xA000 |
782 | WRITE_GMII_REG 0x04, 0xB000 |
782 | WRITE_GMII_REG 0x04, 0xB000 |
783 | WRITE_GMII_REG 0x03, 0xFF41 |
783 | WRITE_GMII_REG 0x03, 0xFF41 |
784 | WRITE_GMII_REG 0x02, 0xDE20 |
784 | WRITE_GMII_REG 0x02, 0xDE20 |
785 | WRITE_GMII_REG 0x01, 0x0140 |
785 | WRITE_GMII_REG 0x01, 0x0140 |
786 | WRITE_GMII_REG 0x00, 0x00BB |
786 | WRITE_GMII_REG 0x00, 0x00BB |
787 | WRITE_GMII_REG 0x04, 0xB800 |
787 | WRITE_GMII_REG 0x04, 0xB800 |
788 | WRITE_GMII_REG 0x04, 0xB000 |
788 | WRITE_GMII_REG 0x04, 0xB000 |
789 | WRITE_GMII_REG 0x04, 0xF000 |
789 | WRITE_GMII_REG 0x04, 0xF000 |
790 | WRITE_GMII_REG 0x03, 0xDF01 |
790 | WRITE_GMII_REG 0x03, 0xDF01 |
791 | WRITE_GMII_REG 0x02, 0xDF20 |
791 | WRITE_GMII_REG 0x02, 0xDF20 |
792 | WRITE_GMII_REG 0x01, 0xFF95 |
792 | WRITE_GMII_REG 0x01, 0xFF95 |
793 | WRITE_GMII_REG 0x00, 0xBF00 |
793 | WRITE_GMII_REG 0x00, 0xBF00 |
794 | WRITE_GMII_REG 0x04, 0xF800 |
794 | WRITE_GMII_REG 0x04, 0xF800 |
795 | WRITE_GMII_REG 0x04, 0xF000 |
795 | WRITE_GMII_REG 0x04, 0xF000 |
796 | WRITE_GMII_REG 0x04, 0x0000 |
796 | WRITE_GMII_REG 0x04, 0x0000 |
797 | WRITE_GMII_REG 0x1F, 0x0000 |
797 | WRITE_GMII_REG 0x1F, 0x0000 |
798 | WRITE_GMII_REG 0x0B, 0x0000 |
798 | WRITE_GMII_REG 0x0B, 0x0000 |
799 | jmp .exit |
799 | jmp .exit |
800 | .not_2_or_3: |
800 | .not_2_or_3: |
801 | DEBUGF 1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg] |
801 | DEBUGF 1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg] |
802 | .exit: |
802 | .exit: |
803 | ret |
803 | ret |
804 | 804 | ||
805 | 805 | ||
806 | 806 | ||
807 | align 4 |
807 | align 4 |
808 | set_rx_mode: |
808 | set_rx_mode: |
809 | 809 | ||
810 | DEBUGF 1,"set_rx_mode\n" |
810 | DEBUGF 1,"set_rx_mode\n" |
811 | 811 | ||
812 | ; IFF_ALLMULTI |
812 | ; IFF_ALLMULTI |
813 | ; Too many to filter perfectly -- accept all multicasts |
813 | ; Too many to filter perfectly -- accept all multicasts |
814 | set_io 0 |
814 | set_io 0 |
815 | set_io REG_RxConfig |
815 | set_io REG_RxConfig |
816 | in eax, dx |
816 | in eax, dx |
817 | mov ecx, [tpc.chipset] |
817 | mov ecx, [tpc.chipset] |
818 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
818 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
819 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
819 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
820 | out dx, eax |
820 | out dx, eax |
821 | 821 | ||
822 | ; Multicast hash filter |
822 | ; Multicast hash filter |
823 | set_io REG_MAR0 + 0 |
823 | set_io REG_MAR0 + 0 |
824 | or eax, -1 |
824 | or eax, -1 |
825 | out dx, eax |
825 | out dx, eax |
826 | set_io REG_MAR0 + 4 |
826 | set_io REG_MAR0 + 4 |
827 | out dx, eax |
827 | out dx, eax |
828 | 828 | ||
829 | ret |
829 | ret |
830 | 830 | ||
831 | 831 | ||
832 | align 4 |
832 | align 4 |
833 | init_ring: |
833 | init_ring: |
834 | 834 | ||
835 | DEBUGF 1,"init_ring\n" |
835 | DEBUGF 1,"init_ring\n" |
836 | 836 | ||
837 | xor eax, eax |
837 | xor eax, eax |
838 | mov [tpc.cur_rx], eax |
838 | mov [tpc.cur_rx], eax |
839 | mov [tpc.cur_tx], eax |
839 | mov [tpc.cur_tx], eax |
840 | 840 | ||
841 | lea edi, [device.tx_ring] |
841 | lea edi, [device.tx_ring] |
842 | mov ecx, (NUM_TX_DESC * tx_desc.size) / 4 |
842 | mov ecx, (NUM_TX_DESC * tx_desc.size) / 4 |
843 | rep stosd |
843 | rep stosd |
844 | 844 | ||
845 | lea edi, [device.rx_ring] |
845 | lea edi, [device.rx_ring] |
846 | mov ecx, (NUM_RX_DESC * rx_desc.size) / 4 |
846 | mov ecx, (NUM_RX_DESC * rx_desc.size) / 4 |
847 | rep stosd |
847 | rep stosd |
848 | 848 | ||
849 | mov edi, [tpc.RxDescArray] |
849 | mov edi, [tpc.RxDescArray] |
850 | mov ecx, NUM_RX_DESC |
850 | mov ecx, NUM_RX_DESC |
851 | .loop: |
851 | .loop: |
852 | push ecx |
852 | push ecx |
853 | stdcall KernelAlloc, RX_BUF_SIZE |
853 | stdcall KernelAlloc, RX_BUF_SIZE |
854 | mov [edi + rx_desc.buf_soft_addr], eax |
854 | mov [edi + rx_desc.buf_soft_addr], eax |
855 | call GetPgAddr |
855 | call GetPgAddr |
856 | mov dword [edi + rx_desc.buf_addr], eax |
856 | mov dword [edi + rx_desc.buf_addr], eax |
857 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
857 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
858 | add edi, rx_desc.size |
858 | add edi, rx_desc.size |
859 | pop ecx |
859 | pop ecx |
860 | loop .loop |
860 | loop .loop |
861 | or [edi - rx_desc.size + rx_desc.status], DSB_EORbit |
861 | or [edi - rx_desc.size + rx_desc.status], DSB_EORbit |
862 | 862 | ||
863 | ret |
863 | ret |
864 | 864 | ||
865 | 865 | ||
866 | align 4 |
866 | align 4 |
867 | hw_start: |
867 | hw_start: |
868 | 868 | ||
869 | DEBUGF 1,"hw_start\n" |
869 | DEBUGF 1,"hw_start\n" |
870 | 870 | ||
871 | ; attach int handler |
871 | ; attach int handler |
872 | movzx eax, [device.irq_line] |
872 | movzx eax, [device.irq_line] |
873 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
873 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
874 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
874 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
875 | 875 | ||
876 | ; Soft reset the chip |
876 | ; Soft reset the chip |
877 | set_io 0 |
877 | set_io 0 |
878 | set_io REG_ChipCmd |
878 | set_io REG_ChipCmd |
879 | mov al, CMD_Reset |
879 | mov al, CMD_Reset |
880 | out dx, al |
880 | out dx, al |
881 | 881 | ||
882 | DEBUGF 1,"Waiting for chip to reset... " |
882 | DEBUGF 1,"Waiting for chip to reset... " |
883 | ; Check that the chip has finished the reset |
883 | ; Check that the chip has finished the reset |
884 | mov ecx, 1000 |
884 | mov ecx, 1000 |
885 | set_io REG_ChipCmd |
885 | set_io REG_ChipCmd |
886 | @@: in al, dx |
886 | @@: in al, dx |
887 | test al, CMD_Reset |
887 | test al, CMD_Reset |
888 | jz @f |
888 | jz @f |
889 | udelay 10 |
889 | udelay 10 |
890 | loop @b |
890 | loop @b |
891 | @@: |
891 | @@: |
892 | DEBUGF 1,"done!\n" |
892 | DEBUGF 1,"done!\n" |
893 | 893 | ||
894 | set_io REG_Cfg9346 |
894 | set_io REG_Cfg9346 |
895 | mov al, CFG_9346_Unlock |
895 | mov al, CFG_9346_Unlock |
896 | out dx, al |
896 | out dx, al |
897 | 897 | ||
898 | set_io REG_ChipCmd |
898 | set_io REG_ChipCmd |
899 | mov al, CMD_TxEnb or CMD_RxEnb |
899 | mov al, CMD_TxEnb or CMD_RxEnb |
900 | out dx, al |
900 | out dx, al |
901 | 901 | ||
902 | set_io REG_ETThReg |
902 | set_io REG_ETThReg |
903 | mov al, ETTh |
903 | mov al, ETTh |
904 | out dx, al |
904 | out dx, al |
905 | 905 | ||
906 | ; For gigabit rtl8169 |
906 | ; For gigabit rtl8169 |
907 | set_io REG_RxMaxSize |
907 | set_io REG_RxMaxSize |
908 | mov ax, RxPacketMaxSize |
908 | mov ax, RxPacketMaxSize |
909 | out dx, ax |
909 | out dx, ax |
910 | 910 | ||
911 | ; Set Rx Config register |
911 | ; Set Rx Config register |
912 | set_io REG_RxConfig |
912 | set_io REG_RxConfig |
913 | in ax, dx |
913 | in ax, dx |
914 | mov ecx, [tpc.chipset] |
914 | mov ecx, [tpc.chipset] |
915 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
915 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
916 | or eax, rx_config |
916 | or eax, rx_config |
917 | out dx, eax |
917 | out dx, eax |
918 | 918 | ||
919 | ; Set DMA burst size and Interframe Gap Time |
919 | ; Set DMA burst size and Interframe Gap Time |
920 | set_io REG_TxConfig |
920 | set_io REG_TxConfig |
921 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
921 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
922 | out dx, eax |
922 | out dx, eax |
923 | 923 | ||
924 | set_io REG_CPlusCmd |
924 | set_io REG_CPlusCmd |
925 | in ax, dx |
925 | in ax, dx |
926 | out dx, ax |
926 | out dx, ax |
927 | 927 | ||
928 | in ax, dx |
928 | in ax, dx |
929 | or ax, 1 shl 3 |
929 | or ax, 1 shl 3 |
930 | cmp [tpc.mcfg], MCFG_METHOD_02 |
930 | cmp [tpc.mcfg], MCFG_METHOD_02 |
931 | jne @f |
931 | jne @f |
932 | cmp [tpc.mcfg], MCFG_METHOD_03 |
932 | cmp [tpc.mcfg], MCFG_METHOD_03 |
933 | jne @f |
933 | jne @f |
934 | or ax,1 shl 14 |
934 | or ax,1 shl 14 |
935 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
935 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
936 | jmp .set |
936 | jmp .set |
937 | @@: |
937 | @@: |
938 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
938 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
939 | .set: |
939 | .set: |
940 | set_io REG_CPlusCmd |
940 | set_io REG_CPlusCmd |
941 | out dx, ax |
941 | out dx, ax |
942 | 942 | ||
943 | set_io 0xE2 |
943 | set_io 0xE2 |
944 | ; mov ax, 0x1517 |
944 | ; mov ax, 0x1517 |
945 | ; out dx, ax |
945 | ; out dx, ax |
946 | ; mov ax, 0x152a |
946 | ; mov ax, 0x152a |
947 | ; out dx, ax |
947 | ; out dx, ax |
948 | ; mov ax, 0x282a |
948 | ; mov ax, 0x282a |
949 | ; out dx, ax |
949 | ; out dx, ax |
950 | xor ax, ax |
950 | xor ax, ax |
951 | out dx, ax |
951 | out dx, ax |
952 | 952 | ||
953 | xor eax, eax |
953 | xor eax, eax |
954 | mov [tpc.cur_rx], eax |
954 | mov [tpc.cur_rx], eax |
955 | lea eax, [device.tx_ring] |
955 | lea eax, [device.tx_ring] |
956 | GetRealAddr |
956 | GetRealAddr |
957 | set_io REG_TxDescStartAddr |
957 | set_io REG_TxDescStartAddr |
958 | out dx, eax |
958 | out dx, eax |
959 | 959 | ||
960 | lea eax, [device.rx_ring] |
960 | lea eax, [device.rx_ring] |
961 | GetRealAddr |
961 | GetRealAddr |
962 | set_io REG_RxDescStartAddr |
962 | set_io REG_RxDescStartAddr |
963 | out dx, eax |
963 | out dx, eax |
964 | 964 | ||
965 | set_io REG_Cfg9346 |
965 | set_io REG_Cfg9346 |
966 | mov al, CFG_9346_Lock |
966 | mov al, CFG_9346_Lock |
967 | out dx, al |
967 | out dx, al |
968 | 968 | ||
969 | udelay 10 |
969 | udelay 10 |
970 | 970 | ||
971 | xor eax, eax |
971 | xor eax, eax |
972 | set_io REG_RxMissed |
972 | set_io REG_RxMissed |
973 | out dx, eax |
973 | out dx, eax |
974 | 974 | ||
975 | call set_rx_mode |
975 | call set_rx_mode |
976 | 976 | ||
977 | set_io 0 |
977 | set_io 0 |
978 | ; no early-rx interrupts |
978 | ; no early-rx interrupts |
979 | set_io REG_MultiIntr |
979 | set_io REG_MultiIntr |
980 | in ax, dx |
980 | in ax, dx |
981 | and ax, 0xF000 |
981 | and ax, 0xF000 |
982 | out dx, ax |
982 | out dx, ax |
983 | 983 | ||
984 | ; set interrupt mask |
984 | ; set interrupt mask |
985 | set_io REG_IntrMask |
985 | set_io REG_IntrMask |
986 | mov ax, intr_mask |
986 | mov ax, intr_mask |
987 | out dx, ax |
987 | out dx, ax |
988 | 988 | ||
989 | xor eax, eax |
989 | xor eax, eax |
990 | ret |
990 | ret |
991 | 991 | ||
992 | 992 | ||
993 | align 4 |
993 | align 4 |
994 | read_mac: |
994 | read_mac: |
995 | 995 | ||
996 | set_io 0 |
996 | set_io 0 |
997 | set_io REG_MAC0 |
997 | set_io REG_MAC0 |
998 | xor ecx, ecx |
998 | xor ecx, ecx |
999 | lea edi, [device.mac] |
999 | lea edi, [device.mac] |
1000 | mov ecx, 6 |
1000 | mov ecx, 6 |
1001 | 1001 | ||
1002 | ; Get MAC address. FIXME: read EEPROM |
1002 | ; Get MAC address. FIXME: read EEPROM |
1003 | @@: in al, dx |
1003 | @@: in al, dx |
1004 | stosb |
1004 | stosb |
1005 | inc edx |
1005 | inc edx |
1006 | loop @r |
1006 | loop @r |
1007 | 1007 | ||
1008 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
1008 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
1009 | [device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
1009 | [device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
1010 | 1010 | ||
1011 | ret |
1011 | ret |
1012 | 1012 | ||
1013 | align 4 |
1013 | align 4 |
1014 | write_mac: |
1014 | write_mac: |
1015 | 1015 | ||
1016 | ret 6 |
1016 | ret 6 |
1017 | 1017 | ||
1018 | 1018 | ||
1019 | 1019 | ||
1020 | 1020 | ||
1021 | 1021 | ||
1022 | ;*************************************************************************** |
1022 | ;*************************************************************************** |
1023 | ; Function |
1023 | ; Function |
1024 | ; transmit |
1024 | ; transmit |
1025 | ; Description |
1025 | ; Description |
1026 | ; Transmits a packet of data via the ethernet card |
1026 | ; Transmits a packet of data via the ethernet card |
1027 | ; |
1027 | ; |
1028 | ; Destroyed registers |
1028 | ; Destroyed registers |
1029 | ; eax, edx, esi, edi |
1029 | ; eax, edx, esi, edi |
1030 | ; |
1030 | ; |
1031 | ;*************************************************************************** |
1031 | ;*************************************************************************** |
1032 | align 4 |
1032 | align 4 |
1033 | transmit: |
1033 | transmit: |
1034 | 1034 | ||
1035 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
1035 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
1036 | mov eax, [esp+4] |
1036 | mov eax, [esp+4] |
1037 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
1037 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
1038 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
1038 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
1039 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
1039 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
1040 | [eax+13]:2,[eax+12]:2 |
1040 | [eax+13]:2,[eax+12]:2 |
1041 | 1041 | ||
1042 | cmp dword [esp+8], MAX_ETH_FRAME_SIZE |
1042 | cmp dword [esp+8], MAX_ETH_FRAME_SIZE |
1043 | ja .fail |
1043 | ja .fail |
1044 | 1044 | ||
1045 | ;---------------------------------- |
1045 | ;---------------------------------- |
1046 | ; Find currentTX descriptor address |
1046 | ; Find currentTX descriptor address |
1047 | 1047 | ||
1048 | mov eax, tx_desc.size |
1048 | mov eax, tx_desc.size |
1049 | mul [tpc.cur_tx] |
1049 | mul [tpc.cur_tx] |
1050 | lea esi, [eax + device.tx_ring] |
1050 | lea esi, [eax + device.tx_ring] |
1051 | 1051 | ||
1052 | DEBUGF 1,"Using TX desc: %x\n", esi |
1052 | DEBUGF 1,"Using TX desc: %x\n", esi |
1053 | 1053 | ||
1054 | ;--------------------------- |
1054 | ;--------------------------- |
1055 | ; Program the packet pointer |
1055 | ; Program the packet pointer |
1056 | 1056 | ||
1057 | mov eax, [esp + 4] |
1057 | mov eax, [esp + 4] |
1058 | mov [esi + tx_desc.buf_soft_addr], eax |
1058 | mov [esi + tx_desc.buf_soft_addr], eax |
1059 | GetRealAddr |
1059 | GetRealAddr |
1060 | mov dword [esi + tx_desc.buf_addr], eax |
1060 | mov dword [esi + tx_desc.buf_addr], eax |
1061 | 1061 | ||
1062 | ;------------------------ |
1062 | ;------------------------ |
1063 | ; Program the packet size |
1063 | ; Program the packet size |
1064 | 1064 | ||
1065 | mov eax, [esp + 8] |
1065 | mov eax, [esp + 8] |
1066 | @@: or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
1066 | @@: or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
1067 | cmp [tpc.cur_tx], NUM_TX_DESC - 1 |
1067 | cmp [tpc.cur_tx], NUM_TX_DESC - 1 |
1068 | jne @f |
1068 | jne @f |
1069 | or eax, DSB_EORbit |
1069 | or eax, DSB_EORbit |
1070 | @@: mov [esi + tx_desc.status], eax |
1070 | @@: mov [esi + tx_desc.status], eax |
1071 | 1071 | ||
1072 | ;----------------------------------------- |
1072 | ;----------------------------------------- |
1073 | ; Set the polling bit (start transmission) |
1073 | ; Set the polling bit (start transmission) |
1074 | 1074 | ||
1075 | set_io 0 |
1075 | set_io 0 |
1076 | set_io REG_TxPoll |
1076 | set_io REG_TxPoll |
1077 | mov al, 0x40 ; set polling bit |
1077 | mov al, 0x40 ; set polling bit |
1078 | out dx, al |
1078 | out dx, al |
1079 | 1079 | ||
1080 | ;----------------------- |
1080 | ;----------------------- |
1081 | ; Update TX descriptor |
1081 | ; Update TX descriptor |
1082 | 1082 | ||
1083 | inc [tpc.cur_tx] |
1083 | inc [tpc.cur_tx] |
1084 | and [tpc.cur_tx], NUM_TX_DESC - 1 |
1084 | and [tpc.cur_tx], NUM_TX_DESC - 1 |
1085 | 1085 | ||
1086 | ;------------- |
1086 | ;------------- |
1087 | ; Update stats |
1087 | ; Update stats |
1088 | 1088 | ||
1089 | inc [device.packets_tx] |
1089 | inc [device.packets_tx] |
1090 | mov eax, [esp + 8] |
1090 | mov eax, [esp + 8] |
1091 | add dword [device.bytes_tx], eax |
1091 | add dword [device.bytes_tx], eax |
1092 | adc dword [device.bytes_tx + 4], 0 |
1092 | adc dword [device.bytes_tx + 4], 0 |
1093 | 1093 | ||
1094 | xor eax, eax |
1094 | xor eax, eax |
1095 | ret 8 |
1095 | ret 8 |
1096 | 1096 | ||
1097 | .fail: |
1097 | .fail: |
1098 | DEBUGF 1,"transmit failed\n" |
1098 | DEBUGF 1,"transmit failed\n" |
1099 | or eax, -1 |
1099 | or eax, -1 |
1100 | stdcall KernelFree, [esp+4] |
1100 | stdcall KernelFree, [esp+4] |
1101 | ret 8 |
1101 | ret 8 |
1102 | 1102 | ||
1103 | 1103 | ||
1104 | ;;;DSB_OWNbit |
1104 | ;;;DSB_OWNbit |
1105 | 1105 | ||
1106 | 1106 | ||
1107 | ;;;;;;;;;;;;;;;;;;;;;;; |
1107 | ;;;;;;;;;;;;;;;;;;;;;;; |
1108 | ;; ;; |
1108 | ;; ;; |
1109 | ;; Interrupt handler ;; |
1109 | ;; Interrupt handler ;; |
1110 | ;; ;; |
1110 | ;; ;; |
1111 | ;;;;;;;;;;;;;;;;;;;;;;; |
1111 | ;;;;;;;;;;;;;;;;;;;;;;; |
1112 | 1112 | ||
1113 | align 4 |
1113 | align 4 |
1114 | int_handler: |
1114 | int_handler: |
1115 | 1115 | ||
1116 | DEBUGF 1,"\n%s int\n", my_service |
1116 | DEBUGF 1,"\n%s int\n", my_service |
1117 | 1117 | ||
1118 | ; find pointer of device wich made IRQ occur |
1118 | ; find pointer of device wich made IRQ occur |
1119 | 1119 | ||
1120 | mov ecx, [devices] |
1120 | mov ecx, [devices] |
1121 | test ecx, ecx |
1121 | test ecx, ecx |
1122 | jz .nothing |
1122 | jz .nothing |
1123 | mov esi, device_list |
1123 | mov esi, device_list |
1124 | .nextdevice: |
1124 | .nextdevice: |
1125 | mov ebx, [esi] |
1125 | mov ebx, [esi] |
1126 | 1126 | ||
1127 | set_io 0 |
1127 | set_io 0 |
1128 | set_io REG_IntrStatus |
1128 | set_io REG_IntrStatus |
1129 | in ax, dx |
1129 | in ax, dx |
1130 | test ax, ax |
1130 | test ax, ax |
1131 | jnz .got_it |
1131 | jnz .got_it |
1132 | .continue: |
1132 | .continue: |
1133 | add esi, 4 |
1133 | add esi, 4 |
1134 | dec ecx |
1134 | dec ecx |
1135 | jnz .nextdevice |
1135 | jnz .nextdevice |
1136 | .nothing: |
1136 | .nothing: |
1137 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
1137 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
1138 | 1138 | ||
1139 | .got_it: |
1139 | .got_it: |
1140 | 1140 | ||
1141 | DEBUGF 1,"Device: %x Status: %x ", ebx, ax |
1141 | DEBUGF 1,"Device: %x Status: %x ", ebx, ax |
1142 | 1142 | ||
1143 | cmp ax, 0xFFFF ; if so, hardware is no longer present |
1143 | cmp ax, 0xFFFF ; if so, hardware is no longer present |
1144 | je .fail |
1144 | je .fail |
1145 | 1145 | ||
1146 | ;-------- |
1146 | ;-------- |
1147 | ; Receive |
1147 | ; Receive |
1148 | 1148 | ||
1149 | test ax, ISB_RxOK |
1149 | test ax, ISB_RxOK |
1150 | jz .no_rx |
1150 | jz .no_rx |
1151 | 1151 | ||
1152 | push ax |
1152 | push ax |
1153 | push ebx |
1153 | push ebx |
1154 | 1154 | ||
1155 | .check_more: |
1155 | .check_more: |
1156 | pop ebx |
1156 | pop ebx |
1157 | DEBUGF 1,"ebx = 0x%x\n", ebx |
1157 | DEBUGF 1,"ebx = 0x%x\n", ebx |
1158 | mov eax, rx_desc.size |
1158 | mov eax, rx_desc.size |
1159 | mul [tpc.cur_rx] |
1159 | mul [tpc.cur_rx] |
1160 | lea esi, [eax + device.rx_ring] |
1160 | lea esi, [eax + device.rx_ring] |
1161 | 1161 | ||
1162 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
1162 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
1163 | 1163 | ||
1164 | mov eax, [esi + rx_desc.status] |
1164 | mov eax, [esi + rx_desc.status] |
1165 | test eax, DSB_OWNbit ;;; |
1165 | test eax, DSB_OWNbit ;;; |
1166 | jnz .rx_return |
1166 | jnz .rx_return |
1167 | 1167 | ||
1168 | DEBUGF 1,"tpc.cur_rx = %u\n", [tpc.cur_rx] |
1168 | DEBUGF 1,"tpc.cur_rx = %u\n", [tpc.cur_rx] |
1169 | 1169 | ||
1170 | test eax, SD_RxRES |
1170 | test eax, SD_RxRES |
1171 | jnz .rx_return ;;;;; RX error! |
1171 | jnz .rx_return ;;;;; RX error! |
1172 | 1172 | ||
1173 | push ebx |
1173 | push ebx |
1174 | push .check_more |
1174 | push .check_more |
1175 | and eax, 0x00001FFF |
1175 | and eax, 0x00001FFF |
1176 | add eax, -4 ; we dont need CRC |
1176 | add eax, -4 ; we dont need CRC |
1177 | push eax |
1177 | push eax |
1178 | DEBUGF 1,"data length = %u\n", ax |
1178 | DEBUGF 1,"data length = %u\n", ax |
1179 | 1179 | ||
1180 | ;------------- |
1180 | ;------------- |
1181 | ; Update stats |
1181 | ; Update stats |
1182 | 1182 | ||
1183 | add dword [device.bytes_rx], eax |
1183 | add dword [device.bytes_rx], eax |
1184 | adc dword [device.bytes_rx + 4], 0 |
1184 | adc dword [device.bytes_rx + 4], 0 |
1185 | inc dword [device.packets_rx] |
1185 | inc dword [device.packets_rx] |
1186 | 1186 | ||
1187 | push [esi + rx_desc.buf_soft_addr] |
1187 | push [esi + rx_desc.buf_soft_addr] |
1188 | 1188 | ||
1189 | ;---------------------- |
1189 | ;---------------------- |
1190 | ; Allocate a new buffer |
1190 | ; Allocate a new buffer |
1191 | 1191 | ||
1192 | stdcall KernelAlloc, RX_BUF_SIZE |
1192 | stdcall KernelAlloc, RX_BUF_SIZE |
1193 | mov [esi + rx_desc.buf_soft_addr], eax |
1193 | mov [esi + rx_desc.buf_soft_addr], eax |
1194 | GetRealAddr |
1194 | GetRealAddr |
1195 | mov dword [esi + rx_desc.buf_addr], eax |
1195 | mov dword [esi + rx_desc.buf_addr], eax |
1196 | 1196 | ||
1197 | ;--------------- |
1197 | ;--------------- |
1198 | ; re set OWN bit |
1198 | ; re set OWN bit |
1199 | 1199 | ||
1200 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
1200 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
1201 | cmp [tpc.cur_rx], NUM_RX_DESC - 1 |
1201 | cmp [tpc.cur_rx], NUM_RX_DESC - 1 |
1202 | jne @f |
1202 | jne @f |
1203 | or eax, DSB_EORbit |
1203 | or eax, DSB_EORbit |
1204 | @@: mov [esi + rx_desc.status], eax |
1204 | @@: mov [esi + rx_desc.status], eax |
1205 | 1205 | ||
1206 | ;-------------- |
1206 | ;-------------- |
1207 | ; Update rx ptr |
1207 | ; Update rx ptr |
1208 | 1208 | ||
1209 | inc [tpc.cur_rx] |
1209 | inc [tpc.cur_rx] |
1210 | and [tpc.cur_rx], NUM_RX_DESC - 1 |
1210 | and [tpc.cur_rx], NUM_RX_DESC - 1 |
1211 | 1211 | ||
1212 | jmp EthReceiver |
1212 | jmp Eth_input |
1213 | .rx_return: |
1213 | .rx_return: |
1214 | 1214 | ||
1215 | pop ax |
1215 | pop ax |
1216 | .no_rx: |
1216 | .no_rx: |
1217 | 1217 | ||
1218 | ;--------- |
1218 | ;--------- |
1219 | ; Transmit |
1219 | ; Transmit |
1220 | 1220 | ||
1221 | test ax, ISB_TxOK |
1221 | test ax, ISB_TxOK |
1222 | jz .no_tx |
1222 | jz .no_tx |
1223 | push ax |
1223 | push ax |
1224 | 1224 | ||
1225 | DEBUGF 1,"TX ok!\n" |
1225 | DEBUGF 1,"TX ok!\n" |
1226 | 1226 | ||
1227 | mov ecx, NUM_TX_DESC |
1227 | mov ecx, NUM_TX_DESC |
1228 | lea esi, [device.tx_ring] |
1228 | lea esi, [device.tx_ring] |
1229 | .txloop: |
1229 | .txloop: |
1230 | cmp [esi + tx_desc.buf_soft_addr], 0 |
1230 | cmp [esi + tx_desc.buf_soft_addr], 0 |
1231 | jz .maybenext |
1231 | jz .maybenext |
1232 | 1232 | ||
1233 | test [esi + tx_desc.status], DSB_OWNbit |
1233 | test [esi + tx_desc.status], DSB_OWNbit |
1234 | jnz .maybenext |
1234 | jnz .maybenext |
1235 | 1235 | ||
1236 | push ecx |
1236 | push ecx |
1237 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
1237 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
1238 | stdcall KernelFree, [esi + tx_desc.buf_soft_addr] |
1238 | stdcall KernelFree, [esi + tx_desc.buf_soft_addr] |
1239 | pop ecx |
1239 | pop ecx |
1240 | and [esi + tx_desc.buf_soft_addr], 0 |
1240 | and [esi + tx_desc.buf_soft_addr], 0 |
1241 | 1241 | ||
1242 | .maybenext: |
1242 | .maybenext: |
1243 | add esi, tx_desc.size |
1243 | add esi, tx_desc.size |
1244 | dec ecx |
1244 | dec ecx |
1245 | jnz .txloop |
1245 | jnz .txloop |
1246 | 1246 | ||
1247 | pop ax |
1247 | pop ax |
1248 | .no_tx: |
1248 | .no_tx: |
1249 | 1249 | ||
1250 | ;------- |
1250 | ;------- |
1251 | ; Finish |
1251 | ; Finish |
1252 | 1252 | ||
1253 | set_io 0 |
1253 | set_io 0 |
1254 | set_io REG_IntrStatus |
1254 | set_io REG_IntrStatus |
1255 | out dx, ax ; ACK all interrupts |
1255 | out dx, ax ; ACK all interrupts |
1256 | 1256 | ||
1257 | .fail: |
1257 | .fail: |
1258 | ret |
1258 | ret |
1259 | 1259 | ||
1260 | 1260 | ||
1261 | 1261 | ||
1262 | 1262 | ||
1263 | 1263 | ||
1264 | 1264 | ||
1265 | 1265 | ||
1266 | 1266 | ||
1267 | 1267 | ||
1268 | ; End of code |
1268 | ; End of code |
1269 | align 4 ; Place all initialised data here |
1269 | align 4 ; Place all initialised data here |
1270 | 1270 | ||
1271 | devices dd 0 |
1271 | devices dd 0 |
1272 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
1272 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
1273 | my_service db 'RTL8169',0 ; max 16 chars include zero |
1273 | my_service db 'RTL8169',0 ; max 16 chars include zero |
1274 | 1274 | ||
1275 | include_debug_strings ; All data wich FDO uses will be included here |
1275 | include_debug_strings ; All data wich FDO uses will be included here |
1276 | 1276 | ||
1277 | rtl_chip_info dd \ |
1277 | rtl_chip_info dd \ |
1278 | MCFG_METHOD_01, 0xff7e1880, \ ; RTL8169 |
1278 | MCFG_METHOD_01, 0xff7e1880, \ ; RTL8169 |
1279 | MCFG_METHOD_02, 0xff7e1880, \ ; RTL8169s/8110s |
1279 | MCFG_METHOD_02, 0xff7e1880, \ ; RTL8169s/8110s |
1280 | MCFG_METHOD_03, 0xff7e1880, \ ; RTL8169s/8110s |
1280 | MCFG_METHOD_03, 0xff7e1880, \ ; RTL8169s/8110s |
1281 | MCFG_METHOD_04, 0xff7e1880, \ ; RTL8169sb/8110sb |
1281 | MCFG_METHOD_04, 0xff7e1880, \ ; RTL8169sb/8110sb |
1282 | MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc |
1282 | MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc |
1283 | MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
1283 | MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
1284 | MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
1284 | MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
1285 | MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e // PCI-E 8139 |
1285 | MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e // PCI-E 8139 |
1286 | MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e // PCI-E 8139 |
1286 | MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e // PCI-E 8139 |
1287 | MCFG_METHOD_15, 0xff7e1880 ; RTL8100e // PCI-E 8139 |
1287 | MCFG_METHOD_15, 0xff7e1880 ; RTL8100e // PCI-E 8139 |
1288 | 1288 | ||
1289 | mac_info dd \ |
1289 | mac_info dd \ |
1290 | 0x38800000, MCFG_METHOD_15, \ |
1290 | 0x38800000, MCFG_METHOD_15, \ |
1291 | 0x38000000, MCFG_METHOD_12, \ |
1291 | 0x38000000, MCFG_METHOD_12, \ |
1292 | 0x34000000, MCFG_METHOD_13, \ |
1292 | 0x34000000, MCFG_METHOD_13, \ |
1293 | 0x30800000, MCFG_METHOD_14, \ |
1293 | 0x30800000, MCFG_METHOD_14, \ |
1294 | 0x30000000, MCFG_METHOD_11, \ |
1294 | 0x30000000, MCFG_METHOD_11, \ |
1295 | 0x18000000, MCFG_METHOD_05, \ |
1295 | 0x18000000, MCFG_METHOD_05, \ |
1296 | 0x10000000, MCFG_METHOD_04, \ |
1296 | 0x10000000, MCFG_METHOD_04, \ |
1297 | 0x04000000, MCFG_METHOD_03, \ |
1297 | 0x04000000, MCFG_METHOD_03, \ |
1298 | 0x00800000, MCFG_METHOD_02, \ |
1298 | 0x00800000, MCFG_METHOD_02, \ |
1299 | 0x00000000, MCFG_METHOD_01 ; catch-all |
1299 | 0x00000000, MCFG_METHOD_01 ; catch-all |
1300 | 1300 | ||
1301 | name_01 db "RTL8169", 0 |
1301 | name_01 db "RTL8169", 0 |
1302 | name_02_03 db "RTL8169s/8110s", 0 |
1302 | name_02_03 db "RTL8169s/8110s", 0 |
1303 | name_04 db "RTL8169sb/8110sb", 0 |
1303 | name_04 db "RTL8169sb/8110sb", 0 |
1304 | name_05 db "RTL8169sc/8110sc", 0 |
1304 | name_05 db "RTL8169sc/8110sc", 0 |
1305 | name_11_12 db "RTL8168b/8111b", 0 ; PCI-E |
1305 | name_11_12 db "RTL8168b/8111b", 0 ; PCI-E |
1306 | name_13 db "RTL8101e", 0 ; PCI-E 8139 |
1306 | name_13 db "RTL8101e", 0 ; PCI-E 8139 |
1307 | name_14_15 db "RTL8100e", 0 ; PCI-E 8139 |
1307 | name_14_15 db "RTL8100e", 0 ; PCI-E 8139 |
1308 | 1308 | ||
1309 | 1309 | ||
1310 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
1310 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
1311 | 1311 | ||
1312 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
1312 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |