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Rev 1823 Rev 2387
Line 20... Line 20...
20
;;                                                                 ;;
20
;;                                                                 ;;
21
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
21
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Line 22... Line 22...
22
 
22
 
Line 23... Line 23...
23
format MS COFF
23
format MS COFF
24
 
24
 
Line 25... Line 25...
25
	API_VERSION		equ 0x01000100
25
        API_VERSION             equ 0x01000100
Line 26... Line 26...
26
	DRIVER_VERSION		equ 5
26
        DRIVER_VERSION          equ 5
27
 
27
 
28
	MAX_DEVICES		equ 16
28
        MAX_DEVICES             equ 16
Line 29... Line 29...
29
 
29
 
30
	DEBUG			equ 1
30
        DEBUG                   equ 1
Line 31... Line 31...
31
	__DEBUG__		equ 1
31
        __DEBUG__               equ 1
32
	__DEBUG_LEVEL__ 	equ 1
32
        __DEBUG_LEVEL__         equ 1
33
 
33
 
34
	NUM_TX_DESC		equ 4
34
        NUM_TX_DESC             equ 4
Line 42... Line 42...
42
public START
42
public START
43
public service_proc
43
public service_proc
44
public version
44
public version
Line 186... Line 186...
186
ETH_ZLEN	       equ 60 ; 60 + 4bytes auto payload for
186
ETH_ZLEN               equ 60 ; 60 + 4bytes auto payload for
187
				      ; mininmum 64bytes frame length
187
                                      ; mininmum 64bytes frame length
Line 188... Line 188...
188
 
188
 
189
; MAC address length
189
; MAC address length
Line 190... Line 190...
190
MAC_ADDR_LEN	    equ 6
190
MAC_ADDR_LEN        equ 6
Line 191... Line 191...
191
 
191
 
192
; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4)
192
; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4)
193
MAX_ETH_FRAME_SIZE  equ 1536
193
MAX_ETH_FRAME_SIZE  equ 1536
194
 
194
 
195
TX_FIFO_THRESH	    equ 256	; In bytes
195
TX_FIFO_THRESH      equ 256     ; In bytes
196
 
196
 
197
RX_FIFO_THRESH	    equ 7	; 7 means NO threshold, Rx buffer level before first PCI xfer
197
RX_FIFO_THRESH      equ 7       ; 7 means NO threshold, Rx buffer level before first PCI xfer
198
RX_DMA_BURST	    equ 7	; Maximum PCI burst, '6' is 1024
198
RX_DMA_BURST        equ 7       ; Maximum PCI burst, '6' is 1024
Line 199... Line 199...
199
TX_DMA_BURST	    equ 7	; Maximum PCI burst, '6' is 1024
199
TX_DMA_BURST        equ 7       ; Maximum PCI burst, '6' is 1024
Line 200... Line 200...
200
ETTh		    equ 0x3F	; 0x3F means NO threshold
200
ETTh                equ 0x3F    ; 0x3F means NO threshold
201
 
201
 
Line 202... Line 202...
202
EarlyTxThld	    equ 0x3F	; 0x3F means NO early transmit
202
EarlyTxThld         equ 0x3F    ; 0x3F means NO early transmit
Line 203... Line 203...
203
RxPacketMaxSize     equ 0x0800	; Maximum size supported is 16K-1
203
RxPacketMaxSize     equ 0x0800  ; Maximum size supported is 16K-1
204
InterFrameGap	    equ 0x03	; 3 means InterFrameGap = the shortest one
204
InterFrameGap       equ 0x03    ; 3 means InterFrameGap = the shortest one
205
 
205
 
Line 206... Line 206...
206
HZ		    equ 1000
206
HZ                  equ 1000
207
 
207
 
208
RTL_MIN_IO_SIZE     equ 0x80
208
RTL_MIN_IO_SIZE     equ 0x80
209
TX_TIMEOUT	    equ (6*HZ)
209
TX_TIMEOUT          equ (6*HZ)
210
 
210
 
211
TIMER_EXPIRE_TIME equ 100
211
TIMER_EXPIRE_TIME equ 100
Line 212... Line 212...
212
 
212
 
213
ETH_HDR_LEN	    equ 14
213
ETH_HDR_LEN         equ 14
214
DEFAULT_MTU	    equ 1500
214
DEFAULT_MTU         equ 1500
215
DEFAULT_RX_BUF_LEN  equ 1536
215
DEFAULT_RX_BUF_LEN  equ 1536
216
 
216
 
217
 
217
 
218
;#ifdef JUMBO_FRAME_SUPPORT
218
;#ifdef JUMBO_FRAME_SUPPORT
219
;#define MAX_JUMBO_FRAME_MTU    ( 10000 )
219
;#define MAX_JUMBO_FRAME_MTU    ( 10000 )
220
;#define MAX_RX_SKBDATA_SIZE    ( MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN )
220
;#define MAX_RX_SKBDATA_SIZE    ( MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN )
221
;#else
221
;#else
222
MAX_RX_SKBDATA_SIZE equ 1600
222
MAX_RX_SKBDATA_SIZE equ 1600
223
;#endif                         //end #ifdef JUMBO_FRAME_SUPPORT
223
;#endif                         //end #ifdef JUMBO_FRAME_SUPPORT
224
 
224
 
225
MCFG_METHOD_01	     equ 0x01
225
MCFG_METHOD_01       equ 0x01
Line 226... Line 226...
226
MCFG_METHOD_02	     equ 0x02
226
MCFG_METHOD_02       equ 0x02
227
MCFG_METHOD_03	     equ 0x03
227
MCFG_METHOD_03       equ 0x03
228
MCFG_METHOD_04	     equ 0x04
228
MCFG_METHOD_04       equ 0x04
229
MCFG_METHOD_05	     equ 0x05
229
MCFG_METHOD_05       equ 0x05
230
MCFG_METHOD_11	     equ 0x0b
230
MCFG_METHOD_11       equ 0x0b
231
MCFG_METHOD_12	     equ 0x0c
231
MCFG_METHOD_12       equ 0x0c
232
MCFG_METHOD_13	     equ 0x0d
232
MCFG_METHOD_13       equ 0x0d
233
MCFG_METHOD_14	     equ 0x0e
233
MCFG_METHOD_14       equ 0x0e
234
MCFG_METHOD_15	     equ 0x0f
234
MCFG_METHOD_15       equ 0x0f
Line 235... Line 235...
235
 
235
 
236
PCFG_METHOD_1	    equ 0x01	; PHY Reg 0x03 bit0-3 == 0x0000
236
PCFG_METHOD_1       equ 0x01    ; PHY Reg 0x03 bit0-3 == 0x0000
237
PCFG_METHOD_2	    equ 0x02	; PHY Reg 0x03 bit0-3 == 0x0001
237
PCFG_METHOD_2       equ 0x02    ; PHY Reg 0x03 bit0-3 == 0x0001
238
PCFG_METHOD_3	    equ 0x03	; PHY Reg 0x03 bit0-3 == 0x0002
238
PCFG_METHOD_3       equ 0x03    ; PHY Reg 0x03 bit0-3 == 0x0002
239
 
239
 
240
virtual at 0
240
virtual at 0
241
  tx_desc:
241
  tx_desc:
242
  .status    dd ?
242
  .status    dd ?
243
  .vlan_tag  dd ?
243
  .vlan_tag  dd ?
Line 244... Line 244...
244
  .buf_addr  dq ?
244
  .buf_addr  dq ?
Line 245... Line 245...
245
  .size = $
245
  .size = $
Line 246... Line 246...
246
  rb	(NUM_TX_DESC-1)*tx_desc.size
246
  rb    (NUM_TX_DESC-1)*tx_desc.size
Line 247... Line 247...
247
  .buf_soft_addr	dd ?
247
  .buf_soft_addr        dd ?
248
end virtual
248
end virtual
249
 
249
 
250
virtual at 0
250
virtual at 0
251
  rx_desc:
251
  rx_desc:
252
  .status    dd ?
252
  .status    dd ?
253
  .vlan_tag  dd ?
253
  .vlan_tag  dd ?
254
  .buf_addr  dq ?
254
  .buf_addr  dq ?
255
  .size = $
255
  .size = $
256
  rb	(NUM_RX_DESC-1)*rx_desc.size
256
  rb    (NUM_RX_DESC-1)*rx_desc.size
257
  .buf_soft_addr	dd ?
257
  .buf_soft_addr        dd ?
258
end virtual
258
end virtual
259
 
259
 
260
virtual at ebx
260
virtual at ebx
261
 
261
 
262
	device:
262
        device:
Line 263... Line 263...
263
 
263
 
264
	ETH_DEVICE
264
        ETH_DEVICE
Line 265... Line 265...
265
 
265
 
266
	.io_addr	dd ?
266
        .io_addr        dd ?
Line 267... Line 267...
267
	.pci_bus	db ?
267
        .pci_bus        db ?
Line 268... Line 268...
268
	.pci_dev	db ?
268
        .pci_dev        db ?
Line 269... Line 269...
269
	.irq_line	db ?
269
        .irq_line       db ?
270
 
270
 
Line 271... Line 271...
271
	tpc:
271
        tpc:
Line 272... Line 272...
272
	.mmio_addr	dd ? ; memory map physical address
272
        .mmio_addr      dd ? ; memory map physical address
273
	.chipset	dd ?
273
        .chipset        dd ?
274
	.pcfg		dd ?
274
        .pcfg           dd ?
275
	.mcfg		dd ?
275
        .mcfg           dd ?
Line 276... Line 276...
276
	.cur_rx 	dd ? ; Index into the Rx descriptor buffer of next Rx pkt
276
        .cur_rx         dd ? ; Index into the Rx descriptor buffer of next Rx pkt
Line 277... Line 277...
277
	.cur_tx 	dd ? ; Index into the Tx descriptor buffer of next Rx pkt
277
        .cur_tx         dd ? ; Index into the Tx descriptor buffer of next Rx pkt
Line 278... Line 278...
278
	.TxDescArrays	dd ? ; Index of Tx Descriptor buffer
278
        .TxDescArrays   dd ? ; Index of Tx Descriptor buffer
279
	.RxDescArrays	dd ? ; Index of Rx Descriptor buffer
279
        .RxDescArrays   dd ? ; Index of Rx Descriptor buffer
280
	.TxDescArray	dd ? ; Index of 256-alignment Tx Descriptor buffer
280
        .TxDescArray    dd ? ; Index of 256-alignment Tx Descriptor buffer
281
	.RxDescArray	dd ? ; Index of 256-alignment Rx Descriptor buffer
281
        .RxDescArray    dd ? ; Index of 256-alignment Rx Descriptor buffer
282
 
282
 
283
	rb 256-(($ - device) and 255)		   ;        align 256
283
        rb 256-(($ - device) and 255)              ;        align 256
284
	tx_ring rb NUM_TX_DESC * tx_desc.size * 2
284
        tx_ring rb NUM_TX_DESC * tx_desc.size * 2
285
 
285
 
Line 286... Line 286...
286
	rb 256-(($ - device) and 255)		   ;        align 256
286
        rb 256-(($ - device) and 255)              ;        align 256
287
	rx_ring rb NUM_RX_DESC * rx_desc.size * 2
287
        rx_ring rb NUM_RX_DESC * rx_desc.size * 2
Line 288... Line 288...
288
 
288
 
Line 289... Line 289...
289
	device_size = $ - device
289
        device_size = $ - device
Line 290... Line 290...
290
 
290
 
291
end virtual
291
end virtual
292
 
292
 
Line 293... Line 293...
293
intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK
293
intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK
294
rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E
294
rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E
Line 295... Line 295...
295
 
295
 
296
 
296
 
297
macro	udelay msec {
297
macro   udelay msec {
Line 298... Line 298...
298
 
298
 
299
	push	esi
299
        push    esi
300
	mov	esi, msec
300
        mov     esi, msec
301
	call	Sleep
301
        call    Sleep
Line 302... Line 302...
302
	pop	esi
302
        pop     esi
303
 
303
 
Line 304... Line 304...
304
}
304
}
Line 305... Line 305...
305
 
305
 
306
macro	WRITE_GMII_REG	RegAddr, value {
306
macro   WRITE_GMII_REG  RegAddr, value {
307
 
307
 
308
	set_io	REG_PHYAR
308
        set_io  REG_PHYAR
309
	if	value eq ax
309
        if      value eq ax
310
	and	eax, 0x0000ffff
310
        and     eax, 0x0000ffff
311
	or	eax, 0x80000000 + (RegAddr shl 16)
311
        or      eax, 0x80000000 + (RegAddr shl 16)
312
	else
312
        else
313
	mov	eax, 0x80000000 + (RegAddr shl 16) + value
313
        mov     eax, 0x80000000 + (RegAddr shl 16) + value
314
	end if
314
        end if
315
	out	dx, eax
315
        out     dx, eax
316
 
316
 
Line 317... Line 317...
317
	call	PHY_WAIT
317
        call    PHY_WAIT
Line 367... Line 367...
367
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
367
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Line 368... Line 368...
368
 
368
 
369
align 4
369
align 4
Line 370... Line 370...
370
proc START stdcall, state:dword
370
proc START stdcall, state:dword
371
 
371
 
Line 372... Line 372...
372
	cmp [state], 1
372
        cmp [state], 1
Line 373... Line 373...
373
	jne .exit
373
        jne .exit
374
 
374
 
375
  .entry:
375
  .entry:
Line 376... Line 376...
376
 
376
 
377
	DEBUGF	2,"Loading rtl8169 driver\n"
377
        DEBUGF  2,"Loading rtl8169 driver\n"
378
	stdcall RegService, my_service, service_proc
378
        stdcall RegService, my_service, service_proc
379
	ret
379
        ret
Line 380... Line 380...
380
 
380
 
Line 381... Line 381...
381
  .fail:
381
  .fail:
Line 394... Line 394...
394
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
394
;;;;;;;;;;;;;;;;;;;;;;;;;;;;
Line 395... Line 395...
395
 
395
 
396
align 4
396
align 4
Line 397... Line 397...
397
proc service_proc stdcall, ioctl:dword
397
proc service_proc stdcall, ioctl:dword
398
 
398
 
Line 399... Line 399...
399
	mov	edx, [ioctl]
399
        mov     edx, [ioctl]
Line 400... Line 400...
400
	mov	eax, [IOCTL.io_code]
400
        mov     eax, [IOCTL.io_code]
401
 
401
 
Line 402... Line 402...
402
;------------------------------------------------------
402
;------------------------------------------------------
403
 
403
 
404
	cmp	eax, 0 ;SRV_GETVERSION
404
        cmp     eax, 0 ;SRV_GETVERSION
405
	jne	@F
405
        jne     @F
Line 406... Line 406...
406
 
406
 
407
	cmp	[IOCTL.out_size], 4
407
        cmp     [IOCTL.out_size], 4
Line 408... Line 408...
408
	jl	.fail
408
        jl      .fail
409
	mov	eax, [IOCTL.output]
409
        mov     eax, [IOCTL.output]
410
	mov	[eax], dword API_VERSION
410
        mov     [eax], dword API_VERSION
411
 
411
 
Line 412... Line 412...
412
	xor	eax, eax
412
        xor     eax, eax
413
	ret
413
        ret
Line 414... Line 414...
414
 
414
 
415
;------------------------------------------------------
415
;------------------------------------------------------
416
  @@:
416
  @@:
Line 417... Line 417...
417
	cmp	eax, 1 ;SRV_HOOK
417
        cmp     eax, 1 ;SRV_HOOK
Line 418... Line 418...
418
	jne	.fail
418
        jne     .fail
419
 
419
 
420
	cmp	[IOCTL.inp_size], 3			; Data input must be at least 3 bytes
420
        cmp     [IOCTL.inp_size], 3                     ; Data input must be at least 3 bytes
421
	jl	.fail
421
        jl      .fail
Line 422... Line 422...
422
 
422
 
423
	mov	eax, [IOCTL.input]
423
        mov     eax, [IOCTL.input]
424
	cmp	byte [eax], 1				; 1 means device number and bus number (pci) are given
424
        cmp     byte [eax], 1                           ; 1 means device number and bus number (pci) are given
425
	jne	.fail					; other types arent supported for this card yet
425
        jne     .fail                                   ; other types arent supported for this card yet
426
 
426
 
427
; check if the device is already listed
427
; check if the device is already listed
428
 
428
 
429
	mov	esi, device_list
429
        mov     esi, device_list
Line 430... Line 430...
430
	mov	ecx, [devices]
430
        mov     ecx, [devices]
431
	test	ecx, ecx
431
        test    ecx, ecx
432
	jz	.firstdevice
432
        jz      .firstdevice
433
 
433
 
Line 434... Line 434...
434
;        mov     eax, [IOCTL.input]                     ; get the pci bus and device numbers
434
;        mov     eax, [IOCTL.input]                     ; get the pci bus and device numbers
Line 435... Line 435...
435
	mov	ax , [eax+1]				;
435
        mov     ax , [eax+1]                            ;
Line 436... Line 436...
436
  .nextdevice:
436
  .nextdevice:
437
	mov	ebx, [esi]
437
        mov     ebx, [esi]
438
	cmp	ax , word [device.pci_bus]		; compare with pci and device num in device list (notice the usage of word instead of byte)
438
        cmp     ax , word [device.pci_bus]              ; compare with pci and device num in device list (notice the usage of word instead of byte)
439
	je	.find_devicenum 			; Device is already loaded, let's find it's device number
439
        je      .find_devicenum                         ; Device is already loaded, let's find it's device number
440
	add	esi, 4
440
        add     esi, 4
441
	loop	.nextdevice
441
        loop    .nextdevice
Line 442... Line 442...
442
 
442
 
Line 443... Line 443...
443
 
443
 
444
; This device doesnt have its own eth_device structure yet, lets create one
444
; This device doesnt have its own eth_device structure yet, lets create one
445
  .firstdevice:
445
  .firstdevice:
446
	cmp	[devices], MAX_DEVICES			; First check if the driver can handle one more card
446
        cmp     [devices], MAX_DEVICES                  ; First check if the driver can handle one more card
447
	jge	.fail
447
        jge     .fail
Line 448... Line 448...
448
 
448
 
Line 449... Line 449...
449
	allocate_and_clear ebx, device_size, .fail	; Allocate memory to put the device structure in
449
        allocate_and_clear ebx, device_size, .fail      ; Allocate memory to put the device structure in
450
 
450
 
451
; Fill in the direct call addresses into the struct
451
; Fill in the direct call addresses into the struct
Line 452... Line 452...
452
 
452
 
Line 453... Line 453...
453
	mov	[device.reset], reset
453
        mov     [device.reset], reset
Line 454... Line 454...
454
	mov	[device.transmit], transmit
454
        mov     [device.transmit], transmit
455
	mov	[device.get_MAC], read_mac
455
        mov     [device.get_MAC], read_mac
Line 456... Line 456...
456
	mov	[device.set_MAC], write_mac
456
        mov     [device.set_MAC], write_mac
457
	mov	[device.unload], unload
457
        mov     [device.unload], unload
458
	mov	[device.name], my_service
458
        mov     [device.name], my_service
459
 
459
 
460
; save the pci bus and device numbers
460
; save the pci bus and device numbers
Line 461... Line 461...
461
 
461
 
462
	mov	eax, [IOCTL.input]
462
        mov     eax, [IOCTL.input]
463
	mov	cl , [eax+1]
463
        mov     cl , [eax+1]
Line 464... Line 464...
464
	mov	[device.pci_bus], cl
464
        mov     [device.pci_bus], cl
465
	mov	cl , [eax+2]
465
        mov     cl , [eax+2]
Line 466... Line 466...
466
	mov	[device.pci_dev], cl
466
        mov     [device.pci_dev], cl
467
 
467
 
Line 468... Line 468...
468
; Now, it's time to find the base io addres of the PCI device
468
; Now, it's time to find the base io addres of the PCI device
Line 469... Line 469...
469
 
469
 
Line 470... Line 470...
470
	find_io [device.pci_bus], [device.pci_dev], [device.io_addr]
470
        find_io [device.pci_bus], [device.pci_dev], [device.io_addr]
471
	mov	eax, [device.io_addr]
471
        mov     eax, [device.io_addr]
472
	mov	[tpc.mmio_addr], eax
472
        mov     [tpc.mmio_addr], eax
473
 
473
 
474
; We've found the io address, find IRQ now
474
; We've found the io address, find IRQ now
475
 
475
 
476
	find_irq [device.pci_bus], [device.pci_dev], [device.irq_line]
476
        find_irq [device.pci_bus], [device.pci_dev], [device.irq_line]
477
 
477
 
Line 478... Line 478...
478
	DEBUGF	2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
478
        DEBUGF  2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\
Line 479... Line 479...
479
	[device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8
479
        [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8
480
 
480
 
Line 481... Line 481...
481
; Ok, the eth_device structure is ready, let's probe the device
481
; Ok, the eth_device structure is ready, let's probe the device
482
; Because initialization fires IRQ, IRQ handler must be aware of this device
482
; Because initialization fires IRQ, IRQ handler must be aware of this device
483
	mov	eax, [devices]						; Add the device structure to our device list
483
        mov     eax, [devices]                                          ; Add the device structure to our device list
484
	mov	[device_list+4*eax], ebx				; (IRQ handler uses this list to find device)
484
        mov     [device_list+4*eax], ebx                                ; (IRQ handler uses this list to find device)
485
	inc	[devices]						;
485
        inc     [devices]                                               ;
Line 486... Line 486...
486
 
486
 
487
	call	probe							; this function will output in eax
487
        call    probe                                                   ; this function will output in eax
488
	test	eax, eax
488
        test    eax, eax
Line 489... Line 489...
489
	jnz	.err2							; If an error occured, exit
489
        jnz     .err2                                                   ; If an error occured, exit
490
 
490
 
Line 491... Line 491...
491
 
491
 
492
	mov	[device.type], NET_TYPE_ETH
492
        mov     [device.type], NET_TYPE_ETH
Line 493... Line 493...
493
	call	NetRegDev
493
        call    NetRegDev
Line 494... Line 494...
494
 
494
 
495
	cmp	eax, -1
495
        cmp     eax, -1
Line 496... Line 496...
496
	je	.destroy
496
        je      .destroy
Line 497... Line 497...
497
 
497
 
Line 498... Line 498...
498
	ret
498
        ret
499
 
499
 
500
; If the device was already loaded, find the device number and return it in eax
500
; If the device was already loaded, find the device number and return it in eax
501
 
501
 
502
  .find_devicenum:
502
  .find_devicenum:
503
	DEBUGF	2,"Trying to find device number of already registered device\n"
503
        DEBUGF  2,"Trying to find device number of already registered device\n"
504
	mov	ebx, eax
504
        mov     ebx, eax
505
	call	NetPtrToNum						; This kernel procedure converts a pointer to device struct in ebx
505
        call    NetPtrToNum                                             ; This kernel procedure converts a pointer to device struct in ebx
506
									; into a device number in edi
506
                                                                        ; into a device number in edi
507
	mov	eax, edi						; Application wants it in eax instead
507
        mov     eax, edi                                                ; Application wants it in eax instead
508
	DEBUGF	2,"Kernel says: %u\n", eax
508
        DEBUGF  2,"Kernel says: %u\n", eax
509
	ret
509
        ret
510
 
510
 
511
; If an error occured, remove all allocated data and exit (returning -1 in eax)
511
; If an error occured, remove all allocated data and exit (returning -1 in eax)
512
 
512
 
513
  .destroy:
513
  .destroy:
514
	; todo: reset device into virgin state
514
        ; todo: reset device into virgin state
515
 
515
 
516
  .err2:
516
  .err2:
517
	dec	[devices]
517
        dec     [devices]
518
  .err:
518
  .err:
519
	DEBUGF	2,"removing device structure\n"
519
        DEBUGF  2,"removing device structure\n"
520
	stdcall KernelFree, ebx
520
        stdcall KernelFree, ebx
521
 
521
 
522
 
522
 
523
  .fail:
523
  .fail:
524
	or	eax, -1
524
        or      eax, -1
525
	ret
525
        ret
526
 
526
 
527
;------------------------------------------------------
527
;------------------------------------------------------
528
endp
528
endp
529
 
529
 
530
 
530
 
531
align 4
531
align 4
532
unload:
532
unload:
533
 
533
 
534
	ret
534
        ret
535
 
535
 
536
 
536
 
537
align 4
537
align 4
Line 538... Line 538...
538
init_board:
538
init_board:
539
 
539
 
540
	DEBUGF	1,"init_board\n"
540
        DEBUGF  1,"init_board\n"
541
 
541
 
542
	make_bus_master [device.pci_bus], [device.pci_dev]
542
        make_bus_master [device.pci_bus], [device.pci_dev]
543
 
543
 
544
	; Soft reset the chip
544
        ; Soft reset the chip
545
	set_io	0
545
        set_io  0
546
	set_io	REG_ChipCmd
546
        set_io  REG_ChipCmd
547
	mov	al, CMD_Reset
547
        mov     al, CMD_Reset
548
	out	dx, al
548
        out     dx, al
549
 
549
 
550
	; Check that the chip has finished the reset
550
        ; Check that the chip has finished the reset
551
	mov	ecx, 1000
551
        mov     ecx, 1000
552
	set_io	REG_ChipCmd
552
        set_io  REG_ChipCmd
553
    @@: in	al, dx
553
    @@: in      al, dx
554
	test	al, CMD_Reset
554
        test    al, CMD_Reset
555
	jz	@f
555
        jz      @f
556
	udelay	10
556
        udelay  10
557
	loop	@b
557
        loop    @b
558
    @@:
558
    @@:
Line 559... Line 559...
559
	; identify config method
559
        ; identify config method
560
	set_io	REG_TxConfig
560
        set_io  REG_TxConfig
561
	in	eax, dx
561
        in      eax, dx
562
	and	eax, 0x7c800000
562
        and     eax, 0x7c800000
Line 563... Line 563...
563
	DEBUGF	1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax
563
        DEBUGF  1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax
564
	mov	esi, mac_info-8
564
        mov     esi, mac_info-8
Line 622... Line 622...
622
;
622
;
623
;***************************************************************************
623
;***************************************************************************
624
align 4
624
align 4
625
probe:
625
probe:
Line 626... Line 626...
626
 
626
 
Line 627... Line 627...
627
	DEBUGF	1,"probe\n"
627
        DEBUGF  1,"probe\n"
Line 628... Line 628...
628
 
628
 
Line 629... Line 629...
629
	call	init_board
629
        call    init_board
Line 630... Line 630...
630
 
630
 
631
	call	read_mac
631
        call    read_mac
632
 
632
 
633
	call	PHY_config
633
        call    PHY_config
634
 
634
 
635
;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
635
;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
636
	set_io	0
636
        set_io  0
637
	set_io	0x82
637
        set_io  0x82
638
	mov	al, 0x01
638
        mov     al, 0x01
639
	out	dx, al
639
        out     dx, al
640
	cmp	[tpc.mcfg], MCFG_METHOD_03
640
        cmp     [tpc.mcfg], MCFG_METHOD_03
641
	jae	@f
641
        jae     @f
642
;       DEBUGF  1,"K :   Set PCI Latency=0x40\n"
642
;       DEBUGF  1,"K :   Set PCI Latency=0x40\n"
643
;       stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40
643
;       stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40
644
   @@:
644
   @@:
645
	cmp	[tpc.mcfg], MCFG_METHOD_02
645
        cmp     [tpc.mcfg], MCFG_METHOD_02
646
	jne	@f
646
        jne     @f
647
;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
647
;       DEBUGF  1,"K :   Set MAC Reg C+CR Offset 0x82h = 0x01h\n"
648
	set_io	0x82
648
        set_io  0x82
649
	mov	al, 0x01
649
        mov     al, 0x01
650
	out	dx, al
650
        out     dx, al
651
;       DEBUGF  1,"K :   Set PHY Reg 0x0bh = 0x00h\n"
651
;       DEBUGF  1,"K :   Set PHY Reg 0x0bh = 0x00h\n"
652
	WRITE_GMII_REG 0x0b, 0x0000	 ; w 0x0b 15 0 0
652
        WRITE_GMII_REG 0x0b, 0x0000      ; w 0x0b 15 0 0
653
    @@:
653
    @@:
654
	; if TBI is not enabled
654
        ; if TBI is not enabled
655
	set_io	0
655
        set_io  0
656
	set_io	REG_PHYstatus
656
        set_io  REG_PHYstatus
657
	in	al, dx
657
        in      al, dx
658
	test	al, PHYS_TBI_Enable
658
        test    al, PHYS_TBI_Enable
659
	jz	.tbi_dis
659
        jz      .tbi_dis
660
	READ_GMII_REG PHY_AUTO_NEGO_REG
660
        READ_GMII_REG PHY_AUTO_NEGO_REG
661
 
661
 
662
	; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
662
        ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
663
	and	eax, 0x0C1F
663
        and     eax, 0x0C1F
664
	or	eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full
664
        or      eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full
665
	WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax
665
        WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax
666
 
666
 
667
	; enable 1000 Full Mode
667
        ; enable 1000 Full Mode
668
	WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168
668
        WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168
669
 
669
 
670
	; Enable auto-negotiation and restart auto-nigotiation
670
        ; Enable auto-negotiation and restart auto-nigotiation
671
	WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego
671
        WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego
672
 
672
 
673
	udelay	100
673
        udelay  100
674
	mov	ecx, 10000
674
        mov     ecx, 10000
675
	; wait for auto-negotiation process
675
        ; wait for auto-negotiation process
676
    @@: dec	ecx
676
    @@: dec     ecx
677
	jz	@f
677
        jz      @f
678
	set_io	0
678
        set_io  0
679
	READ_GMII_REG PHY_STAT_REG
679
        READ_GMII_REG PHY_STAT_REG
680
	udelay	100
680
        udelay  100
681
	test	eax, PHY_Auto_Neco_Comp
681
        test    eax, PHY_Auto_Neco_Comp
682
	jz	@b
682
        jz      @b
683
	set_io	REG_PHYstatus
683
        set_io  REG_PHYstatus
Line 684... Line 684...
684
	in	al, dx
684
        in      al, dx
685
	jmp	@f
685
        jmp     @f
Line 698... Line 698...
698
;
698
;
699
;***************************************************************************
699
;***************************************************************************
700
align 4
700
align 4
701
reset:
701
reset:
Line 702... Line 702...
702
 
702
 
Line 703... Line 703...
703
	DEBUGF	1,"reset\n"
703
        DEBUGF  1,"reset\n"
704
 
704
 
705
	lea	eax, [tx_ring]
705
        lea     eax, [tx_ring]
706
	mov	[tpc.TxDescArrays], eax
706
        mov     [tpc.TxDescArrays], eax
707
	mov	[tpc.TxDescArray], eax
707
        mov     [tpc.TxDescArray], eax
708
 
708
 
709
	lea	eax, [rx_ring]
709
        lea     eax, [rx_ring]
Line 710... Line 710...
710
	mov	[tpc.RxDescArrays], eax
710
        mov     [tpc.RxDescArrays], eax
711
	mov	[tpc.RxDescArray], eax
711
        mov     [tpc.RxDescArray], eax
Line 712... Line 712...
712
 
712
 
Line 713... Line 713...
713
	call	init_ring
713
        call    init_ring
714
	call	hw_start
714
        call    hw_start
715
 
715
 
716
; clear packet/byte counters
716
; clear packet/byte counters
Line 717... Line 717...
717
 
717
 
Line 718... Line 718...
718
	xor	eax, eax
718
        xor     eax, eax
719
	lea	edi, [device.bytes_tx]
719
        lea     edi, [device.bytes_tx]
Line 720... Line 720...
720
	mov	ecx, 6
720
        mov     ecx, 6
721
	rep	stosd
721
        rep     stosd
Line 722... Line 722...
722
 
722
 
Line 723... Line 723...
723
	mov	[device.mtu], 1500
723
        mov     [device.mtu], 1500
724
 
724
 
725
	xor	eax, eax
725
        xor     eax, eax
726
	ret
726
        ret
727
 
727
 
728
 
728
 
729
 
729
 
730
 
730
 
731
 
731
 
732
align 4
732
align 4
733
PHY_config:
733
PHY_config:
734
 
734
 
735
	DEBUGF	1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg]
735
        DEBUGF  1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg]
736
 
736
 
737
	cmp	[tpc.mcfg], MCFG_METHOD_04
737
        cmp     [tpc.mcfg], MCFG_METHOD_04
738
	jne	.not_4
738
        jne     .not_4
739
	set_io	0
739
        set_io  0
740
;       WRITE_GMII_REG 0x1F, 0x0001
740
;       WRITE_GMII_REG 0x1F, 0x0001
741
;       WRITE_GMII_REG 0x1b, 0x841e
741
;       WRITE_GMII_REG 0x1b, 0x841e
742
;       WRITE_GMII_REG 0x0e, 0x7bfb
742
;       WRITE_GMII_REG 0x0e, 0x7bfb
743
;       WRITE_GMII_REG 0x09, 0x273a
743
;       WRITE_GMII_REG 0x09, 0x273a
744
	WRITE_GMII_REG 0x1F, 0x0002
744
        WRITE_GMII_REG 0x1F, 0x0002
745
	WRITE_GMII_REG 0x01, 0x90D0
745
        WRITE_GMII_REG 0x01, 0x90D0
746
	WRITE_GMII_REG 0x1F, 0x0000
746
        WRITE_GMII_REG 0x1F, 0x0000
747
	jmp	.exit
747
        jmp     .exit
748
  .not_4:
748
  .not_4:
749
	cmp	[tpc.mcfg], MCFG_METHOD_02
749
        cmp     [tpc.mcfg], MCFG_METHOD_02
750
	je	@f
750
        je      @f
751
	cmp	[tpc.mcfg], MCFG_METHOD_03
751
        cmp     [tpc.mcfg], MCFG_METHOD_03
752
	jne	.not_2_or_3
752
        jne     .not_2_or_3
753
    @@:
753
    @@:
754
	set_io	0
754
        set_io  0
755
	WRITE_GMII_REG 0x1F, 0x0001
755
        WRITE_GMII_REG 0x1F, 0x0001
756
	WRITE_GMII_REG 0x15, 0x1000
756
        WRITE_GMII_REG 0x15, 0x1000
757
	WRITE_GMII_REG 0x18, 0x65C7
757
        WRITE_GMII_REG 0x18, 0x65C7
758
	WRITE_GMII_REG 0x04, 0x0000
758
        WRITE_GMII_REG 0x04, 0x0000
759
	WRITE_GMII_REG 0x03, 0x00A1
759
        WRITE_GMII_REG 0x03, 0x00A1
760
	WRITE_GMII_REG 0x02, 0x0008
760
        WRITE_GMII_REG 0x02, 0x0008
761
	WRITE_GMII_REG 0x01, 0x1020
761
        WRITE_GMII_REG 0x01, 0x1020
762
	WRITE_GMII_REG 0x00, 0x1000
762
        WRITE_GMII_REG 0x00, 0x1000
763
	WRITE_GMII_REG 0x04, 0x0800
763
        WRITE_GMII_REG 0x04, 0x0800
764
	WRITE_GMII_REG 0x04, 0x0000
764
        WRITE_GMII_REG 0x04, 0x0000
765
	WRITE_GMII_REG 0x04, 0x7000
765
        WRITE_GMII_REG 0x04, 0x7000
766
	WRITE_GMII_REG 0x03, 0xFF41
766
        WRITE_GMII_REG 0x03, 0xFF41
767
	WRITE_GMII_REG 0x02, 0xDE60
767
        WRITE_GMII_REG 0x02, 0xDE60
768
	WRITE_GMII_REG 0x01, 0x0140
768
        WRITE_GMII_REG 0x01, 0x0140
769
	WRITE_GMII_REG 0x00, 0x0077
769
        WRITE_GMII_REG 0x00, 0x0077
770
	WRITE_GMII_REG 0x04, 0x7800
770
        WRITE_GMII_REG 0x04, 0x7800
771
	WRITE_GMII_REG 0x04, 0x7000
771
        WRITE_GMII_REG 0x04, 0x7000
772
	WRITE_GMII_REG 0x04, 0xA000
772
        WRITE_GMII_REG 0x04, 0xA000
773
	WRITE_GMII_REG 0x03, 0xDF01
773
        WRITE_GMII_REG 0x03, 0xDF01
774
	WRITE_GMII_REG 0x02, 0xDF20
774
        WRITE_GMII_REG 0x02, 0xDF20
775
	WRITE_GMII_REG 0x01, 0xFF95
775
        WRITE_GMII_REG 0x01, 0xFF95
776
	WRITE_GMII_REG 0x00, 0xFA00
776
        WRITE_GMII_REG 0x00, 0xFA00
777
	WRITE_GMII_REG 0x04, 0xA800
777
        WRITE_GMII_REG 0x04, 0xA800
778
	WRITE_GMII_REG 0x04, 0xA000
778
        WRITE_GMII_REG 0x04, 0xA000
779
	WRITE_GMII_REG 0x04, 0xB000
779
        WRITE_GMII_REG 0x04, 0xB000
780
	WRITE_GMII_REG 0x03, 0xFF41
780
        WRITE_GMII_REG 0x03, 0xFF41
781
	WRITE_GMII_REG 0x02, 0xDE20
781
        WRITE_GMII_REG 0x02, 0xDE20
782
	WRITE_GMII_REG 0x01, 0x0140
782
        WRITE_GMII_REG 0x01, 0x0140
783
	WRITE_GMII_REG 0x00, 0x00BB
783
        WRITE_GMII_REG 0x00, 0x00BB
784
	WRITE_GMII_REG 0x04, 0xB800
784
        WRITE_GMII_REG 0x04, 0xB800
785
	WRITE_GMII_REG 0x04, 0xB000
785
        WRITE_GMII_REG 0x04, 0xB000
786
	WRITE_GMII_REG 0x04, 0xF000
786
        WRITE_GMII_REG 0x04, 0xF000
Line 787... Line 787...
787
	WRITE_GMII_REG 0x03, 0xDF01
787
        WRITE_GMII_REG 0x03, 0xDF01
788
	WRITE_GMII_REG 0x02, 0xDF20
788
        WRITE_GMII_REG 0x02, 0xDF20
Line 789... Line 789...
789
	WRITE_GMII_REG 0x01, 0xFF95
789
        WRITE_GMII_REG 0x01, 0xFF95
Line 790... Line 790...
790
	WRITE_GMII_REG 0x00, 0xBF00
790
        WRITE_GMII_REG 0x00, 0xBF00
791
	WRITE_GMII_REG 0x04, 0xF800
791
        WRITE_GMII_REG 0x04, 0xF800
792
	WRITE_GMII_REG 0x04, 0xF000
792
        WRITE_GMII_REG 0x04, 0xF000
793
	WRITE_GMII_REG 0x04, 0x0000
793
        WRITE_GMII_REG 0x04, 0x0000
794
	WRITE_GMII_REG 0x1F, 0x0000
794
        WRITE_GMII_REG 0x1F, 0x0000
795
	WRITE_GMII_REG 0x0B, 0x0000
795
        WRITE_GMII_REG 0x0B, 0x0000
796
	jmp	.exit
796
        jmp     .exit
797
  .not_2_or_3:
797
  .not_2_or_3:
798
	DEBUGF	1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg]
798
        DEBUGF  1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg]
799
  .exit:
799
  .exit:
800
	ret
800
        ret
801
 
801
 
802
 
802
 
803
 
803
 
804
align 4
804
align 4
805
set_rx_mode:
805
set_rx_mode:
Line 806... Line 806...
806
 
806
 
Line 807... Line 807...
807
	DEBUGF	1,"set_rx_mode\n"
807
        DEBUGF  1,"set_rx_mode\n"
808
 
808
 
Line 809... Line 809...
809
	; IFF_ALLMULTI
809
        ; IFF_ALLMULTI
Line 810... Line 810...
810
	; Too many to filter perfectly -- accept all multicasts
810
        ; Too many to filter perfectly -- accept all multicasts
811
	set_io	0
811
        set_io  0
812
	set_io	REG_RxConfig
812
        set_io  REG_RxConfig
813
	in	eax, dx
813
        in      eax, dx
814
	mov	ecx, [tpc.chipset]
814
        mov     ecx, [tpc.chipset]
815
	and	eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask
815
        and     eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask
816
	or	eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys)
816
        or      eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys)
817
	out	dx, eax
817
        out     dx, eax
818
 
818
 
819
	; Multicast hash filter
819
        ; Multicast hash filter
820
	set_io	REG_MAR0 + 0
820
        set_io  REG_MAR0 + 0
Line 821... Line 821...
821
	or	eax, -1
821
        or      eax, -1
822
	out	dx, eax
822
        out     dx, eax
823
	set_io	REG_MAR0 + 4
823
        set_io  REG_MAR0 + 4
824
	out	dx, eax
824
        out     dx, eax
825
 
825
 
826
	ret
826
        ret
827
 
827
 
828
 
828
 
829
align 4
829
align 4
830
init_ring:
830
init_ring:
831
 
831
 
832
	DEBUGF	1,"init_ring\n"
832
        DEBUGF  1,"init_ring\n"
833
 
833
 
Line 834... Line 834...
834
	xor	eax, eax
834
        xor     eax, eax
Line 835... Line 835...
835
	mov	[tpc.cur_rx], eax
835
        mov     [tpc.cur_rx], eax
836
	mov	[tpc.cur_tx], eax
836
        mov     [tpc.cur_tx], eax
Line 837... Line 837...
837
 
837
 
Line 838... Line 838...
838
	lea	edi, [tx_ring]
838
        lea     edi, [tx_ring]
839
	mov	ecx, (NUM_TX_DESC * tx_desc.size) / 4
839
        mov     ecx, (NUM_TX_DESC * tx_desc.size) / 4
840
	rep	stosd
840
        rep     stosd
841
 
841
 
842
	lea	edi, [rx_ring]
842
        lea     edi, [rx_ring]
843
	mov	ecx, (NUM_RX_DESC * rx_desc.size) / 4
843
        mov     ecx, (NUM_RX_DESC * rx_desc.size) / 4
844
	rep	stosd
844
        rep     stosd
845
 
845
 
846
	mov	edi, [tpc.RxDescArray]
846
        mov     edi, [tpc.RxDescArray]
847
	mov	ecx, NUM_RX_DESC
847
        mov     ecx, NUM_RX_DESC
848
  .loop:
848
  .loop:
849
	push	ecx
849
        push    ecx
850
	stdcall KernelAlloc, RX_BUF_SIZE
850
        stdcall KernelAlloc, RX_BUF_SIZE
851
	mov	[edi + rx_desc.buf_soft_addr], eax
851
        mov     [edi + rx_desc.buf_soft_addr], eax
852
	call	GetPgAddr
852
        call    GetPgAddr
853
	mov	dword [edi + rx_desc.buf_addr], eax
853
        mov     dword [edi + rx_desc.buf_addr], eax
854
	mov	[edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE
854
        mov     [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE
855
	add	edi, rx_desc.size
855
        add     edi, rx_desc.size
856
	pop	ecx
856
        pop     ecx
857
	loop	.loop
857
        loop    .loop
Line 858... Line 858...
858
	or	[edi - rx_desc.size + rx_desc.status], DSB_EORbit
858
        or      [edi - rx_desc.size + rx_desc.status], DSB_EORbit
859
 
859
 
860
	ret
860
        ret
861
 
861
 
862
 
862
 
863
align 4
863
align 4
864
hw_start:
864
hw_start:
865
 
865
 
866
	DEBUGF	1,"hw_start\n"
866
        DEBUGF  1,"hw_start\n"
867
 
867
 
868
; attach int handler
868
; attach int handler
869
	movzx	eax, [device.irq_line]
869
        movzx   eax, [device.irq_line]
870
	DEBUGF	1,"Attaching int handler to irq %x\n", eax:1
870
        DEBUGF  1,"Attaching int handler to irq %x\n", eax:1
871
	stdcall AttachIntHandler, eax, int_handler, dword 0
871
        stdcall AttachIntHandler, eax, int_handler, dword 0
872
 
872
 
873
	; Soft reset the chip
873
        ; Soft reset the chip
874
	set_io	0
874
        set_io  0
875
	set_io	REG_ChipCmd
875
        set_io  REG_ChipCmd
876
	mov	al, CMD_Reset
876
        mov     al, CMD_Reset
877
	out	dx, al
877
        out     dx, al
878
 
878
 
879
	; Check that the chip has finished the reset
879
        ; Check that the chip has finished the reset
880
	mov	ecx, 1000
880
        mov     ecx, 1000
881
	set_io	REG_ChipCmd
881
        set_io  REG_ChipCmd
882
    @@: in	al, dx
882
    @@: in      al, dx
883
	test	al, CMD_Reset
883
        test    al, CMD_Reset
884
	jz	@f
884
        jz      @f
885
	udelay	10
885
        udelay  10
886
	loop	@b
886
        loop    @b
887
    @@:
887
    @@:
888
 
888
 
889
	set_io	REG_Cfg9346
889
        set_io  REG_Cfg9346
890
	mov	al, CFG_9346_Unlock
890
        mov     al, CFG_9346_Unlock
891
	out	dx, al
891
        out     dx, al
892
 
892
 
893
	set_io	REG_ChipCmd
893
        set_io  REG_ChipCmd
894
	mov	al, CMD_TxEnb or CMD_RxEnb
894
        mov     al, CMD_TxEnb or CMD_RxEnb
895
	out	dx, al
895
        out     dx, al
896
 
896
 
897
	set_io	REG_ETThReg
897
        set_io  REG_ETThReg
898
	mov	al, ETTh
898
        mov     al, ETTh
899
	out	dx, al
899
        out     dx, al
900
 
900
 
901
	; For gigabit rtl8169
901
        ; For gigabit rtl8169
902
	set_io	REG_RxMaxSize
902
        set_io  REG_RxMaxSize
903
	mov	ax, RxPacketMaxSize
903
        mov     ax, RxPacketMaxSize
904
	out	dx, ax
904
        out     dx, ax
905
 
905
 
Line 906... Line 906...
906
	; Set Rx Config register
906
        ; Set Rx Config register
907
	set_io	REG_RxConfig
907
        set_io  REG_RxConfig
908
	in	ax, dx
908
        in      ax, dx
909
	mov	ecx, [tpc.chipset]
909
        mov     ecx, [tpc.chipset]
910
	and	eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask
910
        and     eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask
911
	or	eax, rx_config
911
        or      eax, rx_config
912
	out	dx, eax
912
        out     dx, eax
913
 
913
 
914
	; Set DMA burst size and Interframe Gap Time
914
        ; Set DMA burst size and Interframe Gap Time
Line 915... Line 915...
915
	set_io	REG_TxConfig
915
        set_io  REG_TxConfig
916
	mov	eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift)
916
        mov     eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift)
917
	out	dx, eax
917
        out     dx, eax
918
 
918
 
919
	set_io	REG_CPlusCmd
919
        set_io  REG_CPlusCmd
920
	in	ax, dx
920
        in      ax, dx
921
	out	dx, ax
921
        out     dx, ax
922
 
922
 
923
	in	ax, dx
923
        in      ax, dx
924
	or	ax, 1 shl 3
924
        or      ax, 1 shl 3
925
	cmp	[tpc.mcfg], MCFG_METHOD_02
925
        cmp     [tpc.mcfg], MCFG_METHOD_02
926
	jne	@f
926
        jne     @f
927
	cmp	[tpc.mcfg], MCFG_METHOD_03
927
        cmp     [tpc.mcfg], MCFG_METHOD_03
928
	jne	@f
928
        jne     @f
929
	or	ax,1 shl 14
929
        or      ax,1 shl 14
930
	DEBUGF	1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n"
930
        DEBUGF  1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n"
931
	jmp	.set
931
        jmp     .set
932
    @@:
932
    @@:
933
	DEBUGF	1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n"
933
        DEBUGF  1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n"
934
  .set:
934
  .set:
935
	set_io	REG_CPlusCmd
935
        set_io  REG_CPlusCmd
936
	out	dx, ax
936
        out     dx, ax
937
 
937
 
938
	set_io	0xE2
938
        set_io  0xE2
939
;        mov     ax, 0x1517
939
;        mov     ax, 0x1517
940
;        out     dx, ax
940
;        out     dx, ax
941
;        mov     ax, 0x152a
941
;        mov     ax, 0x152a
942
;        out     dx, ax
942
;        out     dx, ax
943
;        mov     ax, 0x282a
943
;        mov     ax, 0x282a
944
;        out     dx, ax
944
;        out     dx, ax
945
	xor	ax, ax
945
        xor     ax, ax
946
	out	dx, ax
946
        out     dx, ax
947
 
947
 
948
	xor	eax, eax
948
        xor     eax, eax
949
	mov	[tpc.cur_rx], eax
949
        mov     [tpc.cur_rx], eax
Line 950... Line 950...
950
	lea	eax, [tx_ring]
950
        lea     eax, [tx_ring]
951
	GetRealAddr
951
        GetRealAddr
Line 952... Line 952...
952
	set_io	REG_TxDescStartAddr
952
        set_io  REG_TxDescStartAddr
953
	out	dx, eax
953
        out     dx, eax
Line 954... Line 954...
954
 
954
 
955
	lea	eax, [rx_ring]
955
        lea     eax, [rx_ring]
956
	GetRealAddr
956
        GetRealAddr
957
	set_io	REG_RxDescStartAddr
957
        set_io  REG_RxDescStartAddr
958
	out	dx, eax
958
        out     dx, eax
959
 
959
 
960
	set_io	REG_Cfg9346
960
        set_io  REG_Cfg9346
961
	mov	al, CFG_9346_Lock
961
        mov     al, CFG_9346_Lock
962
	out	dx, al
962
        out     dx, al
963
 
963
 
964
	udelay	10
964
        udelay  10
Line 965... Line 965...
965
 
965
 
Line 966... Line 966...
966
	xor	eax, eax
966
        xor     eax, eax
Line 967... Line 967...
967
	set_io	REG_RxMissed
967
        set_io  REG_RxMissed
968
	out	dx, eax
968
        out     dx, eax
Line 969... Line 969...
969
 
969
 
Line 1024... Line 1024...
1024
;
1024
;
1025
;***************************************************************************
1025
;***************************************************************************
1026
align 4
1026
align 4
1027
transmit:
1027
transmit:
Line 1028... Line 1028...
1028
 
1028
 
1029
	DEBUGF	1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8]
1029
        DEBUGF  1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8]
1030
	mov	eax, [esp+4]
1030
        mov     eax, [esp+4]
1031
	DEBUGF	1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
1031
        DEBUGF  1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\
1032
	[eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
1032
        [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\
1033
	[eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
1033
        [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\
Line 1034... Line 1034...
1034
	[eax+13]:2,[eax+12]:2
1034
        [eax+13]:2,[eax+12]:2
1035
 
1035
 
Line 1036... Line 1036...
1036
	cmp	dword [esp+8], MAX_ETH_FRAME_SIZE
1036
        cmp     dword [esp+8], MAX_ETH_FRAME_SIZE
1037
	ja	.fail
1037
        ja      .fail
Line 1038... Line 1038...
1038
 
1038
 
1039
;----------------------------------
1039
;----------------------------------
1040
; Find currentTX descriptor address
1040
; Find currentTX descriptor address
Line 1041... Line 1041...
1041
 
1041
 
Line 1042... Line 1042...
1042
	mov	eax, tx_desc.size
1042
        mov     eax, tx_desc.size
1043
	mul	[tpc.cur_tx]
1043
        mul     [tpc.cur_tx]
Line 1044... Line 1044...
1044
	lea	esi, [eax + tx_ring]
1044
        lea     esi, [eax + tx_ring]
1045
 
1045
 
1046
	DEBUGF	1,"Using TX desc: %x\n", esi
1046
        DEBUGF  1,"Using TX desc: %x\n", esi
1047
 
1047
 
Line 1048... Line 1048...
1048
;---------------------------
1048
;---------------------------
1049
; Program the packet pointer
1049
; Program the packet pointer
Line 1050... Line 1050...
1050
 
1050
 
1051
	mov	eax, [esp + 4]
1051
        mov     eax, [esp + 4]
1052
	mov	[esi + tx_desc.buf_soft_addr], eax
1052
        mov     [esi + tx_desc.buf_soft_addr], eax
1053
	GetRealAddr
1053
        GetRealAddr
1054
	mov	dword [esi + tx_desc.buf_addr], eax
1054
        mov     dword [esi + tx_desc.buf_addr], eax
1055
 
1055
 
Line 1056... Line 1056...
1056
;------------------------
1056
;------------------------
1057
; Program the packet size
1057
; Program the packet size
Line 1058... Line 1058...
1058
 
1058
 
1059
	mov	eax, [esp + 8]
1059
        mov     eax, [esp + 8]
1060
    @@: or	eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit
1060
    @@: or      eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit
1061
	cmp	[tpc.cur_tx], NUM_TX_DESC - 1
1061
        cmp     [tpc.cur_tx], NUM_TX_DESC - 1
Line 1062... Line 1062...
1062
	jne	@f
1062
        jne     @f
1063
	or	eax, DSB_EORbit
1063
        or      eax, DSB_EORbit
Line 1064... Line 1064...
1064
    @@: mov	[esi + tx_desc.status], eax
1064
    @@: mov     [esi + tx_desc.status], eax
1065
 
1065
 
Line 1066... Line 1066...
1066
;-----------------------------------------
1066
;-----------------------------------------
1067
; Set the polling bit (start transmission)
1067
; Set the polling bit (start transmission)
Line 1068... Line 1068...
1068
 
1068
 
1069
	set_io	0
1069
        set_io  0
1070
	set_io	REG_TxPoll
1070
        set_io  REG_TxPoll
1071
	mov	al, 0x40     ; set polling bit
1071
        mov     al, 0x40     ; set polling bit
Line -... Line 1072...
-
 
1072
        out     dx, al
1072
	out	dx, al
1073
 
Line 1073... Line 1074...
1073
 
1074
;-----------------------
1074
;-----------------------
1075
; Update TX descriptor
1075
; Update TX descriptor
1076
 
1076
 
1077
        inc     [tpc.cur_tx]
1077
	inc	[tpc.cur_tx]
1078
        and     [tpc.cur_tx], NUM_TX_DESC - 1
Line 1078... Line 1079...
1078
	and	[tpc.cur_tx], NUM_TX_DESC - 1
1079
 
Line 1104... Line 1105...
1104
;;;;;;;;;;;;;;;;;;;;;;;
1105
;;;;;;;;;;;;;;;;;;;;;;;
Line 1105... Line 1106...
1105
 
1106
 
1106
align 4
1107
align 4
Line 1107... Line 1108...
1107
int_handler:
1108
int_handler:
Line 1108... Line 1109...
1108
 
1109
 
Line 1109... Line 1110...
1109
	DEBUGF	1,"IRQ %x ",eax:2
1110
        DEBUGF  1,"IRQ %x ",eax:2
1110
 
1111
 
1111
; find pointer of device wich made IRQ occur
1112
; find pointer of device wich made IRQ occur
1112
 
1113
 
1113
	mov	ecx, [devices]
1114
        mov     ecx, [devices]
1114
	test	ecx, ecx
1115
        test    ecx, ecx
Line 1115... Line 1116...
1115
	jz	.fail
1116
        jz      .fail
1116
	mov	esi, device_list
1117
        mov     esi, device_list
1117
  .nextdevice:
1118
  .nextdevice:
Line 1118... Line 1119...
1118
	mov	ebx, dword [esi]
1119
        mov     ebx, dword [esi]
1119
 
1120
 
Line 1120... Line 1121...
1120
	set_io	0
1121
        set_io  0
1121
	set_io	REG_IntrStatus
1122
        set_io  REG_IntrStatus
1122
	in	ax, dx
1123
        in      ax, dx
1123
 
1124
 
Line 1124... Line 1125...
1124
	test	ax, ax
1125
        test    ax, ax
Line 1125... Line 1126...
1125
	jnz	.got_it
1126
        jnz     .got_it
1126
 
1127
 
Line 1127... Line 1128...
1127
  .continue:
1128
  .continue:
1128
	add	esi, 4
1129
        add     esi, 4
Line 1129... Line 1130...
1129
	dec	ecx
1130
        dec     ecx
1130
	jnz	.nextdevice
1131
        jnz     .nextdevice
Line 1131... Line 1132...
1131
 
1132
 
1132
	ret						; If no device was found, abort (The irq was probably for a device, not registered to this driver)
1133
        ret                                             ; If no device was found, abort (The irq was probably for a device, not registered to this driver)
Line 1133... Line 1134...
1133
 
1134
 
1134
  .got_it:
1135
  .got_it:
Line 1135... Line 1136...
1135
	DEBUGF	1,"IntrStatus = 0x%x\n",ax
1136
        DEBUGF  1,"IntrStatus = 0x%x\n",ax
1136
 
1137
 
1137
	cmp	ax, 0xFFFF	; if so, hardware is no longer present
1138
        cmp     ax, 0xFFFF      ; if so, hardware is no longer present
1138
	je	.fail
1139
        je      .fail
1139
 
1140
 
1140
;--------
1141
;--------
1141
; Receive
1142
; Receive
1142
 
1143
 
1143
	test	ax, ISB_RxOK
1144
        test    ax, ISB_RxOK
1144
	jz	.no_rx
1145
        jz      .no_rx
1145
 
1146
 
1146
	push	ax
1147
        push    ax
1147
	push	ebx
1148
        push    ebx
1148
 
1149
 
1149
  .check_more:
1150
  .check_more:
1150
	pop	ebx
1151
        pop     ebx
1151
	DEBUGF	1,"ebx = 0x%x\n", ebx
1152
        DEBUGF  1,"ebx = 0x%x\n", ebx
1152
	mov	eax, rx_desc.size
1153
        mov     eax, rx_desc.size
1153
	mul	[tpc.cur_rx]
1154
        mul     [tpc.cur_rx]
1154
	lea	esi, [eax + rx_ring]
1155
        lea     esi, [eax + rx_ring]
1155
 
1156
 
1156
	DEBUGF	1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status]
1157
        DEBUGF  1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status]
1157
 
1158
 
1158
	mov	eax, [esi + rx_desc.status]
1159
        mov     eax, [esi + rx_desc.status]
Line 1159... Line 1160...
1159
	test	eax, DSB_OWNbit ;;;
1160
        test    eax, DSB_OWNbit ;;;
1160
	jnz	.rx_return
1161
        jnz     .rx_return
Line 1161... Line 1162...
1161
 
1162
 
1162
	DEBUGF	1,"tpc.cur_rx = %u\n", [tpc.cur_rx]
1163
        DEBUGF  1,"tpc.cur_rx = %u\n", [tpc.cur_rx]
1163
 
1164
 
Line 1164... Line 1165...
1164
	test	eax, SD_RxRES
1165
        test    eax, SD_RxRES
Line 1165... Line 1166...
1165
	jnz	.rx_return	;;;;; RX error!
1166
        jnz     .rx_return      ;;;;; RX error!
1166
 
1167
 
Line 1167... Line 1168...
1167
	push	ebx
1168
        push    ebx
1168
	push	.check_more
1169
        push    .check_more
1169
	and	eax, 0x00001FFF
1170
        and     eax, 0x00001FFF
1170
	add	eax, -4 			; we dont need CRC
1171
        add     eax, -4                         ; we dont need CRC
Line 1171... Line 1172...
1171
	push	eax
1172
        push    eax
1172
	DEBUGF	1,"data length = %u\n", ax
1173
        DEBUGF  1,"data length = %u\n", ax
Line 1173... Line 1174...
1173
 
1174
 
1174
;-------------
1175
;-------------
1175
; Update stats
1176
; Update stats
1176
 
1177
 
1177
	add	dword [device.bytes_rx], eax
1178
        add     dword [device.bytes_rx], eax
Line 1178... Line 1179...
1178
	adc	dword [device.bytes_rx + 4], 0
1179
        adc     dword [device.bytes_rx + 4], 0
1179
	inc	dword [device.packets_rx]
1180
        inc     dword [device.packets_rx]
Line 1180... Line 1181...
1180
 
1181
 
1181
	push	[esi + rx_desc.buf_soft_addr]
1182
        push    [esi + rx_desc.buf_soft_addr]
Line 1182... Line 1183...
1182
 
1183
 
1183
;----------------------
1184
;----------------------
Line 1184... Line 1185...
1184
; Allocate a new buffer
1185
; Allocate a new buffer
1185
 
1186
 
Line 1186... Line 1187...
1186
	stdcall KernelAlloc, RX_BUF_SIZE
1187
        stdcall KernelAlloc, RX_BUF_SIZE
1187
	mov	[esi + rx_desc.buf_soft_addr], eax
1188
        mov     [esi + rx_desc.buf_soft_addr], eax
Line 1188... Line 1189...
1188
	GetRealAddr
1189
        GetRealAddr
1189
	mov	dword [esi + rx_desc.buf_addr], eax
1190
        mov     dword [esi + rx_desc.buf_addr], eax
1190
 
1191
 
Line 1191... Line 1192...
1191
;---------------
1192
;---------------
Line 1192... Line 1193...
1192
; re set OWN bit
1193
; re set OWN bit
1193
 
1194
 
1194
	mov	eax, DSB_OWNbit or RX_BUF_SIZE
1195
        mov     eax, DSB_OWNbit or RX_BUF_SIZE
1195
	cmp	[tpc.cur_rx], NUM_RX_DESC - 1
1196
        cmp     [tpc.cur_rx], NUM_RX_DESC - 1
1196
	jne	@f
1197
        jne     @f
Line 1197... Line 1198...
1197
	or	eax, DSB_EORbit
1198
        or      eax, DSB_EORbit
1198
    @@: mov	[esi + rx_desc.status], eax
1199
    @@: mov     [esi + rx_desc.status], eax
Line 1199... Line 1200...
1199
 
1200
 
1200
;--------------
1201
;--------------
1201
; Update rx ptr
1202
; Update rx ptr
1202
 
1203
 
1203
	inc	[tpc.cur_rx]
1204
        inc     [tpc.cur_rx]
Line 1204... Line 1205...
1204
	and	[tpc.cur_rx], NUM_RX_DESC - 1
1205
        and     [tpc.cur_rx], NUM_RX_DESC - 1
1205
 
1206
 
1206
	jmp	EthReceiver
1207
        jmp     EthReceiver
1207
  .rx_return:
1208
  .rx_return:
Line 1208... Line 1209...
1208
 
1209
 
1209
	pop	ax
1210
        pop     ax
Line 1210... Line 1211...
1210
  .no_rx:
1211
  .no_rx:
1211
 
1212
 
Line 1212... Line 1213...
1212
;---------
1213
;---------
1213
; Transmit
1214
; Transmit
1214
 
1215
 
Line 1215... Line 1216...
1215
	test	ax, ISB_TxOK
1216
        test    ax, ISB_TxOK
1216
	jz	.no_tx
1217
        jz      .no_tx
Line 1217... Line 1218...
1217
	push	ax
1218
        push    ax
1218
 
1219
 
Line 1219... Line 1220...
1219
	DEBUGF	1,"TX ok!\n"
1220
        DEBUGF  1,"TX ok!\n"
1220
 
1221
 
1221
	mov	ecx, NUM_TX_DESC
1222
        mov     ecx, NUM_TX_DESC
Line 1222... Line 1223...
1222
	lea	esi, [tx_ring]
1223
        lea     esi, [tx_ring]
Line 1223... Line 1224...
1223
  .txloop:
1224
  .txloop:
1224
	cmp	[esi+tx_desc.buf_soft_addr], 0
1225
        cmp     [esi+tx_desc.buf_soft_addr], 0
1225
	jz	.maybenext
1226
        jz      .maybenext
1226
 
1227
 
Line 1276... Line 1277...
1276
  MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc
1277
  MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc
1277
  MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b   // PCI-E
1278
  MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b   // PCI-E
1278
  MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b   // PCI-E
1279
  MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b   // PCI-E
1279
  MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e         // PCI-E 8139
1280
  MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e         // PCI-E 8139
1280
  MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e         // PCI-E 8139
1281
  MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e         // PCI-E 8139
1281
  MCFG_METHOD_15, 0xff7e1880	; RTL8100e         // PCI-E 8139
1282
  MCFG_METHOD_15, 0xff7e1880    ; RTL8100e         // PCI-E 8139
Line 1282... Line 1283...
1282
 
1283
 
1283
mac_info dd \
1284
mac_info dd \
1284
  0x38800000, MCFG_METHOD_15, \
1285
  0x38800000, MCFG_METHOD_15, \
1285
  0x38000000, MCFG_METHOD_12, \
1286
  0x38000000, MCFG_METHOD_12, \
Line 1288... Line 1289...
1288
  0x30000000, MCFG_METHOD_11, \
1289
  0x30000000, MCFG_METHOD_11, \
1289
  0x18000000, MCFG_METHOD_05, \
1290
  0x18000000, MCFG_METHOD_05, \
1290
  0x10000000, MCFG_METHOD_04, \
1291
  0x10000000, MCFG_METHOD_04, \
1291
  0x04000000, MCFG_METHOD_03, \
1292
  0x04000000, MCFG_METHOD_03, \
1292
  0x00800000, MCFG_METHOD_02, \
1293
  0x00800000, MCFG_METHOD_02, \
1293
  0x00000000, MCFG_METHOD_01	; catch-all
1294
  0x00000000, MCFG_METHOD_01    ; catch-all
Line 1294... Line 1295...
1294
 
1295
 
1295
name_01 	db "RTL8169", 0
1296
name_01         db "RTL8169", 0
1296
name_02_03	db "RTL8169s/8110s", 0
1297
name_02_03      db "RTL8169s/8110s", 0
1297
name_04 	db "RTL8169sb/8110sb", 0
1298
name_04         db "RTL8169sb/8110sb", 0
1298
name_05 	db "RTL8169sc/8110sc", 0
1299
name_05         db "RTL8169sc/8110sc", 0
1299
name_11_12	db "RTL8168b/8111b", 0	; PCI-E
1300
name_11_12      db "RTL8168b/8111b", 0  ; PCI-E
1300
name_13 	db "RTL8101e", 0	; PCI-E 8139
1301
name_13         db "RTL8101e", 0        ; PCI-E 8139
Line 1301... Line 1302...
1301
name_14_15	db "RTL8100e", 0	; PCI-E 8139
1302
name_14_15      db "RTL8100e", 0        ; PCI-E 8139
Line 1302... Line 1303...
1302
 
1303