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Line 97... Line 97...
97
        vendor                   rd 4                 ; 0x70 - 0x7F, vendor specific
97
        vendor                   rd 4                 ; 0x70 - 0x7F, vendor specific
98
ends
98
ends
Line 99... Line 99...
99
 
99
 
100
; Command header structure, size = 32 bytes
100
; Command header structure, size = 32 bytes
101
struct HBA_CMD_HDR
101
struct HBA_CMD_HDR
102
    _flags1       db ? ; 0bPWACCCCC, P - Prefetchable, W - Write (1: H2D, 0: D2H)
102
    flags1       db ? ; 0bPWACCCCC, P - Prefetchable, W - Write (1: H2D, 0: D2H)
Line 103... Line 103...
103
                       ; A - ATAPI, C - Command FIS length in DWORDS, 2 ~ 16
103
                       ; A - ATAPI, C - Command FIS length in DWORDS, 2 ~ 16
104
    
104
    
Line 105... Line 105...
105
    _flags2       db ? ; 0bPPPPRCB(Re), P - Port multiplier port, R - Reserved,
105
    flags2       db ? ; 0bPPPPRCB(Re), P - Port multiplier port, R - Reserved,
106
                       ; C - Clear busy upon R_OK, B - BIST, Re - Reset
106
                       ; C - Clear busy upon R_OK, B - BIST, Re - Reset
107
    
107
    
Line 115... Line 115...
115
; Physical region descriptor table entry, size = 16 bytes
115
; Physical region descriptor table entry, size = 16 bytes
116
struct HBA_PRDT_ENTRY
116
struct HBA_PRDT_ENTRY
117
    dba           dd ?  ; Data base address
117
    dba           dd ?  ; Data base address
118
    dbau          dd ?  ; Data base address upper 32 bits
118
    dbau          dd ?  ; Data base address upper 32 bits
119
                  dd ?  ; Reserved
119
                  dd ?  ; Reserved
120
    _flags        dd ?  ; 0bIR..RD..D, I (1 bit) - Interrupt on completion,
120
    flags        dd ?  ; 0bIR..RD..D, I (1 bit) - Interrupt on completion,
121
                        ; R (9 bits) - Reserved, D (22 bits) - Byte count, 4M max
121
                        ; R (9 bits) - Reserved, D (22 bits) - Byte count, 4M max
122
ends
122
ends
Line 123... Line 123...
123
 
123
 
124
struct HBA_CMD_TBL
124
struct HBA_CMD_TBL
Line 139... Line 139...
139
ends
139
ends
Line 140... Line 140...
140
 
140
 
141
; Register FIS – Host to Device
141
; Register FIS – Host to Device
142
struct FIS_REG_H2D
142
struct FIS_REG_H2D
143
        fis_type      db ?       ; FIS_TYPE_REG_H2D
143
        fis_type      db ?       ; FIS_TYPE_REG_H2D
144
        _flags        db ?       ; 0bCRRRPPPP, C - 1: Command, 0: Control
144
        flags        db ?       ; 0bCRRRPPPP, C - 1: Command, 0: Control
Line 145... Line 145...
145
                                 ; R - Reserved, P - Port multiplier
145
                                 ; R - Reserved, P - Port multiplier
146
 
146
 
Line 167... Line 167...
167
 
167
 
168
; Register FIS – Device to Host
168
; Register FIS – Device to Host
169
struct FIS_REG_D2H
169
struct FIS_REG_D2H
Line 170... Line 170...
170
    fis_type      db ?           ; FIS_TYPE_REG_D2H
170
    fis_type      db ?           ; FIS_TYPE_REG_D2H
171
 
171
 
Line 172... Line 172...
172
    _flags        db ?           ; 0bRIRPPPP, P - Port multiplier, R - Reserved
172
    flags        db ?           ; 0bRIRPPPP, P - Port multiplier, R - Reserved
173
                                 ; I - Interrupt bit
173
                                 ; I - Interrupt bit
Line 193... Line 193...
193
ends
193
ends
Line 194... Line 194...
194
 
194
 
195
; Data FIS – Bidirectional
195
; Data FIS – Bidirectional
196
struct FIS_DATA
196
struct FIS_DATA
197
    fis_type      db ?           ; FIS_TYPE_DATA
197
    fis_type      db ?           ; FIS_TYPE_DATA
198
    _flags        db ?           ; 0bRRRRPPPP, R - Reserved, P - Port multiplier
198
    flags        db ?           ; 0bRRRRPPPP, R - Reserved, P - Port multiplier
199
                  rb 2           ; Reserved
199
                  rb 2           ; Reserved
200
    ; DWORD 1 ~ N (?)
200
    ; DWORD 1 ~ N (?)
201
    data          rd 1           ; Payload
201
    data          rd 1           ; Payload
Line 202... Line 202...
202
ends
202
ends
203
 
203
 
204
; PIO Setup – Device to Host
204
; PIO Setup – Device to Host
Line 205... Line 205...
205
struct FIS_PIO_SETUP
205
struct FIS_PIO_SETUP
206
    fis_type      db ?           ; FIS_TYPE_PIO_SETUP
206
    fis_type      db ?           ; FIS_TYPE_PIO_SETUP
Line 207... Line 207...
207
 
207
 
208
    _flags        db ?           ; 0bRIDRPPPP, P - Port multiplier, R - Reserved
208
    flags        db ?           ; 0bRIDRPPPP, P - Port multiplier, R - Reserved
Line 231... Line 231...
231
ends
231
ends
Line 232... Line 232...
232
 
232
 
233
; DMA Setup – Device to Host
233
; DMA Setup – Device to Host
234
struct FIS_DMA_SETUP
234
struct FIS_DMA_SETUP
235
    fis_type      db ?           ; FIS_TYPE_DMA_SETUP
235
    fis_type      db ?           ; FIS_TYPE_DMA_SETUP
236
    _flags        db ?           ; 0bAIDRPPPP, A - Auto-activate. Specifies if DMA Activate FIS is needed,
236
    flags        db ?           ; 0bAIDRPPPP, A - Auto-activate. Specifies if DMA Activate FIS is needed,
237
                                 ; I - Interrupt bit, D - Data transfer direction, 1 - device to host,
237
                                 ; I - Interrupt bit, D - Data transfer direction, 1 - device to host,
Line 238... Line 238...
238
                                 ; R - Reserved, P - Port multiplier
238
                                 ; R - Reserved, P - Port multiplier
239
 
239
 
Line 250... Line 250...
250
ends
250
ends
Line 251... Line 251...
251
 
251
 
252
; Set device bits FIS - device to host
252
; Set device bits FIS - device to host
253
struct FIS_DEV_BITS
253
struct FIS_DEV_BITS
254
    fis_type      db ?           ; FIS_TYPE_DEV_BITS
254
    fis_type      db ?           ; FIS_TYPE_DEV_BITS
255
    _flags        db ?           ; 0bNIRRPPPP, N - Notification, I - Interrupt,
255
    flags        db ?           ; 0bNIRRPPPP, N - Notification, I - Interrupt,
Line 256... Line 256...
256
                                 ; R - Reserved, P - Port multiplier
256
                                 ; R - Reserved, P - Port multiplier
257
    
257
    
Line 542... Line 542...
542
 
542
 
543
        mov     eax, [cmdtable]
543
        mov     eax, [cmdtable]
544
        mov     ebx, [buf_phys]
544
        mov     ebx, [buf_phys]
545
        mov     dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dba], ebx
545
        mov     dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dba], ebx
-
 
546
        mov     dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dbau], 0
546
        mov     dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dbau], 0
547
        and     [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], not 0x3FFFFF ; zero out lower 22 bits, they used for byte count
-
 
548
        or      [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], 512 - 1 ; reason why -1 see in spec on this field
-
 
549
        ; or      [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], 1 shl 31 ; enable interrupt on completion
547
        mov     dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY._flags], 512 - 1 ; why -1 ?
550
 
-
 
551
        mov     eax, [cmdheader]
-
 
552
        and     [eax + HBA_CMD_HDR.flags1], not 0x1F ; zero out lower 5 bits, they will be used for cfl
-
 
553
        or      [eax + HBA_CMD_HDR.flags1], (sizeof.FIS_REG_H2D / 4) ; set command fis length in dwords
-
 
554
        movzx   bx, [eax + HBA_CMD_HDR.flags1]
-
 
555
        btr     bx, 6 ; flag W = 0
-
 
556
        mov     [eax + HBA_CMD_HDR.flags1], bl
-
 
557
        movzx   bx, [eax + HBA_CMD_HDR.flags2]
-
 
558
        btr     bx, 2 ; flag C = 0
548
        mov     eax, [cmdheader]
559
        mov     [eax + HBA_CMD_HDR.flags2], bl
Line 549... Line 560...
549
        mov     [eax + HBA_CMD_HDR.prdtl], 1
560
        mov     [eax + HBA_CMD_HDR.prdtl], 1
550
 
561
 
551
        mov     eax, [cmdtable]
562
        mov     eax, [cmdtable]
552
        mov     byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.fis_type], FIS_TYPE_REG_H2D
563
        mov     byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.fis_type], FIS_TYPE_REG_H2D
553
        movzx   ebx, byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D._flags]
564
        movzx   ebx, byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.flags]
554
        bts     ebx, bit_AHCI_H2D_FLAG_CMD ; Set Command bit in H2D FIS.
565
        bts     ebx, bit_AHCI_H2D_FLAG_CMD ; Set Command bit in H2D FIS.
555
        mov     byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D._flags], bl
566
        mov     byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.flags], bl
556
        ; if (port->signature == AHCI_PxSIG_ATAPI) cmd_fis->command = ATA_IDENTIFY_PACKET;
567
        ; if (port->signature == AHCI_PxSIG_ATAPI) cmd_fis->command = ATA_IDENTIFY_PACKET;
557
        ; else cmd_fis->command = ATA_IDENTIFY;
568
        ; else cmd_fis->command = ATA_IDENTIFY;
Line 569... Line 580...
569
        mov     ebx, 20 ;;;
580
        mov     ebx, 20 ;;;
570
        call    delay_hs ;;;
581
        call    delay_hs ;;;
Line 571... Line 582...
571
 
582
 
Line 572... Line 583...
572
        DEBUGF  1, "sata_error register = 0x%x\n", [edi + HBA_PORT.sata_error]
583
        DEBUGF  1, "sata_error register = 0x%x\n", [edi + HBA_PORT.sata_error]
573
 
584
 
574
        mov     ecx, ecx
585
;         mov     ecx, ecx
575
        mov     esi, [buf_virt]
586
;         mov     esi, [buf_virt]
576
.print_ident:
587
; .print_ident:
577
        cmp     ecx, 512 - 1 ; why -1 ?
588
;         cmp     ecx, 512 - 1 ; why -1 ?
578
        jae     .end_print_ident
589
;         jae     .end_print_ident
579
 
590
 
580
        mov     al, byte [esi + ecx]
591
;         mov     al, byte [esi + ecx]
581
        mov     byte [modelstr], al
592
;         mov     byte [modelstr], al
582
        mov     byte [modelstr + 1], 0
593
;         mov     byte [modelstr + 1], 0
583
        DEBUGF  1, "(%s) ", modelstr
594
;         DEBUGF  1, "(%s) ", modelstr
584
 
595
 
585
        inc     ecx
596
;         inc     ecx
-
 
597
;         jmp     .print_ident
Line 586... Line 598...
586
        jmp     .print_ident
598
; .end_print_ident:
587
.end_print_ident:
599
        ; DEBUGF  1, "\n"
588
 
600
 
589
        mov     esi, [buf_virt]
601
        mov     esi, [buf_virt]
Line 603... Line 615...
603
        mov     byte [modelstr + ecx], dl
615
        mov     byte [modelstr + ecx], dl
604
        mov     byte [modelstr + ecx + 1], bl
616
        mov     byte [modelstr + ecx + 1], bl
605
        add     ecx, 2
617
        add     ecx, 2
606
        jmp     .reverse1
618
        jmp     .reverse1
607
.reverse1_end:
619
.reverse1_end:
608
        DEBUGF  1, "Ident data of port: model = %s ", modelstr
620
        DEBUGF  1, "IDENTIFICATION RESULT: MODEL = %s\n", modelstr
609
 
-
 
610
        ; mov    esi, [buf_virt]
-
 
611
        ; mov    eax, [esi + 12] ; lower dword of sector count has 12 bytes offset
-
 
612
        ; mov    edx, [esi + 12 + 4] ; higher dword of sector count
-
 
613
        ; DEBUGF 1, "sector_count = 0x%x:%x ", edx, eax
-
 
614
 
-
 
615
        ; mov    eax, [esi + 200]
-
 
616
        ; mov    edx, [esi + 200 + 4]
-
 
617
        ; mov    ecx, 1024*1024
-
 
618
        ; div    ecx
-
 
619
        ; shl    eax, 9 ; *= 512, 512 - block size
-
 
620
        ; DEBUGF 1, "disk capacity = %u MiB\n", eax
-
 
621
 
-
 
Line 622... Line 621...
622
 
621
 
623
.ret:
622
.ret:
624
        popad
623
        popad
625
        ret
624
        ret