WebSVN – Kolibri OS – Diff – /kernel/branches/kolibri-ahci/blkdev/ahci.inc

         movzx   edx, byte [esi+PCIDEV.devfn]
         and     edx, 00000111b ; get only 3 lowest bits (function code)
         DEBUGF  1, "K: found AHCI controller, (class, subcl, progif) = %x, bus = %x, device = %x, function = %x\n", eax, ebx, ecx, edx
         ; get BAR5 value, it is physical address
-        mov     ah, [esi + PCIDEV.bus]
-        mov     al, 2 ; read dword
+        movzx   eax, [esi + PCIDEV.bus]
-        mov     bh, [esi + PCIDEV.devfn]
+        movzx   ebx, [esi + PCIDEV.devfn]
-        mov     bl, PCI_REG_BAR5
-        call    pci_read_reg
+        stdcall pci_read32, eax, ebx, PCI_REG_BAR5
         DEBUGF  1, "K: AHCI controller BAR5 = %x\n", eax
         ; Map BAR5 to virtual memory
         stdcall map_io_mem, eax, HBA_MEMORY_SIZE, PG_SWR + PG_NOCACHE
         mov     [ahci_controller + AHCI_DATA.abar], eax
         DEBUGF  1, "K: AHCI controller BAR5 mapped to virtual addr %x\n", eax
-        ; Enable dma bus mastering, memory space access, clear the "disable interrupts" bit
-        ; Usually, it is already done before us
+        ; Enable dma bus mastering, memory space access, clear the "disable interrupts" bit
-        mov     ah, [esi + PCIDEV.bus]
+        ; Usually, it is already done before us
-        mov     al, 2 ; read dword
-        mov     bh, [esi + PCIDEV.devfn]
+        movzx   ebx, [esi + PCIDEV.bus]
-        mov     bl, PCI_REG_STATUS_COMMAND
+        movzx   ebp, [esi + PCIDEV.devfn]
-        call    pci_read_reg
+        stdcall pci_read32, ebx, ebp, PCI_REG_STATUS_COMMAND
         DEBUGF  1, "K: AHCI: pci_status_command = %x\nEnabling interrupts, DMA bus mastering and memory space access\n", eax
-        or      eax, 0x06 ; pci.command |= 0x06 (dma bus mastering + memory space access)
-        btr     eax, 10 ; clear the "disable interrupts" bit
-        DEBUGF  1, "K: AHCI: pci_status_command = %x\n", eax
-        mov     ecx, eax
-        mov     ah, [esi + PCIDEV.bus]
+        or      eax, 0x06 ; pci.command |= 0x06 (dma bus mastering + memory space access)
-        mov     al, 2 ; write dword
-        mov     bh, [esi + PCIDEV.devfn]
+        btr     eax, 10 ; clear the "disable interrupts" bit
-        mov     bl, PCI_REG_STATUS_COMMAND
+        DEBUGF  1, "K: AHCI: pci_status_command = %x\n", eax
-        call    pci_write_reg
-        ; ; Print some register values to debug board
-        ; mov     esi, [ahci_controller + AHCI_DATA.abar]
+        stdcall pci_write32, ebx, ebp, PCI_REG_STATUS_COMMAND, eax
         ; mov     ebx, [esi + HBA_MEM.capability]
-        ; mov     ecx, [esi + HBA_MEM.global_host_control]
+        ; ; Print some register values to debug board
-        ; mov     edx, [esi + HBA_MEM.version]
+        ; mov     esi, [ahci_controller + AHCI_DATA.abar]
-        ; DEBUGF  1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", ebx, ecx, edx
+        ; DEBUGF  1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", [esi + HBA_MEM.capability], [esi + HBA_MEM.global_host_control], [esi + HBA_MEM.version]
         ;-------------------------------------------------------
         ; Request BIOS/OS ownership handoff, if supported. (TODO check correctness)
         mov     esi, [ahci_controller + AHCI_DATA.abar]
         ;mov     ebx, [esi + HBA_MEM.capability2]
         ;DEBUGF  1, "K: AHCI: HBA_MEM.cap2 = %x\n", ebx
-        bt      dword [esi + HBA_MEM.capability2], bit_AHCI_HBA_CAP2_BOH
+        bt      [esi + HBA_MEM.capability2], bit_AHCI_HBA_CAP2_BOH
         jnc     .end_handoff
         DEBUGF  1, "K: AHCI: requesting AHCI ownership change...\n"
-        bts     dword [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_OOS
+        bts     [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_OOS
 .wait_not_bos:
-        bt      dword [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BOS
+        bt      [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BOS
         jc      .wait_not_bos
         mov     ebx, 3
 .end_handoff:
         ;-------------------------------------------------------
         ; enable the AHCI and reset it
-        bts     dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
+        bts     [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
-        bts     dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
+        bts     [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
         ; wait for reset to complete
 .wait_reset:
-        bt      dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
+        bt      [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_RESET
         jc      .wait_reset
         ; enable the AHCI and interrupts
-        bts     dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
-        bts     dword [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_INTERRUPT_ENABLE
-        mov     ebx, 2
-        call    delay_hs
-        mov     ebx, [esi + HBA_MEM.capability]
+        bts     [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_AHCI_ENABLE
-        mov     ecx, [esi + HBA_MEM.capability2]
+        bts     [esi + HBA_MEM.global_host_control], bit_AHCI_HBA_GHC_INTERRUPT_ENABLE
-        mov     edx, [esi + HBA_MEM.version]
-        mov     edi, [esi + HBA_MEM.global_host_control]
-        DEBUGF  1, "K: AHCI: caps: %x %x, ver: %x, ghc: %x\n", ebx, ecx, edx, edi

Subversion Repositories Kolibri OS

(root)/kernel/branches/kolibri-ahci/blkdev/ahci.inc – Rev 9023 → 9024