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Rev 1599 Rev 1687
Line 6... Line 6...
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;;                                                              ;;
 6 
;;                                                              ;;
7 
;;  PCI32.INC                                                   ;;
 7 
;;  PCI32.INC                                                   ;;
8 
;;                                                              ;;
 8 
;;                                                              ;;
9 
;;  32 bit PCI driver code                                      ;;
 9 
;;  32 bit PCI driver code                                      ;;
10 
;;                                                              ;;
 10 
;;                                                              ;;
- 
 
 11 
;;  Version 0.4A November 4th,  2010                            ;;
11 
;;  Version 0.4  February 2nd,  2010                            ;;
 12 
;;  Version 0.4  February 2nd,  2010                            ;;
12 
;;  Version 0.3  April 9, 2007                                  ;;
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;;  Version 0.3  April 9, 2007                                  ;;
13 
;;  Version 0.2  December 21st, 2002                            ;;
 14 
;;  Version 0.2  December 21st, 2002                            ;;
14 
;;                                                              ;;
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;;                                                              ;;
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;;  Author: Victor Prodan, victorprodan@yahoo.com               ;;
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;;  Author: Victor Prodan, victorprodan@yahoo.com               ;;
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;;                                                              ;;
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;;                                                              ;;
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;;  See file COPYING for details                                ;;
 23 
;;  See file COPYING for details                                ;;
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;;                                                              ;;
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;;                                                              ;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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$Revision: 1599 $
 27 
$Revision: 1687 $
27 
 
 28 
 
28 
;***************************************************************************
 29 
;***************************************************************************
29 
;   Function
 30 
;   Function
30 
;      pci_api:
 31 
;      pci_api:
31 
;
 32 
;
32 
;   Description
 33 
;   Description
- 
 
 34 
;       entry point for system PCI calls
33 
;       entry point for system PCI calls
 35 
;***************************************************************************
34 
;***************************************************************************
 36 
align 4
Line -... Line 37...
- 
 
 37 
mmio_pci_addr	dw  0x100	; default PCI device bdf-address
35 
mmio_pci_addr	dw  0x400	; default PCI device bdf-address
 38 
	dw 0
- 
 
 39 
 
- 
 
 40 
iglobal
- 
 
 41 
align 4
- 
 
 42 
f62call:
- 
 
 43 
	dd	pci_fn_0
- 
 
 44 
	dd	pci_fn_1
- 
 
 45 
	dd	pci_fn_2
- 
 
 46 
	dd	pci_service_not_supported	;3
- 
 
 47 
	dd	pci_read_reg		;4 byte
- 
 
 48 
	dd	pci_read_reg		;5 word
- 
 
 49 
	dd	pci_read_reg		;6 dword
- 
 
 50 
	dd	pci_service_not_supported   ;7
- 
 
 51 
	dd	pci_write_reg		;8 byte
- 
 
 52 
	dd	pci_write_reg		;9 word
- 
 
 53 
	dd	pci_write_reg		;10 dword
- 
 
 54 
	dd	pci_mmio_init		;11
Line -... Line 55...
- 
 
 55 
	dd	pci_mmio_map		;12
36 
 
 56 
	dd	pci_mmio_unmap		;13
- 
 
 57 
endg
- 
 
 58 
 
- 
 
 59 
align 4
- 
 
 60 
pci_api:
Line 37... Line 61...
37 
 
 61 
;cross
38 
align 4
 62 
	mov	eax, ebx
Line 39... Line 63...
39 
 
 63 
	mov	ebx, ecx
40 
pci_api:
 64 
	mov	ecx, edx
41 
 
 - 
 
42 
	cmp  [pci_access_enabled],1
 65 
 
43 
	jne  no_pci_access_for_applications
 - 
 
Line 44... Line -...
44 
 
 - 
 
45 
	or al,al
 66 
	cmp  [pci_access_enabled],1
46 
	jnz pci_fn_1
 67 
	jne  pci_service_not_supported
Line 47... Line -...
47 
	; PCI function 0: get pci version (AH.AL)
 - 
 
48 
	movzx eax,word [BOOT_VAR+0x9022]
 - 
 
49 
	ret
 68 
 
Line 50... Line 69...
50 
 
 69 
	movzx	edx, al
51 
pci_fn_1:
 - 
 
52 
	cmp al,1
 - 
 
53 
	jnz pci_fn_2
 - 
 
54 
 
 - 
 
55 
	; PCI function 1: get last bus in AL
 - 
 
56 
	mov al,[BOOT_VAR+0x9021]
 70 
	cmp al, 13
Line 57... Line -...
57 
	ret
 - 
 
58 
 
 - 
 
59 
pci_fn_2:
 - 
 
60 
	cmp al,2
 - 
 
61 
	jne pci_fn_3
 - 
 
62 
	; PCI function 2: get pci access mechanism
 71 
	ja pci_service_not_supported
63 
	mov al,[BOOT_VAR+0x9020]
 - 
 
64 
	ret
 - 
 
65 
pci_fn_3:
 - 
 
66 
 
 - 
 
67 
	cmp al,4
 - 
 
68 
	jz pci_read_reg   ;byte
 - 
 
69 
	cmp al,5
 - 
 
70 
	jz pci_read_reg   ;word
 - 
 
71 
	cmp al,6
 - 
 
72 
	jz pci_read_reg   ;dword
 72 
 
73 
 
 - 
 
74 
	cmp al,8
 - 
 
75 
	jz pci_write_reg  ;byte
 - 
 
76 
	cmp al,9
 - 
 
Line -... Line 73...
- 
 
 73 
	call	dword [f62call+edx*4]
- 
 
 74 
	mov	dword [esp+32],eax
Line 77... Line 75...
77 
	jz pci_write_reg  ;word
 75 
 
Line -... Line 76...
- 
 
 76 
	ret
78 
	cmp al,10
 77 
 
- 
 
 78 
align 4
- 
 
 79 
pci_api_drv:
- 
 
 80 
 
- 
 
 81 
    cmp  [pci_access_enabled],1
- 
 
 82 
    jne  .fail
- 
 
 83 
 
- 
 
 84 
    cmp eax, 2
Line -... Line 85...
- 
 
 85 
    ja	 .fail
- 
 
 86 
 
- 
 
 87 
    jmp dword [f62call+eax*4]
- 
 
 88 
 
- 
 
 89 
.fail:
- 
 
 90 
    or eax,-1
- 
 
 91 
    ret
- 
 
 92 
 
- 
 
 93 
;; ============================================
- 
 
 94 
 
- 
 
 95 
pci_fn_0:	; PCI function 0: get pci version (AH.AL)
79 
	jz pci_write_reg  ;dword
 96 
	movzx eax,word [BOOT_VAR+0x9022]
Line 80... Line 97...
80 
 
 97 
	ret
81 
	cmp al,11	    ;  user-level MMIO functions
 - 
 
82 
	jz pci_mmio_init
 - 
 
83 
	cmp al,12
 - 
 
84 
	jz pci_mmio_map
 - 
 
85 
	cmp al,13
 - 
 
86 
	jz pci_mmio_unmap
 - 
 
87 
 
 98 
 
88 
 
 - 
 
89 
      no_pci_access_for_applications:
 - 
 
90 
 
 99 
pci_fn_1:	; PCI function 1: get last bus in AL
91 
	or eax,-1
 100 
	mov al,[BOOT_VAR+0x9021]
92 
 
 - 
 
93 
	ret
 101 
	ret
94 
 
 - 
 
95 
;***************************************************************************
 102 
 
96 
;   Function
 103 
pci_fn_2:	; PCI function 2: get pci access mechanism
97 
;      pci_make_config_cmd
 104 
	mov al,[BOOT_VAR+0x9020]
98 
;
 105 
	ret
99 
;   Description
 106 
 
100 
;       creates a command dword  for use with the PCI bus
 107 
pci_service_not_supported:
Line -... Line 108...
- 
 
 108 
	or eax,-1
101 
;       bus # in ah
 109 
	mov	dword [esp+32],eax
102 
;       device+func in bh (dddddfff)
 110 
	ret
103 
;       register in bl
 111 
 
104 
;
 112 
;***************************************************************************
105 
;      command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
 113 
;      (for backward compatibility only)
Line 124... Line 132...
124 
;           number of bytes to read (1,2,4) coded into AL, bits 0-1
 132 
;           number of bytes to read (1,2,4) coded into AL, bits 0-1
125 
;           (0 - byte, 1 - word, 2 - dword)
 133 
;           (0 - byte, 1 - word, 2 - dword)
126 
;***************************************************************************
 134 
;***************************************************************************
Line 127... Line 135...
127 
 
 135 
 
128 
align 4
 - 
 
129 
 
 136 
align 4
- 
 
 137 
pci_read_reg:
- 
 
 138 
;	push	edx
- 
 
 139 
;	xor	edx, edx
- 
 
 140 
;	mov	dh,  ah 	; bus
- 
 
 141 
;	mov	dl,  bh 	; dev+fn
- 
 
 142 
;	shl	edx, 12
- 
 
 143 
;	mov	dl,  bl 	; reg
- 
 
 144 
;	add	edx, PCIe_CONFIG_SPACE
- 
 
 145 
;
- 
 
 146 
;	and	al, 2
- 
 
 147 
;	jz	@f
- 
 
 148 
;	mov	eax, dword[edx]
- 
 
 149 
;	pop	edx
- 
 
 150 
;	ret
- 
 
 151 
;@@:
- 
 
 152 
;	and	al, 1
- 
 
 153 
;	jz	@f
- 
 
 154 
;	mov	ax, word[edx]
- 
 
 155 
;	pop	edx
- 
 
 156 
;	ret
- 
 
 157 
;@@:
- 
 
 158 
;	mov	al, byte[edx]
- 
 
 159 
;	pop	edx
130 
pci_read_reg:
 160 
;	ret
131 
	push	esi   ; save register size into ESI
 161 
	push	esi   ; save register size into ESI
132 
	mov	esi,eax
 162 
	mov	esi,eax
Line 133... Line 163...
133 
	and	esi,3
 163 
	and	esi,3
Line 172... Line 202...
172 
 
 202 
 
173 
	pop	eax
 203 
	pop	eax
174 
	pop	esi
 204 
	pop	esi
Line 175... Line -...
175 
	ret
 - 
 
176 
 
 - 
 
177 
pci_read_reg_err:
 - 
 
178 
	xor	eax,eax
 - 
 
Line 179... Line 205...
179 
	dec	eax
 205 
	ret
180 
	ret
 206 
 
181 
 
 207 
 
Line 191... Line 217...
191 
;           number of bytes to write (1,2,4) coded into AL, bits 0-1
 217 
;           number of bytes to write (1,2,4) coded into AL, bits 0-1
192 
;           (0 - byte, 1 - word, 2 - dword)
 218 
;           (0 - byte, 1 - word, 2 - dword)
193 
;***************************************************************************
 219 
;***************************************************************************
Line 194... Line 220...
194 
 
 220 
 
195 
align 4
 - 
 
196 
 
 221 
align 4
- 
 
 222 
pci_write_reg:
- 
 
 223 
;	push	edx
- 
 
 224 
;	xor	edx, edx
- 
 
 225 
;	mov	dh,  ah 	; bus
- 
 
 226 
;	mov	dl,  bh 	; dev+fn
- 
 
 227 
;	shl	edx, 12
- 
 
 228 
;	mov	dl,  bl 	; reg
- 
 
 229 
;	add	edx, PCIe_CONFIG_SPACE
- 
 
 230 
;
- 
 
 231 
;	test	al, 2
- 
 
 232 
;	jz	@f
- 
 
 233 
;	mov	dword[edx], ecx
- 
 
 234 
;	ret
- 
 
 235 
;@@:
- 
 
 236 
;	test	al, 1
- 
 
 237 
;	jz	@f
- 
 
 238 
;	mov	word[edx], cx
- 
 
 239 
;	pop	edx
- 
 
 240 
;	ret
- 
 
 241 
;@@:
- 
 
 242 
;	mov	byte[edx], cl
- 
 
 243 
;	pop	edx
197 
pci_write_reg:
 244 
;	ret
198 
	push	esi   ; save register size into ESI
 245 
	push	esi   ; save register size into ESI
199 
	mov	esi,eax
 246 
	mov	esi,eax
Line 200... Line 247...
200 
	and	esi,3
 247 
	and	esi,3
Line 231... Line 278...
231 
	jmp pci_fin_write1
 278 
	jmp pci_fin_write1
232 
pci_write_dword1:
 279 
pci_write_dword1:
233 
	out	dx,eax
 280 
	out	dx,eax
234 
	jmp	pci_fin_write1
 281 
	jmp	pci_fin_write1
235 
pci_fin_write1:
 282 
pci_fin_write1:
- 
 
 283 
 
236 
		; restore configuration control
 284 
		; restore configuration control
237 
	pop	eax
 285 
	pop	eax
238 
	mov	dl,0xf8
 286 
	mov	dl,0xf8
239 
	out	dx,eax
 287 
	out	dx,eax
240 
 
 - 
 
241 
	xor	eax,eax
 288 
	xor	eax,eax
242 
	pop	esi
 289 
	pop	esi
243 
	ret
 290 
	ret
Line 244... Line -...
244 
 
 - 
 
245 
pci_write_reg_err:
 - 
 
246 
	xor	eax,eax
 - 
 
247 
	dec	eax
 - 
 
248 
	ret
 - 
 
249 
 
 291 
 
250 
;***************************************************************************
 292 
;***************************************************************************
251 
;   Function
 293 
;   Function
252 
;      pci_mmio_init
 294 
;      pci_mmio_init
253 
;
 295 
;
Line 320... Line 362...
320 
    push    ebx
 362 
    push    ebx
321 
    mov     bl, ah	; bl = BAR# (0..5), however bl=8 for BAR6
 363 
    mov     bl, ah	; bl = BAR# (0..5), however bl=8 for BAR6
322 
    shl     bl, 1
 364 
    shl     bl, 1
323 
    shl     bl, 1
 365 
    shl     bl, 1
324 
    add     bl, 0x10	; now bl = BAR offset in PCI config. space
 366 
    add     bl, 0x10	; now bl = BAR offset in PCI config. space
325 
    mov     ax, [mmio_pci_addr]
 367 
    mov     eax, dword[mmio_pci_addr]
- 
 
 368 
    shl     eax, 12
326 
    mov     bh, al	; bh = dddddfff
 369 
    mov     al, bl	; BAR offset
327 
    mov     al, 2	; al : DW to read
 370 
    add     eax, PCIe_CONFIG_SPACE
328 
    call    pci_read_reg
 371 
    mov     eax, [eax]	; read the BAR
329 
    or	    eax, eax
 372 
    or	    eax, eax
330 
    jnz     @f
 373 
    jnz     @f
331 
    mov     eax,-3	; empty I/O space
 374 
    mov     eax,-3	; empty I/O space
332 
    jmp     mmio_ret_fail
 375 
    jmp     mmio_ret_fail
333 
@@:
 376 
@@: