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1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
2 | ;; ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
5 | ;; ;; |
6 | ;; ;; |
6 | ;; ;; |
7 | ;; PCI32.INC ;; |
7 | ;; PCI32.INC ;; |
8 | ;; ;; |
8 | ;; ;; |
9 | ;; 32 bit PCI driver code ;; |
9 | ;; 32 bit PCI driver code ;; |
10 | ;; ;; |
10 | ;; ;; |
- | 11 | ;; Version 0.4 February 2nd, 2010 ;; |
|
11 | ;; Version 0.3 April 9, 2007 ;; |
12 | ;; Version 0.3 April 9, 2007 ;; |
12 | ;; Version 0.2 December 21st, 2002 ;; |
13 | ;; Version 0.2 December 21st, 2002 ;; |
13 | ;; ;; |
14 | ;; ;; |
14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
15 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
15 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
16 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
- | 17 | ;; Artem Jerdev, kolibri@jerdev.co.uk ;; |
|
16 | ;; Credits: ;; |
18 | ;; Credits: ;; |
17 | ;; Ralf Brown ;; |
19 | ;; Ralf Brown ;; |
18 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
20 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
19 | ;; ;; |
21 | ;; ;; |
20 | ;; See file COPYING for details ;; |
22 | ;; See file COPYING for details ;; |
21 | ;; ;; |
23 | ;; ;; |
22 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
24 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
Line 23... | Line 25... | ||
23 | 25 | ||
Line 24... | Line 26... | ||
24 | $Revision: 1587 $ |
26 | $Revision: 1599 $ |
25 | 27 | ||
26 | ;*************************************************************************** |
28 | ;*************************************************************************** |
27 | ; Function |
29 | ; Function |
28 | ; pci_api: |
30 | ; pci_api: |
29 | ; |
31 | ; |
30 | ; Description |
32 | ; Description |
31 | ; entry point for system PCI calls |
33 | ; entry point for system PCI calls |
32 | ;*************************************************************************** |
- | |
33 | mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO |
- | |
34 | - | ||
35 | iglobal |
- | |
36 | align 4 |
- | |
37 | f62call: |
- | |
38 | dd pci_api.0 |
- | |
39 | dd pci_api.1 |
- | |
40 | dd pci_api.2 |
- | |
41 | dd pci_api.not_support ;3 |
- | |
42 | dd pci_read_reg ;4 byte |
- | |
43 | dd pci_read_reg ;5 word |
- | |
44 | dd pci_read_reg ;6 dword |
- | |
45 | dd pci_api.not_support ;7 |
- | |
46 | dd pci_write_reg ;8 byte |
- | |
47 | dd pci_write_reg ;9 word |
- | |
48 | dd pci_write_reg ;10 dword |
- | |
49 | if defined mmio_pci_addr |
- | |
50 | dd pci_mmio_init ;11 |
- | |
51 | dd pci_mmio_map ;12 |
- | |
52 | dd pci_mmio_unmap ;13 |
- | |
53 | end if |
- | |
54 | f62_rcall: |
- | |
55 | dd pci_read_reg.0 ;4 byte |
- | |
56 | dd pci_read_reg.1 ;5 word |
- | |
57 | dd pci_read_reg.2 ;6 dword |
- | |
58 | f62_rcall2: |
- | |
59 | dd pci_read_reg_2.0 ;4 byte |
- | |
60 | dd pci_read_reg_2.1 ;5 word |
- | |
61 | dd pci_read_reg_2.2 ;6 dword |
- | |
62 | f62_wcall: |
- | |
63 | dd pci_write_reg.0 ;4 byte |
- | |
64 | dd pci_write_reg.1 ;5 word |
- | |
65 | dd pci_write_reg.2 ;6 dword |
- | |
66 | f62_wcall2: |
- | |
67 | dd pci_write_reg_2.0 ;4 byte |
- | |
68 | dd pci_write_reg_2.1 ;5 word |
- | |
Line 69... | Line 34... | ||
69 | dd pci_write_reg_2.2 ;6 dword |
34 | ;*************************************************************************** |
70 | endg |
- | |
71 | - | ||
72 | - | ||
73 | align 4 |
- | |
74 | pci_api: |
- | |
75 | movzx eax,bl |
- | |
76 | cmp [pci_access_enabled],1 |
- | |
77 | jne .no_pci_access_for_applications |
- | |
78 | - | ||
79 | if defined mmio_pci_addr |
- | |
80 | cmp eax, 13 |
- | |
81 | jb .not_support |
- | |
82 | else |
- | |
83 | cmp eax, 10 |
- | |
84 | jb .not_support |
- | |
Line -... | Line 35... | ||
- | 35 | mmio_pci_addr dw 0x400 ; default PCI device bdf-address |
|
Line -... | Line 36... | ||
- | 36 | ||
- | 37 | ||
Line 85... | Line 38... | ||
85 | end if |
38 | align 4 |
86 | call dword [f62call+eax*4] |
39 | |
87 | mov dword [esp+32],eax |
40 | pci_api: |
88 | ret |
- | |
89 | 41 | ||
90 | 42 | cmp [pci_access_enabled],1 |
|
Line 91... | Line 43... | ||
91 | 43 | jne no_pci_access_for_applications |
|
92 | ; or al,al |
44 | |
93 | ; jnz pci_fn_1 |
45 | or al,al |
Line 94... | Line 46... | ||
94 | ; PCI function 0: get pci version (AH.AL) |
46 | jnz pci_fn_1 |
95 | .0: |
- | |
96 | movzx eax, word [BOOT_VAR+0x9022] |
47 | ; PCI function 0: get pci version (AH.AL) |
97 | ret |
48 | movzx eax,word [BOOT_VAR+0x9022] |
Line 98... | Line 49... | ||
98 | 49 | ret |
|
99 | ;pci_fn_1: |
50 | |
100 | ; cmp al,1 |
51 | pci_fn_1: |
101 | ; jnz pci_fn_2 |
52 | cmp al,1 |
102 | - | ||
103 | ; PCI function 1: get last bus in AL |
53 | jnz pci_fn_2 |
104 | .1: |
54 | |
105 | movzx eax, byte [BOOT_VAR+0x9021] |
55 | ; PCI function 1: get last bus in AL |
- | 56 | mov al,[BOOT_VAR+0x9021] |
|
- | 57 | ret |
|
- | 58 | ||
- | 59 | pci_fn_2: |
|
- | 60 | cmp al,2 |
|
- | 61 | jne pci_fn_3 |
|
- | 62 | ; PCI function 2: get pci access mechanism |
|
- | 63 | mov al,[BOOT_VAR+0x9020] |
|
- | 64 | ret |
|
- | 65 | pci_fn_3: |
|
- | 66 | ||
- | 67 | cmp al,4 |
|
- | 68 | jz pci_read_reg ;byte |
|
- | 69 | cmp al,5 |
|
- | 70 | jz pci_read_reg ;word |
|
- | 71 | cmp al,6 |
|
- | 72 | jz pci_read_reg ;dword |
|
- | 73 | ||
- | 74 | cmp al,8 |
|
- | 75 | jz pci_write_reg ;byte |
|
- | 76 | cmp al,9 |
|
- | 77 | jz pci_write_reg ;word |
|
Line 106... | Line -... | ||
106 | ret |
- | |
107 | - | ||
108 | ;pci_fn_2: |
- | |
109 | ; cmp al,2 |
- | |
110 | ; jne pci_fn_3 |
- | |
111 | ; PCI function 2: get pci access mechanism |
- | |
112 | .2: |
- | |
113 | movzx eax, byte [BOOT_VAR+0x9020] |
- | |
114 | ret |
- | |
115 | ;pci_fn_3: |
- | |
116 | - | ||
117 | ; cmp al,4 |
- | |
118 | ; jz pci_read_reg ;byte |
- | |
119 | ; cmp al,5 |
- | |
120 | ; jz pci_read_reg ;word |
- | |
121 | ; cmp al,6 |
78 | cmp al,10 |
122 | ; jz pci_read_reg ;dword |
- | |
123 | - | ||
124 | ; cmp al,8 |
- | |
125 | ; jz pci_write_reg ;byte |
- | |
126 | ; cmp al,9 |
- | |
127 | ; jz pci_write_reg ;word |
- | |
Line 128... | Line -... | ||
128 | ; cmp al,10 |
- | |
129 | ; jz pci_write_reg ;dword |
- | |
130 | 79 | jz pci_write_reg ;dword |
|
- | 80 | ||
131 | ;if defined mmio_pci_addr |
81 | cmp al,11 ; user-level MMIO functions |
Line 132... | Line 82... | ||
132 | ; cmp al,11 ; user-level MMIO functions |
82 | jz pci_mmio_init |
133 | ; jz pci_mmio_init |
83 | cmp al,12 |
134 | ; cmp al,12 |
84 | jz pci_mmio_map |
135 | ; jz pci_mmio_map |
85 | cmp al,13 |
136 | ; cmp al,13 |
86 | jz pci_mmio_unmap |
137 | ; jz pci_mmio_unmap |
87 | |
138 | ;end if |
88 | |
139 | 89 | no_pci_access_for_applications: |
|
140 | .not_support: |
90 | |
141 | .no_pci_access_for_applications: |
91 | or eax,-1 |
142 | or eax,-1 |
92 | |
143 | ret |
93 | ret |
Line 144... | Line 94... | ||
144 | 94 | ||
Line 145... | Line 95... | ||
145 | ;*************************************************************************** |
95 | ;*************************************************************************** |
146 | ; Function |
96 | ; Function |
147 | ; pci_make_config_cmd |
97 | ; pci_make_config_cmd |
148 | ; |
98 | ; |
149 | ; Description |
99 | ; Description |
150 | ; creates a command dword for use with the PCI bus |
100 | ; creates a command dword for use with the PCI bus |
Line 151... | Line 101... | ||
151 | ; bus # in bh;ah |
101 | ; bus # in ah |
152 | ; device+func in ch;bh (dddddfff) |
102 | ; device+func in bh (dddddfff) |
153 | ; register in cl;bl |
103 | ; register in bl |
Line 176... | Line 126... | ||
176 | ;*************************************************************************** |
126 | ;*************************************************************************** |
Line 177... | Line 127... | ||
177 | 127 | ||
Line 178... | Line 128... | ||
178 | align 4 |
128 | align 4 |
179 | - | ||
180 | pci_read_reg: |
- | |
181 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
- | |
182 | je pci_read_reg_2 |
- | |
183 | 129 | ||
184 | ; mechanism 1 |
130 | pci_read_reg: |
185 | ; push esi ; save register size into ESI |
131 | push esi ; save register size into ESI |
Line 186... | Line 132... | ||
186 | mov esi,ebx;eax |
132 | mov esi,eax |
187 | and esi,3 |
133 | and esi,3 |
188 | 134 | ||
189 | call pci_make_config_cmd |
135 | call pci_make_config_cmd |
190 | mov eax,ebx;ebx,eax |
136 | mov ebx,eax |
191 | ; get current state |
137 | ; get current state |
192 | mov dx,0xcf8 |
138 | mov dx,0xcf8 |
Line 199... | Line 145... | ||
199 | ; get requested DWORD of config data |
145 | ; get requested DWORD of config data |
200 | mov dl,0xfc |
146 | mov dl,0xfc |
201 | and bl,3 |
147 | and bl,3 |
202 | or dl,bl ; add to port address first 2 bits of register address |
148 | or dl,bl ; add to port address first 2 bits of register address |
Line 203... | Line 149... | ||
203 | 149 | ||
204 | ; or esi,esi |
150 | or esi,esi |
205 | ; jz pci_read_byte1 |
151 | jz pci_read_byte1 |
206 | ; cmp esi,1 |
152 | cmp esi,1 |
207 | ; jz pci_read_word1 |
153 | jz pci_read_word1 |
208 | ; cmp esi,2 |
154 | cmp esi,2 |
209 | ; jz pci_read_dword1 |
155 | jz pci_read_dword1 |
210 | ; jmp pci_fin_read1 |
- | |
Line 211... | Line 156... | ||
211 | jmp dword [f62_rcall+esi*4] |
156 | jmp pci_fin_read1 |
212 | 157 | ||
213 | .0: |
158 | pci_read_byte1: |
214 | in al,dx |
159 | in al,dx |
215 | jmp .pci_fin_read1 |
160 | jmp pci_fin_read1 |
216 | .1: |
161 | pci_read_word1: |
217 | in ax,dx |
162 | in ax,dx |
218 | jmp .pci_fin_read1 |
163 | jmp pci_fin_read1 |
219 | .2: |
164 | pci_read_dword1: |
220 | in eax,dx |
165 | in eax,dx |
221 | ; jmp pci_fin_read1 |
166 | jmp pci_fin_read1 |
222 | .pci_fin_read1: |
167 | pci_fin_read1: |
223 | ; restore configuration control |
168 | ; restore configuration control |
224 | xchg eax,[esp] |
169 | xchg eax,[esp] |
Line 225... | Line 170... | ||
225 | mov dx,0xcf8 |
170 | mov dx,0xcf8 |
226 | out dx,eax |
171 | out dx,eax |
227 | 172 | ||
228 | pop eax |
- | |
229 | ;pop esi |
- | |
230 | ret |
- | |
231 | pci_read_reg_2: |
- | |
232 | - | ||
233 | test ch,128;bh,128 ;mech#2 only supports 16 devices per bus |
- | |
234 | jnz pci_api.not_support |
- | |
235 | - | ||
Line 236... | Line -... | ||
236 | ; push esi ; save register size into ESI |
- | |
237 | mov esi,ebx;eax |
- | |
238 | and esi,3 |
- | |
239 | - | ||
240 | push ebx;eax |
- | |
241 | mov eax,ebx |
- | |
242 | ;store current state of config space |
- | |
243 | mov dx,0xcf8 |
- | |
244 | in al,dx |
- | |
245 | mov ah,al |
- | |
246 | mov dl,0xfa |
- | |
247 | in al,dx |
- | |
248 | - | ||
249 | xchg eax,[esp] |
- | |
250 | ; out 0xcfa,bus |
- | |
251 | mov al,ah |
- | |
252 | out dx,al |
- | |
253 | ; out 0xcf8,0x80 |
- | |
254 | mov dl,0xf8 |
- | |
255 | mov al,0x80 |
- | |
256 | out dx,al |
- | |
257 | ; compute addr |
- | |
258 | shr ch,3;bh,3 ; func is ignored in mechanism 2 |
- | |
259 | or ch,0xc0;bh,0xc0 |
- | |
260 | mov dx,cx;bx |
- | |
261 | - | ||
262 | ; or esi,esi |
- | |
263 | ; jz pci_read_byte2 |
173 | pop eax |
264 | ; cmp esi,1 |
- | |
265 | ; jz pci_read_word2 |
- | |
266 | ; cmp esi,2 |
- | |
267 | ; jz pci_read_dword2 |
- | |
268 | ; jmp pci_fin_read2 |
- | |
269 | jmp dword [f62_rcall2+esi*4] |
- | |
270 | - | ||
271 | .0: |
- | |
272 | in al,dx |
- | |
273 | jmp .pci_fin_read2 |
- | |
274 | .1: |
174 | pop esi |
275 | in ax,dx |
- | |
276 | jmp .pci_fin_read2 |
- | |
277 | .2: |
- | |
278 | in eax,dx |
- | |
279 | ; jmp pci_fin_read2 |
- | |
280 | - | ||
281 | .pci_fin_read2: |
- | |
282 | - | ||
283 | ; restore configuration space |
- | |
284 | xchg eax,[esp] |
- | |
285 | mov dx,0xcfa |
- | |
286 | out dx,al |
- | |
287 | mov dl,0xf8 |
175 | ret |
288 | mov al,ah |
- | |
289 | out dx,al |
176 | |
Line 290... | Line -... | ||
290 | - | ||
291 | pop eax |
- | |
292 | ; pop esi |
- | |
293 | ret |
- | |
Line 294... | Line 177... | ||
294 | 177 | pci_read_reg_err: |
|
295 | ;pci_read_reg_err: |
178 | xor eax,eax |
296 | ; or dword [esp+32],-1 |
179 | dec eax |
297 | ; ret |
180 | ret |
Line 310... | Line 193... | ||
310 | ;*************************************************************************** |
193 | ;*************************************************************************** |
Line 311... | Line 194... | ||
311 | 194 | ||
Line 312... | Line 195... | ||
312 | align 4 |
195 | align 4 |
313 | - | ||
314 | pci_write_reg: |
- | |
315 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
- | |
316 | je pci_write_reg_2 |
- | |
317 | 196 | ||
318 | ; mechanism 1 |
197 | pci_write_reg: |
319 | ; push esi ; save register size into ESI |
198 | push esi ; save register size into ESI |
Line 320... | Line 199... | ||
320 | mov esi,ebx;eax |
199 | mov esi,eax |
321 | and esi,3 ;not need |
200 | and esi,3 |
322 | - | ||
323 | call pci_make_config_cmd |
201 | |
324 | mov eax,ebx;ebx,eax |
202 | call pci_make_config_cmd |
325 | mov ecx,edx ;cross registers |
203 | mov ebx,eax |
326 | ; get current state into ecx |
204 | ; get current state into ecx |
327 | mov dx,0xcf8 |
205 | mov dx,0xcf8 |
Line 335... | Line 213... | ||
335 | mov dl,0xfc |
213 | mov dl,0xfc |
336 | and bl,3 |
214 | and bl,3 |
337 | or dl,bl |
215 | or dl,bl |
338 | mov eax,ecx |
216 | mov eax,ecx |
Line 339... | Line 217... | ||
339 | 217 | ||
340 | ; or esi,esi |
218 | or esi,esi |
341 | ; jz pci_write_byte1 |
219 | jz pci_write_byte1 |
342 | ; cmp esi,1 |
220 | cmp esi,1 |
343 | ; jz pci_write_word1 |
221 | jz pci_write_word1 |
344 | ; cmp esi,2 |
222 | cmp esi,2 |
345 | ; jz pci_write_dword1 |
223 | jz pci_write_dword1 |
346 | ; jmp pci_fin_write1 |
- | |
347 | jmp dword [f62_wcall+esi*4] |
224 | jmp pci_fin_write1 |
- | 225 | ||
348 | .0: |
226 | pci_write_byte1: |
349 | out dx,al |
227 | out dx,al |
350 | jmp .pci_fin_write1 |
228 | jmp pci_fin_write1 |
351 | .1: |
229 | pci_write_word1: |
352 | out dx,ax |
230 | out dx,ax |
353 | jmp .pci_fin_write1 |
231 | jmp pci_fin_write1 |
354 | .2: |
232 | pci_write_dword1: |
- | 233 | out dx,eax |
|
355 | out dx,eax |
234 | jmp pci_fin_write1 |
356 | .pci_fin_write1: |
- | |
357 | 235 | pci_fin_write1: |
|
358 | ; restore configuration control |
236 | ; restore configuration control |
359 | pop eax |
237 | pop eax |
360 | mov dl,0xf8 |
238 | mov dl,0xf8 |
Line 361... | Line 239... | ||
361 | out dx,eax |
239 | out dx,eax |
362 | 240 | ||
363 | xor eax,eax |
241 | xor eax,eax |
364 | ;pop esi |
- | |
365 | ret |
- | |
366 | pci_write_reg_2: |
- | |
367 | - | ||
368 | test ch,128;bh,128 ;mech#2 only supports 16 devices per bus |
- | |
369 | jnz pci_api.not_support |
- | |
370 | - | ||
371 | - | ||
372 | ; push esi ; save register size into ESI |
- | |
373 | mov esi,eax |
- | |
374 | and esi,3 ;not need |
- | |
375 | - | ||
376 | push eax |
- | |
377 | mov ecx,edx ;cross registers |
- | |
378 | ;store current state of config space |
- | |
379 | mov dx,0xcf8 |
- | |
380 | in al,dx |
- | |
381 | mov ah,al |
- | |
382 | mov dl,0xfa |
- | |
383 | in al,dx |
- | |
384 | xchg eax,[esp] |
- | |
385 | ; out 0xcfa,bus |
- | |
386 | mov al,ah |
- | |
387 | out dx,al |
- | |
388 | ; out 0xcf8,0x80 |
- | |
389 | mov dl,0xf8 |
- | |
390 | mov al,0x80 |
- | |
391 | out dx,al |
- | |
392 | ; compute addr |
- | |
393 | shr bh,3 ; func is ignored in mechanism 2 |
- | |
394 | or bh,0xc0 |
- | |
395 | mov dx,bx |
- | |
396 | ; write register |
- | |
397 | mov eax,ecx |
- | |
398 | - | ||
399 | ; or esi,esi |
- | |
400 | ; jz pci_write_byte2 |
- | |
401 | ; cmp esi,1 |
- | |
402 | ; jz pci_write_word2 |
- | |
403 | ; cmp esi,2 |
- | |
404 | ; jz pci_write_dword2 |
- | |
405 | ; jmp pci_fin_write2 |
- | |
406 | jmp dword [f62_wcall2+esi*4] |
- | |
407 | .0: |
- | |
408 | out dx,al |
- | |
409 | jmp .pci_fin_write2 |
- | |
410 | .1: |
- | |
411 | out dx,ax |
- | |
412 | jmp .pci_fin_write2 |
- | |
413 | .2: |
- | |
414 | out dx,eax |
- | |
415 | .pci_fin_write2: |
- | |
416 | ; restore configuration space |
- | |
417 | pop eax |
- | |
418 | mov dx,0xcfa |
- | |
419 | out dx,al |
- | |
420 | mov dl,0xf8 |
- | |
Line -... | Line 242... | ||
- | 242 | pop esi |
|
421 | mov al,ah |
243 | ret |
422 | out dx,al |
244 | |
423 | 245 | pci_write_reg_err: |
|
Line 424... | Line -... | ||
424 | xor eax,eax |
- | |
425 | ;pop esi |
- | |
426 | ret |
- | |
427 | - | ||
428 | ;pci_write_reg_err: |
- | |
429 | ; xor eax,eax |
- | |
430 | ; dec eax |
246 | xor eax,eax |
431 | ; ret |
247 | dec eax |
432 | 248 | ret |
|
433 | if defined mmio_pci_addr ; must be set above |
249 | |
434 | ;*************************************************************************** |
250 | ;*************************************************************************** |
435 | ; Function |
251 | ; Function |
436 | ; pci_mmio_init |
252 | ; pci_mmio_init |
437 | ; |
253 | ; |
438 | ; Description |
254 | ; Description |
439 | ; IN: cx = device's PCI bus address (bbbbbbbbdddddfff) |
- | |
440 | ; Returns eax = user heap space available (bytes) |
255 | ; IN: bx = device's PCI bus address (bbbbbbbbdddddfff) |
441 | ; Error codes |
256 | ; Returns eax = phys. address of user-accessible DMA block |
442 | ; eax = -1 : PCI user access blocked, |
257 | ; Error codes |
443 | ; eax = -2 : device not registered for uMMIO service |
258 | ; eax = -1 : PCI user access blocked, |
444 | ; eax = -3 : user heap initialization failure |
- | |
445 | ;*************************************************************************** |
- | |
446 | pci_mmio_init: |
- | |
447 | cmp cx, mmio_pci_addr |
259 | ; eax = -3 : user heap initialization failure |
448 | jz @f |
260 | ;*************************************************************************** |
449 | mov eax,-2 |
261 | pci_mmio_init: |
450 | ret |
262 | mov [mmio_pci_addr],bx |
- | 263 | ||
451 | @@: |
264 | call init_heap ; (if not initialized yet) |
452 | call init_heap ; (if not initialized yet) |
265 | or eax,eax |
453 | or eax,eax |
266 | jz @f |
454 | jz @f |
267 | mov eax, [UserDMAaddr] |
Line 463... | Line 276... | ||
463 | ; pci_mmio_map |
276 | ; pci_mmio_map |
464 | ; |
277 | ; |
465 | ; Description |
278 | ; Description |
466 | ; maps a block of PCI memory to user-accessible linear address |
279 | ; maps a block of PCI memory to user-accessible linear address |
467 | ; |
280 | ; |
468 | ; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only! |
- | |
469 | ; The target device address should be set in kernel var mmio_pci_addr |
- | |
470 | ; |
281 | ; |
471 | ; IN: ah = BAR#; |
282 | ; IN: ah = BAR#; or |
- | 283 | ; IN: ah = 0xDA for DMA-mapping requests; |
|
472 | ; IN: ebx = block size (bytes); |
284 | ; IN: ebx = block size (bytes); |
473 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
285 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
474 | ; |
286 | ; |
475 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
287 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
476 | ; |
288 | ; |
Line 482... | Line 294... | ||
482 | ; eax = -4 : a port i/o BAR register referred |
294 | ; eax = -4 : a port i/o BAR register referred |
483 | ; eax = -5 : dynamic userspace allocation problem |
295 | ; eax = -5 : dynamic userspace allocation problem |
484 | ;*************************************************************************** |
296 | ;*************************************************************************** |
Line 485... | Line 297... | ||
485 | 297 | ||
486 | pci_mmio_map: |
- | |
487 | ;cross |
- | |
488 | mov eax,ebx |
- | |
489 | mov ebx,ecx |
- | |
490 | mov ecx,edx |
- | |
491 | ;;;;;;;;;;;;;;;;;;; |
298 | pci_mmio_map: |
- | 299 | and edx,0x0ffff |
|
- | 300 | cmp ah, 0xDA |
|
492 | and edx,0x0ffff |
301 | jz .dma_map |
493 | cmp ah,6 |
302 | cmp ah,6 |
494 | jc .bar_0_5 |
303 | jb .bar_0_5 |
495 | jz .bar_rom |
304 | jz .bar_rom |
496 | mov eax,-2 |
305 | mov eax,-2 |
- | 306 | ret |
|
- | 307 | ||
- | 308 | .dma_map: |
|
- | 309 | push ecx |
|
- | 310 | mov ecx,ebx |
|
- | 311 | mov eax,[UserDMAaddr] |
|
- | 312 | jmp .allocate_block |
|
497 | ret |
313 | |
498 | .bar_rom: |
314 | .bar_rom: |
499 | mov ah, 8 ; bar6 = Expansion ROM base address |
315 | mov ah, 8 ; bar6 = Expansion ROM base address |
500 | .bar_0_5: |
316 | .bar_0_5: |
501 | push ecx |
317 | push ecx |
Line 504... | Line 320... | ||
504 | push ebx |
320 | push ebx |
505 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
321 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
506 | shl bl, 1 |
322 | shl bl, 1 |
507 | shl bl, 1 |
323 | shl bl, 1 |
508 | add bl, 0x10 ; now bl = BAR offset in PCI config. space |
324 | add bl, 0x10 ; now bl = BAR offset in PCI config. space |
509 | mov ax, mmio_pci_addr |
325 | mov ax, [mmio_pci_addr] |
510 | mov bh, al ; bh = dddddfff |
326 | mov bh, al ; bh = dddddfff |
511 | mov al, 2 ; al : DW to read |
327 | mov al, 2 ; al : DW to read |
512 | call pci_read_reg |
328 | call pci_read_reg |
513 | or eax, eax |
329 | or eax, eax |
514 | jnz @f |
330 | jnz @f |
Line 521... | Line 337... | ||
521 | jmp mmio_ret_fail |
337 | jmp mmio_ret_fail |
522 | @@: |
338 | @@: |
523 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
339 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
524 | mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx |
340 | mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx |
525 | and eax, 0xFFFFFFF0 |
341 | and eax, 0xFFFFFFF0 |
- | 342 | ||
- | 343 | .allocate_block: |
|
526 | push eax ; store MMIO physical address + keep 2DWords in the stack |
344 | push eax ; store MMIO physical address + keep the stack 2x4b deep |
527 | stdcall user_alloc, ecx |
345 | stdcall user_alloc, ecx |
528 | or eax, eax |
346 | or eax, eax |
529 | jnz mmio_map_over |
347 | jnz mmio_map_over |
530 | mov eax,-5 ; problem with page allocation |
348 | mov eax,-5 ; problem with page allocation |
Line 540... | Line 358... | ||
540 | mov ebx, eax ; ebx = linear address |
358 | mov ebx, eax ; ebx = linear address |
541 | pop eax ; eax = MMIO start |
359 | pop eax ; eax = MMIO start |
542 | pop edx ; edx = MMIO shift (pages) |
360 | pop edx ; edx = MMIO shift (pages) |
543 | shl edx, 12 ; edx = MMIO shift (bytes) |
361 | shl edx, 12 ; edx = MMIO shift (bytes) |
544 | add eax, edx ; eax = uMMIO physical address |
362 | add eax, edx ; eax = uMMIO physical address |
545 | or eax, PG_SHARED |
- | |
546 | or eax, PG_UW |
- | |
547 | or eax, PG_NOCACHE |
363 | or eax, (PG_SHARED+PG_UW+PG_NOCACHE) |
548 | mov edi, ebx |
364 | mov edi, ebx |
549 | call commit_pages |
365 | call commit_pages |
550 | mov eax, edi |
366 | mov eax, edi |
551 | ret |
367 | ret |
Line 564... | Line 380... | ||
564 | ; eax = -1 if no user PCI access allowed, |
380 | ; eax = -1 if no user PCI access allowed, |
565 | ; eax = 0 if unmapping failed |
381 | ; eax = 0 if unmapping failed |
566 | ;*************************************************************************** |
382 | ;*************************************************************************** |
Line 567... | Line 383... | ||
567 | 383 | ||
568 | pci_mmio_unmap: |
384 | pci_mmio_unmap: |
569 | stdcall user_free, ecx;ebx |
385 | stdcall user_free, ebx |
Line 570... | Line -... | ||
570 | ret |
- | |
571 | - | ||
572 | end if |
386 | ret |
573 | 387 | ||
574 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
388 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
575 | uglobal |
389 | uglobal |
576 | align 4 |
390 | align 4 |