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/**************************************************************************
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/**************************************************************************
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 *
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 *
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 * Copyright © 2009-2011 VMware, Inc., Palo Alto, CA., USA
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 * Copyright © 2009-2011 VMware, Inc., Palo Alto, CA., USA
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 * All Rights Reserved.
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 * All Rights Reserved.
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 *
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 * the following conditions:
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 *
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 *
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 * The above copyright notice and this permission notice (including the
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 * of the Software.
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 *
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 *
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 **************************************************************************/
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 **************************************************************************/
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#define mb()    asm volatile("mfence" : : : "memory")
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#define mb()    asm volatile("mfence" : : : "memory")
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#define rmb()   asm volatile("lfence" : : : "memory")
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#define rmb()   asm volatile("lfence" : : : "memory")
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#define wmb()   asm volatile("sfence" : : : "memory")
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#define wmb()   asm volatile("sfence" : : : "memory")
30
 
30
 
31
#include "vmwgfx_drv.h"
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#include "vmwgfx_drv.h"
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#include 
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#include 
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#include 
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#include 
34
 
34
 
-
 
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#define VMW_PPN_SIZE (sizeof(unsigned long))
-
 
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/* A future safe maximum remap size. */
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#define VMW_PPN_SIZE sizeof(unsigned long)
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#define VMW_PPN_PER_REMAP ((31 * 1024) / VMW_PPN_SIZE)
36
 
38
 
37
static int vmw_gmr2_bind(struct vmw_private *dev_priv,
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static int vmw_gmr2_bind(struct vmw_private *dev_priv,
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			 struct page *pages[],
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			 struct page *pages[],
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			 unsigned long num_pages,
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			 unsigned long num_pages,
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			 int gmr_id)
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			 int gmr_id)
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{
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{
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	SVGAFifoCmdDefineGMR2 define_cmd;
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	SVGAFifoCmdDefineGMR2 define_cmd;
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	SVGAFifoCmdRemapGMR2 remap_cmd;
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	SVGAFifoCmdRemapGMR2 remap_cmd;
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	uint32_t define_size = sizeof(define_cmd) + 4;
-
 
45
	uint32_t remap_size = VMW_PPN_SIZE * num_pages + sizeof(remap_cmd) + 4;
-
 
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	uint32_t *cmd;
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	uint32_t *cmd;
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	uint32_t *cmd_orig;
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	uint32_t *cmd_orig;
-
 
48
	uint32_t define_size = sizeof(define_cmd) + sizeof(*cmd);
-
 
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	uint32_t remap_num = num_pages / VMW_PPN_PER_REMAP + ((num_pages % VMW_PPN_PER_REMAP) > 0);
-
 
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	uint32_t remap_size = VMW_PPN_SIZE * num_pages + (sizeof(remap_cmd) + sizeof(*cmd)) * remap_num;
-
 
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	uint32_t remap_pos = 0;
-
 
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	uint32_t cmd_size = define_size + remap_size;
48
	uint32_t i;
53
	uint32_t i;
49
 
54
 
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	cmd_orig = cmd = vmw_fifo_reserve(dev_priv, define_size + remap_size);
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	cmd_orig = cmd = vmw_fifo_reserve(dev_priv, cmd_size);
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	if (unlikely(cmd == NULL))
56
	if (unlikely(cmd == NULL))
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		return -ENOMEM;
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		return -ENOMEM;
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58
 
54
	define_cmd.gmrId = gmr_id;
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	define_cmd.gmrId = gmr_id;
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	define_cmd.numPages = num_pages;
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	define_cmd.numPages = num_pages;
-
 
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-
 
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	*cmd++ = SVGA_CMD_DEFINE_GMR2;
-
 
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	memcpy(cmd, &define_cmd, sizeof(define_cmd));
-
 
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	cmd += sizeof(define_cmd) / sizeof(*cmd);
-
 
65
 
-
 
66
	/*
-
 
67
	 * Need to split the command if there are too many
-
 
68
	 * pages that goes into the gmr.
-
 
69
	 */
56
 
70
 
57
	remap_cmd.gmrId = gmr_id;
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	remap_cmd.gmrId = gmr_id;
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	remap_cmd.flags = (VMW_PPN_SIZE > sizeof(*cmd)) ?
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	remap_cmd.flags = (VMW_PPN_SIZE > sizeof(*cmd)) ?
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		SVGA_REMAP_GMR2_PPN64 : SVGA_REMAP_GMR2_PPN32;
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		SVGA_REMAP_GMR2_PPN64 : SVGA_REMAP_GMR2_PPN32;
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	remap_cmd.offsetPages = 0;
-
 
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	remap_cmd.numPages = num_pages;
-
 
62
 
74
 
-
 
75
	while (num_pages > 0) {
-
 
76
		unsigned long nr = min(num_pages, (unsigned long)VMW_PPN_PER_REMAP);
63
	*cmd++ = SVGA_CMD_DEFINE_GMR2;
77
 
64
	memcpy(cmd, &define_cmd, sizeof(define_cmd));
78
		remap_cmd.offsetPages = remap_pos;
65
	cmd += sizeof(define_cmd) / sizeof(uint32);
79
		remap_cmd.numPages = nr;
66
 
80
 
67
	*cmd++ = SVGA_CMD_REMAP_GMR2;
81
	*cmd++ = SVGA_CMD_REMAP_GMR2;
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	memcpy(cmd, &remap_cmd, sizeof(remap_cmd));
82
	memcpy(cmd, &remap_cmd, sizeof(remap_cmd));
69
	cmd += sizeof(remap_cmd) / sizeof(uint32);
83
		cmd += sizeof(remap_cmd) / sizeof(*cmd);
70
 
84
 
71
	for (i = 0; i < num_pages; ++i) {
85
		for (i = 0; i < nr; ++i) {
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		if (VMW_PPN_SIZE <= 4)
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		if (VMW_PPN_SIZE <= 4)
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			*cmd = page_to_pfn(*pages++);
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			*cmd = page_to_pfn(*pages++);
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		else
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		else
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			*((uint64_t *)cmd) = page_to_pfn(*pages++);
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			*((uint64_t *)cmd) = page_to_pfn(*pages++);
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90
 
77
		cmd += VMW_PPN_SIZE / sizeof(*cmd);
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		cmd += VMW_PPN_SIZE / sizeof(*cmd);
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	}
92
	}
-
 
93
 
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		num_pages -= nr;
-
 
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		remap_pos += nr;
-
 
96
	}
-
 
97
 
-
 
98
	BUG_ON(cmd != cmd_orig + cmd_size / sizeof(*cmd));
79
 
99
 
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	vmw_fifo_commit(dev_priv, define_size + remap_size);
100
	vmw_fifo_commit(dev_priv, cmd_size);
81
 
101
 
82
	return 0;
102
	return 0;
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}
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}
84
 
104
 
85
static void vmw_gmr2_unbind(struct vmw_private *dev_priv,
105
static void vmw_gmr2_unbind(struct vmw_private *dev_priv,
86
			    int gmr_id)
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			    int gmr_id)
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{
107
{
88
	SVGAFifoCmdDefineGMR2 define_cmd;
108
	SVGAFifoCmdDefineGMR2 define_cmd;
89
	uint32_t define_size = sizeof(define_cmd) + 4;
109
	uint32_t define_size = sizeof(define_cmd) + 4;
90
	uint32_t *cmd;
110
	uint32_t *cmd;
91
 
111
 
92
	cmd = vmw_fifo_reserve(dev_priv, define_size);
112
	cmd = vmw_fifo_reserve(dev_priv, define_size);
93
	if (unlikely(cmd == NULL)) {
113
	if (unlikely(cmd == NULL)) {
94
		DRM_ERROR("GMR2 unbind failed.\n");
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		DRM_ERROR("GMR2 unbind failed.\n");
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		return;
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		return;
96
	}
116
	}
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	define_cmd.gmrId = gmr_id;
117
	define_cmd.gmrId = gmr_id;
98
	define_cmd.numPages = 0;
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	define_cmd.numPages = 0;
99
 
119
 
100
	*cmd++ = SVGA_CMD_DEFINE_GMR2;
120
	*cmd++ = SVGA_CMD_DEFINE_GMR2;
101
	memcpy(cmd, &define_cmd, sizeof(define_cmd));
121
	memcpy(cmd, &define_cmd, sizeof(define_cmd));
102
 
122
 
103
	vmw_fifo_commit(dev_priv, define_size);
123
	vmw_fifo_commit(dev_priv, define_size);
104
}
124
}
105
 
125
 
106
 
126
 
107
int vmw_gmr_bind(struct vmw_private *dev_priv,
127
int vmw_gmr_bind(struct vmw_private *dev_priv,
108
		 struct page *pages[],
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		 struct page *pages[],
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		 unsigned long num_pages,
129
		 unsigned long num_pages,
110
		 int gmr_id)
130
		 int gmr_id)
111
{
131
{
112
	struct list_head desc_pages;
132
	struct list_head desc_pages;
113
	int ret;
133
	int ret;
114
 
134
 
115
	if (likely(dev_priv->capabilities & SVGA_CAP_GMR2))
135
	if (likely(dev_priv->capabilities & SVGA_CAP_GMR2))
116
		return vmw_gmr2_bind(dev_priv, pages, num_pages, gmr_id);
136
		return vmw_gmr2_bind(dev_priv, pages, num_pages, gmr_id);
117
 
137
 
118
    printf("%s epic fail\n",__FUNCTION__);
138
    printf("%s epic fail\n",__FUNCTION__);
119
    return -EINVAL;
139
    return -EINVAL;
120
}
140
}
121
 
141
 
122
 
142
 
123
void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id)
143
void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id)
124
{
144
{
125
	if (likely(dev_priv->capabilities & SVGA_CAP_GMR2)) {
145
	if (likely(dev_priv->capabilities & SVGA_CAP_GMR2)) {
126
		vmw_gmr2_unbind(dev_priv, gmr_id);
146
		vmw_gmr2_unbind(dev_priv, gmr_id);
127
		return;
147
		return;
128
	}
148
	}
129
 
149
 
130
	mutex_lock(&dev_priv->hw_mutex);
150
	mutex_lock(&dev_priv->hw_mutex);
131
	vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
151
	vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
132
	wmb();
152
	wmb();
133
	vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, 0);
153
	vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, 0);
134
	mb();
154
	mb();
135
	mutex_unlock(&dev_priv->hw_mutex);
155
	mutex_unlock(&dev_priv->hw_mutex);
136
}
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}