Subversion Repositories Kolibri OS

Rev

Rev 5078 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 5078 Rev 6296
Line 1... Line 1...
1
/**************************************************************************
1
/**************************************************************************
2
 *
2
 *
3
 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
3
 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
4
 * All Rights Reserved.
4
 * All Rights Reserved.
5
 *
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a
6
 * Permission is hereby granted, free of charge, to any person obtaining a
7
 * copy of this software and associated documentation files (the
7
 * copy of this software and associated documentation files (the
8
 * "Software"), to deal in the Software without restriction, including
8
 * "Software"), to deal in the Software without restriction, including
Line 26... Line 26...
26
 **************************************************************************/
26
 **************************************************************************/
27
#include 
27
#include 
Line 28... Line 28...
28
 
28
 
29
#include 
29
#include 
-
 
30
#include "vmwgfx_drv.h"
30
#include "vmwgfx_drv.h"
31
#include "vmwgfx_binding.h"
31
#include 
32
#include 
32
#include 
33
#include 
33
#include 
34
#include 
34
//#include 
35
#include 
Line 35... Line 36...
35
#include 
36
#include 
36
 
37
 
37
#define VMWGFX_DRIVER_NAME "vmwgfx"
38
#define VMWGFX_DRIVER_NAME "vmwgfx"
Line 125... Line 126...
125
	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GB_SURFACE_REF,	\
126
	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GB_SURFACE_REF,	\
126
		 union drm_vmw_gb_surface_reference_arg)
127
		 union drm_vmw_gb_surface_reference_arg)
127
#define DRM_IOCTL_VMW_SYNCCPU					\
128
#define DRM_IOCTL_VMW_SYNCCPU					\
128
	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_SYNCCPU,		\
129
	DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_SYNCCPU,		\
129
		 struct drm_vmw_synccpu_arg)
130
		 struct drm_vmw_synccpu_arg)
-
 
131
#define DRM_IOCTL_VMW_CREATE_EXTENDED_CONTEXT			\
-
 
132
	DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_EXTENDED_CONTEXT,	\
-
 
133
		struct drm_vmw_context_arg)
Line 130... Line 134...
130
 
134
 
131
/**
135
/**
132
 * The core DRM version of this macro doesn't account for
136
 * The core DRM version of this macro doesn't account for
133
 * DRM_COMMAND_BASE.
137
 * DRM_COMMAND_BASE.
Line 134... Line 138...
134
 */
138
 */
135
 
139
 
Line 136... Line 140...
136
#define VMW_IOCTL_DEF(ioctl, func, flags) \
140
#define VMW_IOCTL_DEF(ioctl, func, flags) \
137
  [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl}
141
  [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_IOCTL_##ioctl, flags, func}
138
 
142
 
Line 139... Line 143...
139
/**
143
/**
140
 * Ioctl definitions.
144
 * Ioctl definitions.
141
 */
145
 */
142
 
146
 
143
static const struct drm_ioctl_desc vmw_ioctls[] = {
147
static const struct drm_ioctl_desc vmw_ioctls[] = {
144
	VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
148
	VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
145
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
149
		      DRM_AUTH | DRM_RENDER_ALLOW),
146
	VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
150
	VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
147
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
151
		      DRM_AUTH | DRM_RENDER_ALLOW),
148
	VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
152
	VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
Line 149... Line 153...
149
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
153
		      DRM_RENDER_ALLOW),
150
	VMW_IOCTL_DEF(VMW_CURSOR_BYPASS,
154
	VMW_IOCTL_DEF(VMW_CURSOR_BYPASS,
151
		      vmw_kms_cursor_bypass_ioctl,
155
		      vmw_kms_cursor_bypass_ioctl,
152
		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
156
		      DRM_MASTER | DRM_CONTROL_ALLOW),
153
 
157
 
154
	VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl,
158
	VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl,
Line 155... Line 159...
155
		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
159
		      DRM_MASTER | DRM_CONTROL_ALLOW),
156
	VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
160
	VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
157
		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
161
		      DRM_MASTER | DRM_CONTROL_ALLOW),
158
	VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
162
	VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
159
		      DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
163
		      DRM_MASTER | DRM_CONTROL_ALLOW),
160
 
164
 
161
	VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
165
	VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
162
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
166
		      DRM_AUTH | DRM_RENDER_ALLOW),
163
	VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
167
	VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
164
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
168
		      DRM_RENDER_ALLOW),
165
	VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
169
	VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
166
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
170
		      DRM_AUTH | DRM_RENDER_ALLOW),
167
	VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
171
	VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
168
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
172
		      DRM_RENDER_ALLOW),
169
	VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl,
173
	VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl,
170
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
174
		      DRM_AUTH | DRM_RENDER_ALLOW),
171
	VMW_IOCTL_DEF(VMW_EXECBUF, vmw_execbuf_ioctl,
175
	VMW_IOCTL_DEF(VMW_EXECBUF, NULL, DRM_AUTH |
172
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
176
		      DRM_RENDER_ALLOW),
173
	VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_obj_wait_ioctl,
177
	VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_obj_wait_ioctl,
174
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
178
		      DRM_RENDER_ALLOW),
175
	VMW_IOCTL_DEF(VMW_FENCE_SIGNALED,
179
	VMW_IOCTL_DEF(VMW_FENCE_SIGNALED,
176
		      vmw_fence_obj_signaled_ioctl,
180
		      vmw_fence_obj_signaled_ioctl,
177
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
181
		      DRM_RENDER_ALLOW),
Line 178... Line 182...
178
	VMW_IOCTL_DEF(VMW_FENCE_UNREF, vmw_fence_obj_unref_ioctl,
182
	VMW_IOCTL_DEF(VMW_FENCE_UNREF, vmw_fence_obj_unref_ioctl,
179
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
183
		      DRM_RENDER_ALLOW),
180
	VMW_IOCTL_DEF(VMW_FENCE_EVENT, vmw_fence_event_ioctl,
184
	VMW_IOCTL_DEF(VMW_FENCE_EVENT, vmw_fence_event_ioctl,
181
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
185
		      DRM_AUTH | DRM_RENDER_ALLOW),
182
	VMW_IOCTL_DEF(VMW_GET_3D_CAP, vmw_get_cap_3d_ioctl,
186
	VMW_IOCTL_DEF(VMW_GET_3D_CAP, vmw_get_cap_3d_ioctl,
183
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
187
		      DRM_AUTH | DRM_RENDER_ALLOW),
184
 
188
 
185
	/* these allow direct access to the framebuffers mark as master only */
189
	/* these allow direct access to the framebuffers mark as master only */
186
	VMW_IOCTL_DEF(VMW_PRESENT, vmw_present_ioctl,
190
	VMW_IOCTL_DEF(VMW_PRESENT, vmw_present_ioctl,
187
		      DRM_MASTER | DRM_AUTH | DRM_UNLOCKED),
191
		      DRM_MASTER | DRM_AUTH),
188
	VMW_IOCTL_DEF(VMW_PRESENT_READBACK,
192
	VMW_IOCTL_DEF(VMW_PRESENT_READBACK,
189
		      vmw_present_readback_ioctl,
193
		      vmw_present_readback_ioctl,
190
		      DRM_MASTER | DRM_AUTH | DRM_UNLOCKED),
194
		      DRM_MASTER | DRM_AUTH),
191
	VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT,
195
	VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT,
192
		      vmw_kms_update_layout_ioctl,
196
		      vmw_kms_update_layout_ioctl,
193
		      DRM_MASTER | DRM_UNLOCKED),
197
		      DRM_MASTER),
194
	VMW_IOCTL_DEF(VMW_CREATE_SHADER,
198
	VMW_IOCTL_DEF(VMW_CREATE_SHADER,
195
		      vmw_shader_define_ioctl,
199
		      vmw_shader_define_ioctl,
196
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
200
		      DRM_AUTH | DRM_RENDER_ALLOW),
197
	VMW_IOCTL_DEF(VMW_UNREF_SHADER,
201
	VMW_IOCTL_DEF(VMW_UNREF_SHADER,
198
		      vmw_shader_destroy_ioctl,
202
		      vmw_shader_destroy_ioctl,
199
		      DRM_UNLOCKED | DRM_RENDER_ALLOW),
203
		      DRM_RENDER_ALLOW),
200
	VMW_IOCTL_DEF(VMW_GB_SURFACE_CREATE,
204
	VMW_IOCTL_DEF(VMW_GB_SURFACE_CREATE,
-
 
205
		      vmw_gb_surface_define_ioctl,
-
 
206
		      DRM_AUTH | DRM_RENDER_ALLOW),
-
 
207
	VMW_IOCTL_DEF(VMW_GB_SURFACE_REF,
201
		      vmw_gb_surface_define_ioctl,
208
		      vmw_gb_surface_reference_ioctl,
202
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
209
		      DRM_AUTH | DRM_RENDER_ALLOW),
203
	VMW_IOCTL_DEF(VMW_GB_SURFACE_REF,
210
	VMW_IOCTL_DEF(VMW_SYNCCPU,
Line 204... Line 211...
204
		      vmw_gb_surface_reference_ioctl,
211
		      vmw_user_dmabuf_synccpu_ioctl,
205
		      DRM_AUTH | DRM_UNLOCKED | DRM_RENDER_ALLOW),
212
		      DRM_RENDER_ALLOW),
Line 274... Line 281...
274
		DRM_INFO("  Command Buffers.\n");
281
		DRM_INFO("  Command Buffers.\n");
275
	if (capabilities & SVGA_CAP_CMD_BUFFERS_2)
282
	if (capabilities & SVGA_CAP_CMD_BUFFERS_2)
276
		DRM_INFO("  Command Buffers 2.\n");
283
		DRM_INFO("  Command Buffers 2.\n");
277
	if (capabilities & SVGA_CAP_GBOBJECTS)
284
	if (capabilities & SVGA_CAP_GBOBJECTS)
278
		DRM_INFO("  Guest Backed Resources.\n");
285
		DRM_INFO("  Guest Backed Resources.\n");
-
 
286
	if (capabilities & SVGA_CAP_DX)
-
 
287
		DRM_INFO("  DX Features.\n");
279
}
288
}
Line 280... Line 289...
280
 
289
 
281
/**
290
/**
282
 * vmw_dummy_query_bo_create - create a bo to hold a dummy query result
291
 * vmw_dummy_query_bo_create - create a bo to hold a dummy query result
Line 292... Line 301...
292
 * Returns an error if bo creation or initialization fails.
301
 * Returns an error if bo creation or initialization fails.
293
 */
302
 */
294
static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv)
303
static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv)
295
{
304
{
296
	int ret;
305
	int ret;
297
	struct ttm_buffer_object *bo;
306
	struct vmw_dma_buffer *vbo;
298
	struct ttm_bo_kmap_obj map;
307
	struct ttm_bo_kmap_obj map;
299
	volatile SVGA3dQueryResult *result;
308
	volatile SVGA3dQueryResult *result;
300
	bool dummy;
309
	bool dummy;
Line 301... Line 310...
301
 
310
 
302
	/*
311
	/*
303
	 * Create the bo as pinned, so that a tryreserve will
312
	 * Create the vbo as pinned, so that a tryreserve will
304
	 * immediately succeed. This is because we're the only
313
	 * immediately succeed. This is because we're the only
305
	 * user of the bo currently.
314
	 * user of the bo currently.
306
	 */
315
	 */
307
	ret = ttm_bo_create(&dev_priv->bdev,
316
	vbo = kzalloc(sizeof(*vbo), GFP_KERNEL);
308
			     PAGE_SIZE,
-
 
309
			     ttm_bo_type_device,
-
 
310
			    &vmw_sys_ne_placement,
-
 
311
			     0, false, NULL,
317
	if (!vbo)
Line -... Line 318...
-
 
318
		return -ENOMEM;
-
 
319
 
-
 
320
	ret = vmw_dmabuf_init(dev_priv, vbo, PAGE_SIZE,
312
			    &bo);
321
			      &vmw_sys_ne_placement, false,
313
 
322
			      &vmw_dmabuf_bo_free);
Line 314... Line 323...
314
	if (unlikely(ret != 0))
323
	if (unlikely(ret != 0))
315
		return ret;
324
		return ret;
-
 
325
 
Line 316... Line 326...
316
 
326
	ret = ttm_bo_reserve(&vbo->base, false, true, false, NULL);
317
	ret = ttm_bo_reserve(bo, false, true, false, NULL);
327
	BUG_ON(ret != 0);
318
	BUG_ON(ret != 0);
328
	vmw_bo_pin_reserved(vbo, true);
319
 
329
 
320
	ret = ttm_bo_kmap(bo, 0, 1, &map);
330
	ret = ttm_bo_kmap(&vbo->base, 0, 1, &map);
321
	if (likely(ret == 0)) {
331
	if (likely(ret == 0)) {
322
		result = ttm_kmap_obj_virtual(&map, &dummy);
332
		result = ttm_kmap_obj_virtual(&map, &dummy);
323
		result->totalSize = sizeof(*result);
333
		result->totalSize = sizeof(*result);
324
		result->state = SVGA3D_QUERYSTATE_PENDING;
334
		result->state = SVGA3D_QUERYSTATE_PENDING;
325
		result->result32 = 0xff;
335
		result->result32 = 0xff;
Line 326... Line 336...
326
		ttm_bo_kunmap(&map);
336
		ttm_bo_kunmap(&map);
327
	}
337
	}
328
	vmw_bo_pin(bo, false);
338
	vmw_bo_pin_reserved(vbo, false);
329
	ttm_bo_unreserve(bo);
339
	ttm_bo_unreserve(&vbo->base);
330
 
340
 
Line 331... Line 341...
331
	if (unlikely(ret != 0)) {
341
	if (unlikely(ret != 0)) {
332
		DRM_ERROR("Dummy query buffer map failed.\n");
342
		DRM_ERROR("Dummy query buffer map failed.\n");
Line -... Line 343...
-
 
343
		vmw_dmabuf_unreference(&vbo);
-
 
344
	} else
-
 
345
		dev_priv->dummy_query_bo = vbo;
-
 
346
 
-
 
347
	return ret;
-
 
348
}
-
 
349
 
-
 
350
/**
-
 
351
 * vmw_request_device_late - Perform late device setup
-
 
352
 *
-
 
353
 * @dev_priv: Pointer to device private.
-
 
354
 *
-
 
355
 * This function performs setup of otables and enables large command
-
 
356
 * buffer submission. These tasks are split out to a separate function
-
 
357
 * because it reverts vmw_release_device_early and is intended to be used
-
 
358
 * by an error path in the hibernation code.
-
 
359
 */
-
 
360
static int vmw_request_device_late(struct vmw_private *dev_priv)
-
 
361
{
-
 
362
	int ret;
-
 
363
 
-
 
364
	if (dev_priv->has_mob) {
-
 
365
		ret = vmw_otables_setup(dev_priv);
-
 
366
		if (unlikely(ret != 0)) {
-
 
367
			DRM_ERROR("Unable to initialize "
-
 
368
				  "guest Memory OBjects.\n");
-
 
369
			return ret;
-
 
370
		}
-
 
371
	}
-
 
372
 
-
 
373
	if (dev_priv->cman) {
-
 
374
		ret = vmw_cmdbuf_set_pool_size(dev_priv->cman,
-
 
375
					       256*4096, 2*4096);
-
 
376
		if (ret) {
-
 
377
			struct vmw_cmdbuf_man *man = dev_priv->cman;
-
 
378
 
-
 
379
			dev_priv->cman = NULL;
333
		ttm_bo_unref(&bo);
380
			vmw_cmdbuf_man_destroy(man);
334
	} else
381
		}
335
		dev_priv->dummy_query_bo = bo;
382
	}
Line 336... Line 383...
336
 
383
 
337
	return ret;
384
	return 0;
338
}
385
}
339
 
386
 
340
static int vmw_request_device(struct vmw_private *dev_priv)
387
static int vmw_request_device(struct vmw_private *dev_priv)
341
{
388
{
342
	int ret;
389
	int ret;
343
 
390
 
344
	ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
391
	ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
345
	if (unlikely(ret != 0)) {
392
	if (unlikely(ret != 0)) {
-
 
393
		DRM_ERROR("Unable to initialize FIFO.\n");
Line -... Line 394...
-
 
394
		return ret;
-
 
395
	}
-
 
396
	vmw_fence_fifo_up(dev_priv->fman);
Line -... Line 397...
-
 
397
	dev_priv->cman = vmw_cmdbuf_man_create(dev_priv);
-
 
398
	if (IS_ERR(dev_priv->cman)) {
-
 
399
		dev_priv->cman = NULL;
Line 346... Line 400...
346
		DRM_ERROR("Unable to initialize FIFO.\n");
400
		dev_priv->has_dx = false;
Line 347... Line 401...
347
		return ret;
401
	}
-
 
402
 
-
 
403
	ret = vmw_request_device_late(dev_priv);
-
 
404
	if (ret)
-
 
405
		goto out_no_mob;
-
 
406
 
-
 
407
	ret = vmw_dummy_query_bo_create(dev_priv);
-
 
408
	if (unlikely(ret != 0))
-
 
409
		goto out_no_query_bo;
-
 
410
 
348
	}
411
	return 0;
349
//   vmw_fence_fifo_up(dev_priv->fman);
412
 
350
//   ret = vmw_dummy_query_bo_create(dev_priv);
413
out_no_query_bo:
351
//   if (unlikely(ret != 0))
414
	if (dev_priv->cman)
Line -... Line 415...
-
 
415
		vmw_cmdbuf_remove_pool(dev_priv->cman);
-
 
416
	if (dev_priv->has_mob) {
-
 
417
//		(void) ttm_bo_evict_mm(&dev_priv->bdev, VMW_PL_MOB);
-
 
418
		vmw_otables_takedown(dev_priv);
-
 
419
	}
-
 
420
	if (dev_priv->cman)
-
 
421
		vmw_cmdbuf_man_destroy(dev_priv->cman);
-
 
422
out_no_mob:
352
//       goto out_no_query_bo;
423
	vmw_fence_fifo_down(dev_priv->fman);
353
//   vmw_dummy_query_bo_prepare(dev_priv);
424
	vmw_fifo_release(dev_priv, &dev_priv->fifo);
354
 
425
	return ret;
355
 
426
}
356
 
427
 
357
	return 0;
428
/**
Line 358... Line 429...
358
 
429
 * vmw_release_device_early - Early part of fifo takedown.
Line 359... Line 430...
359
out_no_query_bo:
430
 *
-
 
431
 * @dev_priv: Pointer to device private struct.
360
	vmw_fence_fifo_down(dev_priv->fman);
432
 *
-
 
433
 * This is the first part of command submission takedown, to be called before
-
 
434
 * buffer management is taken down.
361
	vmw_fifo_release(dev_priv, &dev_priv->fifo);
435
 */
-
 
436
static void vmw_release_device_early(struct vmw_private *dev_priv)
-
 
437
{
362
	return ret;
438
	/*
363
}
-
 
Line 364... Line 439...
364
 
439
	 * Previous destructions should've released
365
static void vmw_release_device(struct vmw_private *dev_priv)
440
	 * the pinned bo.
-
 
441
	 */
366
{
442
 
-
 
443
	BUG_ON(dev_priv->pinned_bo != NULL);
367
	/*
444
 
368
	 * Previous destructions should've released
445
	vmw_dmabuf_unreference(&dev_priv->dummy_query_bo);
369
	 * the pinned bo.
446
	if (dev_priv->cman)
370
	 */
447
		vmw_cmdbuf_remove_pool(dev_priv->cman);
371
 
-
 
372
	BUG_ON(dev_priv->pinned_bo != NULL);
448
 
373
 
-
 
374
	ttm_bo_unref(&dev_priv->dummy_query_bo);
-
 
375
	vmw_fence_fifo_down(dev_priv->fman);
-
 
376
	vmw_fifo_release(dev_priv, &dev_priv->fifo);
-
 
377
}
-
 
378
 
-
 
379
 
-
 
380
/**
-
 
381
 * Increase the 3d resource refcount.
-
 
382
 * If the count was prevously zero, initialize the fifo, switching to svga
-
 
383
 * mode. Note that the master holds a ref as well, and may request an
-
 
384
 * explicit switch to svga mode if fb is not running, using @unhide_svga.
-
 
385
 */
449
	if (dev_priv->has_mob) {
386
int vmw_3d_resource_inc(struct vmw_private *dev_priv,
-
 
387
			bool unhide_svga)
-
 
388
{
-
 
389
	int ret = 0;
-
 
390
 
-
 
391
	mutex_lock(&dev_priv->release_mutex);
-
 
392
	if (unlikely(dev_priv->num_3d_resources++ == 0)) {
-
 
393
        ret = vmw_request_device(dev_priv);
-
 
394
		if (unlikely(ret != 0))
-
 
395
			--dev_priv->num_3d_resources;
-
 
396
	} else if (unhide_svga) {
-
 
397
		mutex_lock(&dev_priv->hw_mutex);
-
 
398
		vmw_write(dev_priv, SVGA_REG_ENABLE,
-
 
399
			  vmw_read(dev_priv, SVGA_REG_ENABLE) &
-
 
400
			  ~SVGA_REG_ENABLE_HIDE);
-
 
401
		mutex_unlock(&dev_priv->hw_mutex);
450
		ttm_bo_evict_mm(&dev_priv->bdev, VMW_PL_MOB);
402
	}
-
 
403
 
-
 
404
	mutex_unlock(&dev_priv->release_mutex);
-
 
405
	return ret;
-
 
406
}
-
 
407
 
451
		vmw_otables_takedown(dev_priv);
408
/**
-
 
409
 * Decrease the 3d resource refcount.
-
 
410
 * If the count reaches zero, disable the fifo, switching to vga mode.
-
 
411
 * Note that the master holds a refcount as well, and may request an
-
 
412
 * explicit switch to vga mode when it releases its refcount to account
-
 
413
 * for the situation of an X server vt switch to VGA with 3d resources
-
 
414
 * active.
-
 
415
 */
-
 
416
void vmw_3d_resource_dec(struct vmw_private *dev_priv,
-
 
417
			 bool hide_svga)
-
 
Line 418... Line 452...
418
{
452
	}
419
	int32_t n3d;
453
}
Line 420... Line 454...
420
 
454
 
421
	mutex_lock(&dev_priv->release_mutex);
455
/**
422
	if (unlikely(--dev_priv->num_3d_resources == 0))
456
 * vmw_release_device_late - Late part of fifo takedown.
Line 488... Line 522...
488
	static const char *names[vmw_dma_map_max] = {
522
	static const char *names[vmw_dma_map_max] = {
489
		[vmw_dma_phys] = "Using physical TTM page addresses.",
523
		[vmw_dma_phys] = "Using physical TTM page addresses.",
490
		[vmw_dma_alloc_coherent] = "Using coherent TTM pages.",
524
		[vmw_dma_alloc_coherent] = "Using coherent TTM pages.",
491
		[vmw_dma_map_populate] = "Keeping DMA mappings.",
525
		[vmw_dma_map_populate] = "Keeping DMA mappings.",
492
		[vmw_dma_map_bind] = "Giving up DMA mappings early."};
526
		[vmw_dma_map_bind] = "Giving up DMA mappings early."};
-
 
527
#ifdef CONFIG_X86
-
 
528
	const struct dma_map_ops *dma_ops = get_dma_ops(dev_priv->dev->dev);
Line -... Line 529...
-
 
529
 
-
 
530
#ifdef CONFIG_INTEL_IOMMU
-
 
531
	if (intel_iommu_enabled) {
-
 
532
		dev_priv->map_mode = vmw_dma_map_populate;
-
 
533
		goto out_fixup;
-
 
534
	}
-
 
535
#endif
-
 
536
 
493
 
537
	if (!(vmw_force_iommu || vmw_force_coherent)) {
494
    dev_priv->map_mode = vmw_dma_phys;
538
		dev_priv->map_mode = vmw_dma_phys;
-
 
539
		DRM_INFO("DMA map mode: %s\n", names[dev_priv->map_mode]);
-
 
540
		return 0;
-
 
541
	}
-
 
542
 
-
 
543
	dev_priv->map_mode = vmw_dma_map_populate;
-
 
544
 
-
 
545
	if (dma_ops->sync_single_for_cpu)
-
 
546
		dev_priv->map_mode = vmw_dma_alloc_coherent;
-
 
547
#ifdef CONFIG_SWIOTLB
-
 
548
	if (swiotlb_nr_tbl() == 0)
-
 
549
		dev_priv->map_mode = vmw_dma_map_populate;
-
 
550
#endif
-
 
551
 
-
 
552
#ifdef CONFIG_INTEL_IOMMU
-
 
553
out_fixup:
-
 
554
#endif
-
 
555
	if (dev_priv->map_mode == vmw_dma_map_populate &&
-
 
556
	    vmw_restrict_iommu)
-
 
557
		dev_priv->map_mode = vmw_dma_map_bind;
-
 
558
 
-
 
559
	if (vmw_force_coherent)
-
 
560
		dev_priv->map_mode = vmw_dma_alloc_coherent;
-
 
561
 
-
 
562
#if !defined(CONFIG_SWIOTLB) && !defined(CONFIG_INTEL_IOMMU)
-
 
563
	/*
-
 
564
	 * No coherent page pool
-
 
565
	 */
-
 
566
	if (dev_priv->map_mode == vmw_dma_alloc_coherent)
-
 
567
		return -EINVAL;
-
 
568
#endif
-
 
569
 
-
 
570
#else /* CONFIG_X86 */
-
 
571
	dev_priv->map_mode = vmw_dma_map_populate;
-
 
572
#endif /* CONFIG_X86 */
-
 
573
 
Line 495... Line 574...
495
    DRM_INFO("DMA map mode: %s\n", names[dev_priv->map_mode]);
574
	DRM_INFO("DMA map mode: %s\n", names[dev_priv->map_mode]);
496
 
575
 
Line 497... Line 576...
497
	return 0;
576
	return 0;
Line 541... Line 620...
541
	pci_set_master(dev->pdev);
620
	pci_set_master(dev->pdev);
Line 542... Line 621...
542
 
621
 
543
	dev_priv->dev = dev;
622
	dev_priv->dev = dev;
544
	dev_priv->vmw_chipset = chipset;
623
	dev_priv->vmw_chipset = chipset;
545
	dev_priv->last_read_seqno = (uint32_t) -100;
-
 
546
	mutex_init(&dev_priv->hw_mutex);
624
	dev_priv->last_read_seqno = (uint32_t) -100;
547
	mutex_init(&dev_priv->cmdbuf_mutex);
625
	mutex_init(&dev_priv->cmdbuf_mutex);
548
	mutex_init(&dev_priv->release_mutex);
626
	mutex_init(&dev_priv->release_mutex);
549
	mutex_init(&dev_priv->binding_mutex);
627
	mutex_init(&dev_priv->binding_mutex);
550
	rwlock_init(&dev_priv->resource_lock);
628
	rwlock_init(&dev_priv->resource_lock);
-
 
629
	ttm_lock_init(&dev_priv->reservation_sem);
-
 
630
	spin_lock_init(&dev_priv->hw_lock);
-
 
631
	spin_lock_init(&dev_priv->waiter_lock);
-
 
632
	spin_lock_init(&dev_priv->cap_lock);
Line 551... Line 633...
551
	ttm_lock_init(&dev_priv->reservation_sem);
633
	spin_lock_init(&dev_priv->svga_lock);
552
 
634
 
553
	for (i = vmw_res_context; i < vmw_res_max; ++i) {
635
	for (i = vmw_res_context; i < vmw_res_max; ++i) {
554
		idr_init(&dev_priv->res_idr[i]);
636
		idr_init(&dev_priv->res_idr[i]);
Line 555... Line 637...
555
		INIT_LIST_HEAD(&dev_priv->res_lru[i]);
637
		INIT_LIST_HEAD(&dev_priv->res_lru[i]);
556
	}
638
	}
557
 
639
 
558
	mutex_init(&dev_priv->init_mutex);
640
	mutex_init(&dev_priv->init_mutex);
559
	init_waitqueue_head(&dev_priv->fence_queue);
641
	init_waitqueue_head(&dev_priv->fence_queue);
Line 560... Line 642...
560
	init_waitqueue_head(&dev_priv->fifo_queue);
642
	init_waitqueue_head(&dev_priv->fifo_queue);
Line 561... Line 643...
561
	dev_priv->fence_queue_waiters = 0;
643
	dev_priv->fence_queue_waiters = 0;
562
	atomic_set(&dev_priv->fifo_queue_waiters, 0);
644
	dev_priv->fifo_queue_waiters = 0;
563
 
645
 
Line 564... Line 646...
564
	dev_priv->used_memory_size = 0;
646
	dev_priv->used_memory_size = 0;
Line 565... Line -...
565
 
-
 
566
	dev_priv->io_start = pci_resource_start(dev->pdev, 0);
-
 
567
	dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
647
 
568
	dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
648
	dev_priv->io_start = pci_resource_start(dev->pdev, 0);
569
 
649
	dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
570
	dev_priv->enable_fb = enable_fbdev;
650
	dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
571
 
651
 
572
	mutex_lock(&dev_priv->hw_mutex);
-
 
573
 
652
	dev_priv->enable_fb = enable_fbdev;
574
    vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
653
 
Line 575... Line 654...
575
	svga_id = vmw_read(dev_priv, SVGA_REG_ID);
654
	vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
576
	if (svga_id != SVGA_ID_2) {
655
	svga_id = vmw_read(dev_priv, SVGA_REG_ID);
Line 620... Line 699...
620
		dev_priv->prim_bb_mem =
699
		dev_priv->prim_bb_mem =
621
			vmw_read(dev_priv,
700
			vmw_read(dev_priv,
622
				 SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM);
701
				 SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM);
623
		dev_priv->max_mob_size =
702
		dev_priv->max_mob_size =
624
			vmw_read(dev_priv, SVGA_REG_MOB_MAX_SIZE);
703
			vmw_read(dev_priv, SVGA_REG_MOB_MAX_SIZE);
-
 
704
		dev_priv->stdu_max_width =
-
 
705
			vmw_read(dev_priv, SVGA_REG_SCREENTARGET_MAX_WIDTH);
-
 
706
		dev_priv->stdu_max_height =
-
 
707
			vmw_read(dev_priv, SVGA_REG_SCREENTARGET_MAX_HEIGHT);
-
 
708
 
-
 
709
		vmw_write(dev_priv, SVGA_REG_DEV_CAP,
-
 
710
			  SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH);
-
 
711
		dev_priv->texture_max_width = vmw_read(dev_priv,
-
 
712
						       SVGA_REG_DEV_CAP);
-
 
713
		vmw_write(dev_priv, SVGA_REG_DEV_CAP,
-
 
714
			  SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT);
-
 
715
		dev_priv->texture_max_height = vmw_read(dev_priv,
-
 
716
							SVGA_REG_DEV_CAP);
625
	} else
717
	} else {
-
 
718
		dev_priv->texture_max_width = 8192;
-
 
719
		dev_priv->texture_max_height = 8192;
626
		dev_priv->prim_bb_mem = dev_priv->vram_size;
720
		dev_priv->prim_bb_mem = dev_priv->vram_size;
627
 
-
 
628
	ret = vmw_dma_masks(dev_priv);
-
 
629
	if (unlikely(ret != 0)) {
-
 
630
		mutex_unlock(&dev_priv->hw_mutex);
-
 
631
		goto out_err0;
-
 
632
	}
721
	}
Line 633... Line -...
633
 
-
 
634
	if (unlikely(dev_priv->prim_bb_mem < dev_priv->vram_size))
-
 
635
		dev_priv->prim_bb_mem = dev_priv->vram_size;
-
 
636
 
-
 
637
	mutex_unlock(&dev_priv->hw_mutex);
-
 
638
 
722
 
Line -... Line 723...
-
 
723
	vmw_print_capabilities(dev_priv->capabilities);
-
 
724
 
-
 
725
	ret = vmw_dma_masks(dev_priv);
-
 
726
	if (unlikely(ret != 0))
639
	vmw_print_capabilities(dev_priv->capabilities);
727
		goto out_err0;
640
 
728
 
641
	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
729
	if (dev_priv->capabilities & SVGA_CAP_GMR2) {
642
		DRM_INFO("Max GMR ids is %u\n",
730
		DRM_INFO("Max GMR ids is %u\n",
643
			 (unsigned)dev_priv->max_gmr_ids);
731
			 (unsigned)dev_priv->max_gmr_ids);
Line 659... Line 747...
659
 
747
 
660
 
748
 
Line 661... Line -...
661
	vmw_master_init(&dev_priv->fbdev_master);
-
 
662
	dev_priv->active_master = &dev_priv->fbdev_master;
-
 
663
 
-
 
664
 
-
 
665
	ret = ttm_bo_device_init(&dev_priv->bdev,
-
 
666
				 dev_priv->bo_global_ref.ref.object,
-
 
667
				 &vmw_bo_driver,
-
 
668
				 NULL,
-
 
669
				 VMWGFX_FILE_PAGE_OFFSET,
-
 
670
				 false);
-
 
671
	if (unlikely(ret != 0)) {
-
 
672
		DRM_ERROR("Failed initializing TTM buffer object driver.\n");
-
 
673
		goto out_err1;
-
 
674
	}
-
 
675
 
-
 
676
	ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
-
 
677
			     (dev_priv->vram_size >> PAGE_SHIFT));
-
 
678
	if (unlikely(ret != 0)) {
-
 
679
		DRM_ERROR("Failed initializing memory manager for VRAM.\n");
-
 
680
		goto out_err2;
-
 
681
	}
-
 
682
 
-
 
683
	dev_priv->has_gmr = true;
-
 
684
	if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
-
 
685
	    refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
-
 
686
					 VMW_PL_GMR) != 0) {
-
 
687
		DRM_INFO("No GMR memory available. "
-
 
688
			 "Graphics memory resources are very limited.\n");
-
 
689
		dev_priv->has_gmr = false;
-
 
690
	}
-
 
691
 
-
 
692
	if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
-
 
693
		dev_priv->has_mob = true;
-
 
694
		if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
-
 
695
				   VMW_PL_MOB) != 0) {
-
 
696
			DRM_INFO("No MOB memory available. "
-
 
697
				 "3D will be disabled.\n");
-
 
698
			dev_priv->has_mob = false;
749
	vmw_master_init(&dev_priv->fbdev_master);
699
		}
750
	dev_priv->active_master = &dev_priv->fbdev_master;
Line 700... Line 751...
700
	}
751
 
701
	dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
752
	dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
Line 726... Line 777...
726
	}
777
	}
Line 727... Line 778...
727
 
778
 
Line 728... Line 779...
728
	dev->dev_private = dev_priv;
779
	dev->dev_private = dev_priv;
-
 
780
 
-
 
781
#if 0
-
 
782
	ret = pci_request_regions(dev->pdev, "vmwgfx probe");
-
 
783
	dev_priv->stealth = (ret != 0);
-
 
784
	if (dev_priv->stealth) {
-
 
785
		/**
-
 
786
		 * Request at least the mmio PCI resource.
-
 
787
		 */
-
 
788
 
-
 
789
		DRM_INFO("It appears like vesafb is loaded. "
-
 
790
			 "Ignore above error if any.\n");
-
 
791
		ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
-
 
792
		if (unlikely(ret != 0)) {
-
 
793
			DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
-
 
794
			goto out_no_device;
Line 729... Line 795...
729
 
795
		}
730
#if 0
796
	}
731
 
797
 
732
	if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
798
	if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
733
		ret = drm_irq_install(dev, dev->pdev->irq);
799
		ret = drm_irq_install(dev, dev->pdev->irq);
734
		if (ret != 0) {
800
		if (ret != 0) {
735
			DRM_ERROR("Failed installing irq: %d\n", ret);
801
			DRM_ERROR("Failed installing irq: %d\n", ret);
-
 
802
			goto out_no_irq;
Line 736... Line 803...
736
			goto out_no_irq;
803
		}
737
		}
804
	}
738
	}
805
#endif
739
 
806
 
740
	dev_priv->fman = vmw_fence_manager_init(dev_priv);
807
	dev_priv->fman = vmw_fence_manager_init(dev_priv);
Line 741... Line 808...
741
	if (unlikely(dev_priv->fman == NULL)) {
808
	if (unlikely(dev_priv->fman == NULL)) {
-
 
809
		ret = -ENOMEM;
-
 
810
		goto out_no_fman;
-
 
811
	}
-
 
812
 
-
 
813
	ret = ttm_bo_device_init(&dev_priv->bdev,
-
 
814
				 dev_priv->bo_global_ref.ref.object,
-
 
815
				 &vmw_bo_driver,
-
 
816
				 NULL,
-
 
817
				 VMWGFX_FILE_PAGE_OFFSET,
-
 
818
				 false);
-
 
819
	if (unlikely(ret != 0)) {
-
 
820
		DRM_ERROR("Failed initializing TTM buffer object driver.\n");
-
 
821
		goto out_no_bdev;
742
		ret = -ENOMEM;
822
	}
-
 
823
 
-
 
824
	/*
-
 
825
	 * Enable VRAM, but initially don't use it until SVGA is enabled and
-
 
826
	 * unhidden.
-
 
827
	 */
-
 
828
	ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
-
 
829
			     (dev_priv->vram_size >> PAGE_SHIFT));
-
 
830
	if (unlikely(ret != 0)) {
-
 
831
		DRM_ERROR("Failed initializing memory manager for VRAM.\n");
-
 
832
		goto out_no_vram;
-
 
833
	}
-
 
834
	dev_priv->bdev.man[TTM_PL_VRAM].use_type = false;
-
 
835
 
-
 
836
	dev_priv->has_gmr = true;
-
 
837
	if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
-
 
838
	    refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
-
 
839
					 VMW_PL_GMR) != 0) {
-
 
840
		DRM_INFO("No GMR memory available. "
-
 
841
			 "Graphics memory resources are very limited.\n");
-
 
842
		dev_priv->has_gmr = false;
-
 
843
	}
-
 
844
 
-
 
845
	if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
-
 
846
		dev_priv->has_mob = true;
-
 
847
		if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
-
 
848
				   VMW_PL_MOB) != 0) {
-
 
849
			DRM_INFO("No MOB memory available. "
-
 
850
				 "3D will be disabled.\n");
-
 
851
			dev_priv->has_mob = false;
-
 
852
		}
-
 
853
	}
-
 
854
 
-
 
855
	if (dev_priv->has_mob) {
-
 
856
		spin_lock(&dev_priv->cap_lock);
Line 743... Line -...
743
		goto out_no_fman;
-
 
744
	}
857
		vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_DX);
745
 
858
		dev_priv->has_dx = !!vmw_read(dev_priv, SVGA_REG_DEV_CAP);
746
	vmw_kms_save_vga(dev_priv);
859
		spin_unlock(&dev_priv->cap_lock);
-
 
860
	}
Line 747... Line -...
747
#endif
-
 
748
 
861
 
749
	/* Start kms and overlay systems, needs fifo. */
862
 
750
	ret = vmw_kms_init(dev_priv);
863
	ret = vmw_kms_init(dev_priv);
751
	if (unlikely(ret != 0))
-
 
752
		goto out_no_kms;
-
 
Line -... Line 864...
-
 
864
	if (unlikely(ret != 0))
-
 
865
		goto out_no_kms;
-
 
866
	vmw_overlay_init(dev_priv);
753
 
867
 
Line -... Line 868...
-
 
868
	ret = vmw_request_device(dev_priv);
-
 
869
	if (ret)
-
 
870
		goto out_no_fifo;
-
 
871
 
-
 
872
	DRM_INFO("DX: %s\n", dev_priv->has_dx ? "yes." : "no.");
-
 
873
 
-
 
874
    system_wq = alloc_ordered_workqueue("vmwgfx", 0);
754
    if (dev_priv->enable_fb) {
875
    main_device = dev;
Line 755... Line 876...
755
       ret = vmw_3d_resource_inc(dev_priv, true);
876
 
756
       if (unlikely(ret != 0))
877
    if (dev_priv->enable_fb) {
757
           goto out_no_fifo;
878
		vmw_fifo_resource_inc(dev_priv);
758
//       vmw_fb_init(dev_priv);
879
		vmw_svga_enable(dev_priv);
-
 
880
        vmw_fb_init(dev_priv);
-
 
881
    }
-
 
882
LINE();
-
 
883
 
-
 
884
	return 0;
-
 
885
 
759
    }
886
out_no_fifo:
-
 
887
	vmw_overlay_close(dev_priv);
760
 
888
	vmw_kms_close(dev_priv);
761
    main_device = dev;
889
out_no_kms:
762
 
890
//	if (dev_priv->has_mob)
763
	return 0;
891
//		(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
764
 
892
//	if (dev_priv->has_gmr)
Line 777... Line 905...
777
//   else
905
//	else
778
//       pci_release_regions(dev->pdev);
906
//		pci_release_regions(dev->pdev);
779
out_no_device:
907
out_no_device:
780
//   ttm_object_device_release(&dev_priv->tdev);
908
//	ttm_object_device_release(&dev_priv->tdev);
781
out_err4:
909
out_err4:
782
//   iounmap(dev_priv->mmio_virt);
910
//	memunmap(dev_priv->mmio_virt);
783
out_err3:
911
out_err3:
784
//   arch_phys_wc_del(dev_priv->mmio_mtrr);
-
 
785
//   if (dev_priv->has_gmr)
-
 
786
//       (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
-
 
787
//   (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
-
 
788
out_err2:
-
 
789
//   (void)ttm_bo_device_release(&dev_priv->bdev);
-
 
790
out_err1:
-
 
791
//   vmw_ttm_global_release(dev_priv);
912
//	vmw_ttm_global_release(dev_priv);
792
out_err0:
913
out_err0:
793
//   for (i = vmw_res_context; i < vmw_res_max; ++i)
914
//	for (i = vmw_res_context; i < vmw_res_max; ++i)
794
//       idr_destroy(&dev_priv->res_idr[i]);
915
//		idr_destroy(&dev_priv->res_idr[i]);
Line -... Line 916...
-
 
916
 
-
 
917
//	if (dev_priv->ctx.staged_bindings)
795
 
918
//		vmw_binding_state_free(dev_priv->ctx.staged_bindings);
796
	kfree(dev_priv);
919
	kfree(dev_priv);
797
	return ret;
920
	return ret;
Line 798... Line 921...
798
}
921
}
Line 805... Line 928...
805
 
928
 
Line 806... Line 929...
806
	unregister_pm_notifier(&dev_priv->pm_nb);
929
	unregister_pm_notifier(&dev_priv->pm_nb);
807
 
930
 
808
	if (dev_priv->ctx.res_ht_initialized)
-
 
809
		drm_ht_remove(&dev_priv->ctx.res_ht);
931
	if (dev_priv->ctx.res_ht_initialized)
810
	if (dev_priv->ctx.cmd_bounce)
932
		drm_ht_remove(&dev_priv->ctx.res_ht);
-
 
933
		vfree(dev_priv->ctx.cmd_bounce);
811
		vfree(dev_priv->ctx.cmd_bounce);
934
	if (dev_priv->enable_fb) {
812
	if (dev_priv->enable_fb) {
935
		vmw_fb_off(dev_priv);
813
		vmw_fb_close(dev_priv);
936
		vmw_fb_close(dev_priv);
814
		vmw_kms_restore_vga(dev_priv);
937
		vmw_fifo_resource_dec(dev_priv);
-
 
938
		vmw_svga_disable(dev_priv);
815
		vmw_3d_resource_dec(dev_priv, false);
939
	}
816
	}
940
 
-
 
941
	vmw_kms_close(dev_priv);
-
 
942
	vmw_overlay_close(dev_priv);
-
 
943
 
-
 
944
	if (dev_priv->has_gmr)
-
 
945
		(void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
-
 
946
	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
-
 
947
 
-
 
948
	vmw_release_device_early(dev_priv);
-
 
949
	if (dev_priv->has_mob)
-
 
950
		(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
817
	vmw_kms_close(dev_priv);
951
	(void) ttm_bo_device_release(&dev_priv->bdev);
818
	vmw_overlay_close(dev_priv);
952
	vmw_release_device_late(dev_priv);
819
	vmw_fence_manager_takedown(dev_priv->fman);
953
	vmw_fence_manager_takedown(dev_priv->fman);
820
	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
954
	if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
821
		drm_irq_uninstall(dev_priv->dev);
955
		drm_irq_uninstall(dev_priv->dev);
822
	if (dev_priv->stealth)
956
	if (dev_priv->stealth)
823
		pci_release_region(dev->pdev, 2);
957
		pci_release_region(dev->pdev, 2);
Line 824... Line 958...
824
	else
958
	else
825
		pci_release_regions(dev->pdev);
959
		pci_release_regions(dev->pdev);
826
 
-
 
827
	ttm_object_device_release(&dev_priv->tdev);
-
 
828
	iounmap(dev_priv->mmio_virt);
-
 
829
	arch_phys_wc_del(dev_priv->mmio_mtrr);
960
 
830
	if (dev_priv->has_mob)
-
 
831
		(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
961
	ttm_object_device_release(&dev_priv->tdev);
832
	if (dev_priv->has_gmr)
-
 
833
		(void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
962
	memunmap(dev_priv->mmio_virt);
Line 834... Line 963...
834
	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
963
	if (dev_priv->ctx.staged_bindings)
835
	(void)ttm_bo_device_release(&dev_priv->bdev);
964
		vmw_binding_state_free(dev_priv->ctx.staged_bindings);
Line 895... Line 1024...
895
	kfree(vmw_fp);
1024
	kfree(vmw_fp);
896
	return ret;
1025
	return ret;
897
}
1026
}
Line 898... Line 1027...
898
 
1027
 
-
 
1028
#if 0
-
 
1029
static struct vmw_master *vmw_master_check(struct drm_device *dev,
-
 
1030
					   struct drm_file *file_priv,
-
 
1031
					   unsigned int flags)
-
 
1032
{
-
 
1033
	int ret;
-
 
1034
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
-
 
1035
	struct vmw_master *vmaster;
-
 
1036
 
-
 
1037
	if (file_priv->minor->type != DRM_MINOR_LEGACY ||
-
 
1038
	    !(flags & DRM_AUTH))
-
 
1039
		return NULL;
-
 
1040
 
-
 
1041
	ret = mutex_lock_interruptible(&dev->master_mutex);
-
 
1042
	if (unlikely(ret != 0))
-
 
1043
		return ERR_PTR(-ERESTARTSYS);
-
 
1044
 
-
 
1045
	if (file_priv->is_master) {
-
 
1046
		mutex_unlock(&dev->master_mutex);
-
 
1047
		return NULL;
-
 
1048
	}
-
 
1049
 
-
 
1050
	/*
-
 
1051
	 * Check if we were previously master, but now dropped. In that
-
 
1052
	 * case, allow at least render node functionality.
-
 
1053
	 */
-
 
1054
	if (vmw_fp->locked_master) {
-
 
1055
		mutex_unlock(&dev->master_mutex);
-
 
1056
 
-
 
1057
		if (flags & DRM_RENDER_ALLOW)
-
 
1058
			return NULL;
-
 
1059
 
-
 
1060
		DRM_ERROR("Dropped master trying to access ioctl that "
-
 
1061
			  "requires authentication.\n");
-
 
1062
		return ERR_PTR(-EACCES);
-
 
1063
	}
-
 
1064
	mutex_unlock(&dev->master_mutex);
-
 
1065
 
-
 
1066
	/*
-
 
1067
	 * Take the TTM lock. Possibly sleep waiting for the authenticating
-
 
1068
	 * master to become master again, or for a SIGTERM if the
-
 
1069
	 * authenticating master exits.
-
 
1070
	 */
-
 
1071
	vmaster = vmw_master(file_priv->master);
-
 
1072
	ret = ttm_read_lock(&vmaster->lock, true);
-
 
1073
	if (unlikely(ret != 0))
-
 
1074
		vmaster = ERR_PTR(ret);
-
 
1075
 
-
 
1076
	return vmaster;
-
 
1077
}
899
#if 0
1078
 
900
static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
1079
static long vmw_generic_ioctl(struct file *filp, unsigned int cmd,
-
 
1080
			      unsigned long arg,
-
 
1081
			      long (*ioctl_func)(struct file *, unsigned int,
901
			       unsigned long arg)
1082
						 unsigned long))
902
{
1083
{
903
	struct drm_file *file_priv = filp->private_data;
1084
	struct drm_file *file_priv = filp->private_data;
904
	struct drm_device *dev = file_priv->minor->dev;
1085
	struct drm_device *dev = file_priv->minor->dev;
-
 
1086
	unsigned int nr = DRM_IOCTL_NR(cmd);
-
 
1087
	struct vmw_master *vmaster;
-
 
1088
	unsigned int flags;
Line 905... Line 1089...
905
	unsigned int nr = DRM_IOCTL_NR(cmd);
1089
	long ret;
906
 
1090
 
907
	/*
1091
	/*
Line 908... Line 1092...
908
	 * Do extra checking on driver private ioctls.
1092
	 * Do extra checking on driver private ioctls.
909
	 */
1093
	 */
910
 
1094
 
911
	if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
1095
	if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
Line -... Line 1096...
-
 
1096
	    && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
-
 
1097
		const struct drm_ioctl_desc *ioctl =
-
 
1098
		    &vmw_ioctls[nr - DRM_COMMAND_BASE];
-
 
1099
 
-
 
1100
		if (nr == DRM_COMMAND_BASE + DRM_VMW_EXECBUF) {
-
 
1101
			ret = (long) drm_ioctl_permit(ioctl->flags, file_priv);
-
 
1102
			if (unlikely(ret != 0))
-
 
1103
				return ret;
-
 
1104
 
-
 
1105
			if (unlikely((cmd & (IOC_IN | IOC_OUT)) != IOC_IN))
-
 
1106
				goto out_io_encoding;
-
 
1107
 
912
	    && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
1108
			return (long) vmw_execbuf_ioctl(dev, arg, file_priv,
-
 
1109
							_IOC_SIZE(cmd));
-
 
1110
		}
-
 
1111
 
-
 
1112
		if (unlikely(ioctl->cmd != cmd))
-
 
1113
			goto out_io_encoding;
-
 
1114
 
-
 
1115
		flags = ioctl->flags;
-
 
1116
	} else if (!drm_ioctl_flags(nr, &flags))
-
 
1117
		return -EINVAL;
-
 
1118
 
-
 
1119
	vmaster = vmw_master_check(dev, file_priv, flags);
-
 
1120
	if (IS_ERR(vmaster)) {
-
 
1121
		ret = PTR_ERR(vmaster);
-
 
1122
 
-
 
1123
		if (ret != -ERESTARTSYS)
-
 
1124
			DRM_INFO("IOCTL ERROR Command %d, Error %ld.\n",
-
 
1125
				 nr, ret);
-
 
1126
		return ret;
-
 
1127
	}
-
 
1128
 
-
 
1129
	ret = ioctl_func(filp, cmd, arg);
-
 
1130
	if (vmaster)
-
 
1131
		ttm_read_unlock(&vmaster->lock);
913
		const struct drm_ioctl_desc *ioctl =
1132
 
914
		    &vmw_ioctls[nr - DRM_COMMAND_BASE];
1133
	return ret;
-
 
1134
 
915
 
1135
out_io_encoding:
916
		if (unlikely(ioctl->cmd_drv != cmd)) {
1136
			DRM_ERROR("Invalid command format, ioctl %d\n",
917
			DRM_ERROR("Invalid command format, ioctl %d\n",
-
 
Line -... Line 1137...
-
 
1137
				  nr - DRM_COMMAND_BASE);
-
 
1138
 
-
 
1139
			return -EINVAL;
918
				  nr - DRM_COMMAND_BASE);
1140
}
919
			return -EINVAL;
1141
 
Line -... Line 1142...
-
 
1142
static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
920
		}
1143
			       unsigned long arg)
-
 
1144
{
921
	}
1145
	return vmw_generic_ioctl(filp, cmd, arg, &drm_ioctl);
922
 
-
 
923
	return drm_ioctl(filp, cmd, arg);
-
 
924
}
-
 
925
 
-
 
926
static void vmw_lastclose(struct drm_device *dev)
-
 
927
{
-
 
928
	struct drm_crtc *crtc;
-
 
929
	struct drm_mode_set set;
-
 
930
	int ret;
-
 
931
 
-
 
932
	set.x = 0;
-
 
933
	set.y = 0;
1146
}
934
	set.fb = NULL;
-
 
935
	set.mode = NULL;
-
 
936
	set.connectors = NULL;
-
 
937
	set.num_connectors = 0;
1147
 
-
 
1148
#ifdef CONFIG_COMPAT
Line -... Line 1149...
-
 
1149
static long vmw_compat_ioctl(struct file *filp, unsigned int cmd,
-
 
1150
			     unsigned long arg)
938
 
1151
{
939
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1152
	return vmw_generic_ioctl(filp, cmd, arg, &drm_compat_ioctl);
Line 940... Line 1153...
940
		set.crtc = crtc;
1153
}
941
		ret = drm_mode_set_config_internal(&set);
1154
#endif
942
		WARN_ON(ret != 0);
1155
 
943
	}
-
 
944
 
-
 
945
}
1156
static void vmw_lastclose(struct drm_device *dev)
Line 946... Line 1157...
946
#endif
1157
{
947
 
1158
}
948
static void vmw_master_init(struct vmw_master *vmaster)
1159
#endif
Line 986... Line 1197...
986
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
1197
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
987
	struct vmw_master *active = dev_priv->active_master;
1198
	struct vmw_master *active = dev_priv->active_master;
988
	struct vmw_master *vmaster = vmw_master(file_priv->master);
1199
	struct vmw_master *vmaster = vmw_master(file_priv->master);
989
	int ret = 0;
1200
	int ret = 0;
Line 990... Line -...
990
 
-
 
991
	if (!dev_priv->enable_fb) {
-
 
992
		ret = vmw_3d_resource_inc(dev_priv, true);
-
 
993
		if (unlikely(ret != 0))
-
 
994
			return ret;
-
 
995
		vmw_kms_save_vga(dev_priv);
-
 
996
		mutex_lock(&dev_priv->hw_mutex);
-
 
997
		vmw_write(dev_priv, SVGA_REG_TRACES, 0);
-
 
998
		mutex_unlock(&dev_priv->hw_mutex);
-
 
999
	}
-
 
1000
 
1201
 
1001
	if (active) {
1202
	if (active) {
1002
		BUG_ON(active != &dev_priv->fbdev_master);
1203
		BUG_ON(active != &dev_priv->fbdev_master);
1003
		ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
1204
		ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
1004
		if (unlikely(ret != 0))
1205
		if (unlikely(ret != 0))
Line 1005... Line 1206...
1005
			goto out_no_active_lock;
1206
			return ret;
1006
 
-
 
1007
		ttm_lock_set_kill(&active->lock, true, SIGTERM);
-
 
1008
		ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
-
 
1009
		if (unlikely(ret != 0)) {
-
 
1010
			DRM_ERROR("Unable to clean VRAM on "
-
 
1011
				  "master drop.\n");
-
 
1012
		}
1207
 
1013
 
1208
		ttm_lock_set_kill(&active->lock, true, SIGTERM);
Line 1014... Line 1209...
1014
		dev_priv->active_master = NULL;
1209
		dev_priv->active_master = NULL;
1015
	}
1210
	}
Line 1022... Line 1217...
1022
	}
1217
	}
Line 1023... Line 1218...
1023
 
1218
 
Line 1024... Line 1219...
1024
	dev_priv->active_master = vmaster;
1219
	dev_priv->active_master = vmaster;
1025
 
-
 
1026
	return 0;
-
 
1027
 
-
 
1028
out_no_active_lock:
-
 
1029
	if (!dev_priv->enable_fb) {
-
 
1030
		vmw_kms_restore_vga(dev_priv);
-
 
1031
		vmw_3d_resource_dec(dev_priv, true);
-
 
1032
		mutex_lock(&dev_priv->hw_mutex);
-
 
1033
		vmw_write(dev_priv, SVGA_REG_TRACES, 1);
-
 
1034
		mutex_unlock(&dev_priv->hw_mutex);
-
 
1035
	}
1220
 
Line 1036... Line 1221...
1036
	return ret;
1221
	return 0;
1037
}
1222
}
1038
 
1223
 
Line 1050... Line 1235...
1050
	 * it locked.
1235
	 * it locked.
1051
	 */
1236
	 */
Line 1052... Line 1237...
1052
 
1237
 
1053
	vmw_fp->locked_master = drm_master_get(file_priv->master);
1238
	vmw_fp->locked_master = drm_master_get(file_priv->master);
-
 
1239
	ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
1054
	ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
1240
	vmw_kms_legacy_hotspot_clear(dev_priv);
1055
	if (unlikely((ret != 0))) {
1241
	if (unlikely((ret != 0))) {
1056
		DRM_ERROR("Unable to lock TTM at VT switch.\n");
1242
		DRM_ERROR("Unable to lock TTM at VT switch.\n");
1057
		drm_master_put(&vmw_fp->locked_master);
1243
		drm_master_put(&vmw_fp->locked_master);
Line 1058... Line -...
1058
	}
-
 
Line 1059... Line 1244...
1059
 
1244
	}
1060
	vmw_execbuf_release_pinned_bo(dev_priv);
-
 
1061
 
-
 
1062
	if (!dev_priv->enable_fb) {
-
 
1063
		ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
1245
 
1064
		if (unlikely(ret != 0))
-
 
1065
			DRM_ERROR("Unable to clean VRAM on master drop.\n");
-
 
1066
		vmw_kms_restore_vga(dev_priv);
-
 
1067
		vmw_3d_resource_dec(dev_priv, true);
-
 
1068
		mutex_lock(&dev_priv->hw_mutex);
-
 
Line 1069... Line 1246...
1069
		vmw_write(dev_priv, SVGA_REG_TRACES, 1);
1246
 
1070
		mutex_unlock(&dev_priv->hw_mutex);
1247
	if (!dev_priv->enable_fb)
1071
	}
1248
		vmw_svga_disable(dev_priv);
Line 1072... Line 1249...
1072
 
1249
 
1073
	dev_priv->active_master = &dev_priv->fbdev_master;
1250
	dev_priv->active_master = &dev_priv->fbdev_master;
1074
	ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
1251
	ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
-
 
1252
	ttm_vt_unlock(&dev_priv->fbdev_master.lock);
-
 
1253
 
-
 
1254
	if (dev_priv->enable_fb)
-
 
1255
		vmw_fb_on(dev_priv);
-
 
1256
}
-
 
1257
#endif
-
 
1258
/**
-
 
1259
 * __vmw_svga_enable - Enable SVGA mode, FIFO and use of VRAM.
-
 
1260
 *
-
 
1261
 * @dev_priv: Pointer to device private struct.
-
 
1262
 * Needs the reservation sem to be held in non-exclusive mode.
-
 
1263
 */
-
 
1264
static void __vmw_svga_enable(struct vmw_private *dev_priv)
-
 
1265
{
-
 
1266
	spin_lock(&dev_priv->svga_lock);
-
 
1267
	if (!dev_priv->bdev.man[TTM_PL_VRAM].use_type) {
Line -... Line 1268...
-
 
1268
		vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE);
-
 
1269
		dev_priv->bdev.man[TTM_PL_VRAM].use_type = true;
-
 
1270
	}
-
 
1271
	spin_unlock(&dev_priv->svga_lock);
-
 
1272
}
-
 
1273
 
-
 
1274
/**
-
 
1275
 * vmw_svga_enable - Enable SVGA mode, FIFO and use of VRAM.
-
 
1276
 *
-
 
1277
 * @dev_priv: Pointer to device private struct.
-
 
1278
 */
Line -... Line 1279...
-
 
1279
void vmw_svga_enable(struct vmw_private *dev_priv)
1075
	ttm_vt_unlock(&dev_priv->fbdev_master.lock);
1280
{
1076
 
1281
	ttm_read_lock(&dev_priv->reservation_sem, false);
1077
	if (dev_priv->enable_fb)
1282
	__vmw_svga_enable(dev_priv);
Line 1078... Line 1283...
1078
		vmw_fb_on(dev_priv);
1283
	ttm_read_unlock(&dev_priv->reservation_sem);
Line 1092... Line 1297...
1092
	struct vmw_private *dev_priv =
1297
	struct vmw_private *dev_priv =
1093
		container_of(nb, struct vmw_private, pm_nb);
1298
		container_of(nb, struct vmw_private, pm_nb);
Line 1094... Line 1299...
1094
 
1299
 
1095
	switch (val) {
1300
	switch (val) {
-
 
1301
	case PM_HIBERNATION_PREPARE:
1096
	case PM_HIBERNATION_PREPARE:
1302
		if (dev_priv->enable_fb)
1097
	case PM_SUSPEND_PREPARE:
1303
			vmw_fb_off(dev_priv);
Line 1098... Line 1304...
1098
		ttm_suspend_lock(&dev_priv->reservation_sem);
1304
		ttm_suspend_lock(&dev_priv->reservation_sem);
1099
 
1305
 
1100
		/**
1306
		/*
1101
		 * This empties VRAM and unbinds all GMR bindings.
1307
		 * This empties VRAM and unbinds all GMR bindings.
1102
		 * Buffer contents is moved to swappable memory.
1308
		 * Buffer contents is moved to swappable memory.
1103
		 */
1309
		 */
-
 
1310
		vmw_execbuf_release_pinned_bo(dev_priv);
1104
		vmw_execbuf_release_pinned_bo(dev_priv);
1311
		vmw_resource_evict_all(dev_priv);
1105
		vmw_resource_evict_all(dev_priv);
-
 
-
 
1312
		vmw_release_device_early(dev_priv);
1106
		ttm_bo_swapout_all(&dev_priv->bdev);
1313
		ttm_bo_swapout_all(&dev_priv->bdev);
1107
 
1314
		vmw_fence_fifo_down(dev_priv->fman);
1108
		break;
-
 
1109
	case PM_POST_HIBERNATION:
1315
		break;
-
 
1316
	case PM_POST_HIBERNATION:
1110
	case PM_POST_SUSPEND:
1317
	case PM_POST_RESTORE:
1111
	case PM_POST_RESTORE:
-
 
-
 
1318
		vmw_fence_fifo_up(dev_priv->fman);
-
 
1319
		ttm_suspend_unlock(&dev_priv->reservation_sem);
1112
		ttm_suspend_unlock(&dev_priv->reservation_sem);
1320
		if (dev_priv->enable_fb)
1113
 
1321
			vmw_fb_on(dev_priv);
1114
		break;
1322
		break;
1115
	case PM_RESTORE_PREPARE:
1323
	case PM_RESTORE_PREPARE:
1116
		break;
1324
		break;
1117
	default:
1325
	default:
1118
		break;
1326
		break;
1119
	}
1327
	}
Line 1120... Line -...
1120
	return 0;
-
 
1121
}
-
 
1122
 
-
 
1123
/**
-
 
1124
 * These might not be needed with the virtual SVGA device.
1328
	return 0;
1125
 */
1329
}
1126
 
1330
 
1127
static int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1331
static int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Line 1128... Line 1332...
1128
{
1332
{
1129
	struct drm_device *dev = pci_get_drvdata(pdev);
-
 
1130
	struct vmw_private *dev_priv = vmw_priv(dev);
-
 
1131
 
1333
	struct drm_device *dev = pci_get_drvdata(pdev);
1132
	if (dev_priv->num_3d_resources != 0) {
-
 
Line 1133... Line 1334...
1133
		DRM_INFO("Can't suspend or hibernate "
1334
	struct vmw_private *dev_priv = vmw_priv(dev);
1134
			 "while 3D resources are active.\n");
1335
 
1135
		return -EBUSY;
1336
	if (dev_priv->refuse_hibernation)
1136
	}
1337
		return -EBUSY;
Line 1163... Line 1364...
1163
	struct pci_dev *pdev = to_pci_dev(kdev);
1364
	struct pci_dev *pdev = to_pci_dev(kdev);
Line 1164... Line 1365...
1164
 
1365
 
1165
	return vmw_pci_resume(pdev);
1366
	return vmw_pci_resume(pdev);
Line 1166... Line 1367...
1166
}
1367
}
1167
 
1368
 
1168
static int vmw_pm_prepare(struct device *kdev)
1369
static int vmw_pm_freeze(struct device *kdev)
1169
{
1370
{
1170
	struct pci_dev *pdev = to_pci_dev(kdev);
1371
	struct pci_dev *pdev = to_pci_dev(kdev);
Line 1171... Line -...
1171
	struct drm_device *dev = pci_get_drvdata(pdev);
-
 
1172
	struct vmw_private *dev_priv = vmw_priv(dev);
-
 
1173
 
-
 
1174
	/**
-
 
1175
	 * Release 3d reference held by fbdev and potentially
1372
	struct drm_device *dev = pci_get_drvdata(pdev);
1176
	 * stop fifo.
1373
	struct vmw_private *dev_priv = vmw_priv(dev);
1177
	 */
1374
 
1178
	dev_priv->suspended = true;
-
 
1179
	if (dev_priv->enable_fb)
-
 
1180
			vmw_3d_resource_dec(dev_priv, true);
-
 
1181
 
-
 
1182
	if (dev_priv->num_3d_resources != 0) {
-
 
Line -... Line 1375...
-
 
1375
	dev_priv->suspended = true;
-
 
1376
	if (dev_priv->enable_fb)
1183
 
1377
		vmw_fifo_resource_dec(dev_priv);
1184
		DRM_INFO("Can't suspend or hibernate "
1378
 
-
 
1379
	if (atomic_read(&dev_priv->num_fifo_resources) != 0) {
1185
			 "while 3D resources are active.\n");
1380
		DRM_ERROR("Can't hibernate while 3D resources are active.\n");
1186
 
1381
		if (dev_priv->enable_fb)
1187
		if (dev_priv->enable_fb)
1382
			vmw_fifo_resource_inc(dev_priv);
Line -... Line 1383...
-
 
1383
		WARN_ON(vmw_request_device_late(dev_priv));
-
 
1384
		dev_priv->suspended = false;
-
 
1385
		return -EBUSY;
-
 
1386
	}
-
 
1387
 
1188
			vmw_3d_resource_inc(dev_priv, true);
1388
	if (dev_priv->enable_fb)
1189
		dev_priv->suspended = false;
1389
		__vmw_svga_disable(dev_priv);
Line 1190... Line 1390...
1190
		return -EBUSY;
1390
	
Line 1203... Line 1403...
1203
//	.lastclose = vmw_lastclose,
1403
//	.lastclose = vmw_lastclose,
1204
   .irq_preinstall = vmw_irq_preinstall,
1404
   .irq_preinstall = vmw_irq_preinstall,
1205
   .irq_postinstall = vmw_irq_postinstall,
1405
   .irq_postinstall = vmw_irq_postinstall,
1206
//   .irq_uninstall = vmw_irq_uninstall,
1406
//   .irq_uninstall = vmw_irq_uninstall,
1207
   .irq_handler = vmw_irq_handler,
1407
   .irq_handler = vmw_irq_handler,
1208
//   .get_vblank_counter = vmw_get_vblank_counter,
1408
   .get_vblank_counter = vmw_get_vblank_counter,
1209
//   .enable_vblank = vmw_enable_vblank,
1409
   .enable_vblank = vmw_enable_vblank,
1210
//   .disable_vblank = vmw_disable_vblank,
1410
   .disable_vblank = vmw_disable_vblank,
1211
//   .ioctls = vmw_ioctls,
1411
//   .ioctls = vmw_ioctls,
1212
//   .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
1412
//   .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
1213
     .open = vmw_driver_open,
1413
     .open = vmw_driver_open,
1214
//   .preclose = vmw_preclose,
1414
//   .preclose = vmw_preclose,
1215
//   .postclose = vmw_postclose,
1415
//   .postclose = vmw_postclose,