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Rev 5271 | Rev 6104 | ||
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Line 334... | Line 334... | ||
334 | 0x00000204, 0x3fffffff, |
334 | 0x00000204, 0x3fffffff, |
335 | 0x00000200, 0xE030032C, |
335 | 0x00000200, 0xE030032C, |
336 | 0x00000204, 0x00000000, |
336 | 0x00000204, 0x00000000, |
337 | }; |
337 | }; |
Line -... | Line 338... | ||
- | 338 | ||
338 | 339 | extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable); |
|
339 | static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, |
340 | static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev, |
340 | const u32 *seq, u32 count); |
341 | const u32 *seq, u32 count); |
341 | static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev); |
342 | static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev); |
342 | static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, |
343 | static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, |
Line 983... | Line 984... | ||
983 | return; |
984 | return; |
Line 984... | Line 985... | ||
984 | 985 | ||
985 | trinity_setup_uvd_clocks(rdev, new_rps, old_rps); |
986 | trinity_setup_uvd_clocks(rdev, new_rps, old_rps); |
Line -... | Line 987... | ||
- | 987 | } |
|
- | 988 | ||
- | 989 | static void trinity_set_vce_clock(struct radeon_device *rdev, |
|
- | 990 | struct radeon_ps *new_rps, |
|
- | 991 | struct radeon_ps *old_rps) |
|
- | 992 | { |
|
- | 993 | if ((old_rps->evclk != new_rps->evclk) || |
|
- | 994 | (old_rps->ecclk != new_rps->ecclk)) { |
|
- | 995 | /* turn the clocks on when encoding, off otherwise */ |
|
- | 996 | if (new_rps->evclk || new_rps->ecclk) |
|
- | 997 | vce_v1_0_enable_mgcg(rdev, false); |
|
- | 998 | else |
|
- | 999 | vce_v1_0_enable_mgcg(rdev, true); |
|
- | 1000 | radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); |
|
- | 1001 | } |
|
986 | } |
1002 | } |
987 | 1003 | ||
988 | static void trinity_program_ttt(struct radeon_device *rdev) |
1004 | static void trinity_program_ttt(struct radeon_device *rdev) |
989 | { |
1005 | { |
Line 1244... | Line 1260... | ||
1244 | trinity_setup_nbp_sim(rdev, new_ps); |
1260 | trinity_setup_nbp_sim(rdev, new_ps); |
1245 | trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps); |
1261 | trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps); |
1246 | trinity_force_level_0(rdev); |
1262 | trinity_force_level_0(rdev); |
1247 | trinity_unforce_levels(rdev); |
1263 | trinity_unforce_levels(rdev); |
1248 | trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
1264 | trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
- | 1265 | trinity_set_vce_clock(rdev, new_ps, old_ps); |
|
1249 | } |
1266 | } |
1250 | trinity_release_mutex(rdev); |
1267 | trinity_release_mutex(rdev); |
Line 1251... | Line 1268... | ||
1251 | 1268 | ||
1252 | return 0; |
1269 | return 0; |
Line 1267... | Line 1284... | ||
1267 | sumo_take_smu_control(rdev, true); |
1284 | sumo_take_smu_control(rdev, true); |
1268 | trinity_get_min_sclk_divider(rdev); |
1285 | trinity_get_min_sclk_divider(rdev); |
1269 | trinity_release_mutex(rdev); |
1286 | trinity_release_mutex(rdev); |
1270 | } |
1287 | } |
Line -... | Line 1288... | ||
- | 1288 | ||
1271 | 1289 | #if 0 |
|
1272 | void trinity_dpm_reset_asic(struct radeon_device *rdev) |
1290 | void trinity_dpm_reset_asic(struct radeon_device *rdev) |
1273 | { |
1291 | { |
Line 1274... | Line 1292... | ||
1274 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
1292 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
Line 1282... | Line 1300... | ||
1282 | trinity_force_level_0(rdev); |
1300 | trinity_force_level_0(rdev); |
1283 | trinity_unforce_levels(rdev); |
1301 | trinity_unforce_levels(rdev); |
1284 | } |
1302 | } |
1285 | trinity_release_mutex(rdev); |
1303 | trinity_release_mutex(rdev); |
1286 | } |
1304 | } |
- | 1305 | #endif |
|
Line 1287... | Line 1306... | ||
1287 | 1306 | ||
1288 | static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev, |
1307 | static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev, |
1289 | u32 vid_2bit) |
1308 | u32 vid_2bit) |
1290 | { |
1309 | { |
Line 1479... | Line 1498... | ||
1479 | ps->dclk_high_divider = |
1498 | ps->dclk_high_divider = |
1480 | pi->sys_info.uvd_clock_table_entries[low_index].dclk_did; |
1499 | pi->sys_info.uvd_clock_table_entries[low_index].dclk_did; |
1481 | } |
1500 | } |
1482 | } |
1501 | } |
Line -... | Line 1502... | ||
- | 1502 | ||
- | 1503 | static int trinity_get_vce_clock_voltage(struct radeon_device *rdev, |
|
- | 1504 | u32 evclk, u32 ecclk, u16 *voltage) |
|
- | 1505 | { |
|
- | 1506 | u32 i; |
|
- | 1507 | int ret = -EINVAL; |
|
- | 1508 | struct radeon_vce_clock_voltage_dependency_table *table = |
|
- | 1509 | &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; |
|
- | 1510 | ||
- | 1511 | if (((evclk == 0) && (ecclk == 0)) || |
|
- | 1512 | (table && (table->count == 0))) { |
|
- | 1513 | *voltage = 0; |
|
- | 1514 | return 0; |
|
Line -... | Line 1515... | ||
- | 1515 | } |
|
- | 1516 | ||
- | 1517 | for (i = 0; i < table->count; i++) { |
|
- | 1518 | if ((evclk <= table->entries[i].evclk) && |
|
- | 1519 | (ecclk <= table->entries[i].ecclk)) { |
|
- | 1520 | *voltage = table->entries[i].v; |
|
- | 1521 | ret = 0; |
|
- | 1522 | break; |
|
- | 1523 | } |
|
- | 1524 | } |
|
- | 1525 | ||
- | 1526 | /* if no match return the highest voltage */ |
|
- | 1527 | if (ret) |
|
- | 1528 | *voltage = table->entries[table->count - 1].v; |
|
- | 1529 | ||
Line 1483... | Line 1530... | ||
1483 | 1530 | return ret; |
|
1484 | 1531 | } |
|
1485 | 1532 | ||
1486 | static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, |
1533 | static void trinity_apply_state_adjust_rules(struct radeon_device *rdev, |
Line 1492... | Line 1539... | ||
1492 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
1539 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
1493 | u32 min_voltage = 0; /* ??? */ |
1540 | u32 min_voltage = 0; /* ??? */ |
1494 | u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ |
1541 | u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ |
1495 | u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ |
1542 | u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ |
1496 | u32 i; |
1543 | u32 i; |
- | 1544 | u16 min_vce_voltage; |
|
1497 | bool force_high; |
1545 | bool force_high; |
1498 | u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; |
1546 | u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; |
Line 1499... | Line 1547... | ||
1499 | 1547 | ||
1500 | if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL) |
1548 | if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL) |
Line 1501... | Line 1549... | ||
1501 | return trinity_patch_thermal_state(rdev, ps, current_ps); |
1549 | return trinity_patch_thermal_state(rdev, ps, current_ps); |
Line -... | Line 1550... | ||
- | 1550 | ||
- | 1551 | trinity_adjust_uvd_state(rdev, new_rps); |
|
- | 1552 | ||
- | 1553 | if (new_rps->vce_active) { |
|
- | 1554 | new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
|
- | 1555 | new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; |
|
- | 1556 | } else { |
|
- | 1557 | new_rps->evclk = 0; |
|
1502 | 1558 | new_rps->ecclk = 0; |
|
1503 | trinity_adjust_uvd_state(rdev, new_rps); |
1559 | } |
1504 | 1560 | ||
Line 1505... | Line 1561... | ||
1505 | for (i = 0; i < ps->num_levels; i++) { |
1561 | for (i = 0; i < ps->num_levels; i++) { |
1506 | if (ps->levels[i].vddc_index < min_voltage) |
1562 | if (ps->levels[i].vddc_index < min_voltage) |
1507 | ps->levels[i].vddc_index = min_voltage; |
1563 | ps->levels[i].vddc_index = min_voltage; |
Line -... | Line 1564... | ||
- | 1564 | ||
- | 1565 | if (ps->levels[i].sclk < min_sclk) |
|
- | 1566 | ps->levels[i].sclk = |
|
- | 1567 | trinity_get_valid_engine_clock(rdev, min_sclk); |
|
- | 1568 | ||
- | 1569 | /* patch in vce limits */ |
|
- | 1570 | if (new_rps->vce_active) { |
|
- | 1571 | /* sclk */ |
|
- | 1572 | if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) |
|
- | 1573 | ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; |
|
- | 1574 | /* vddc */ |
|
1508 | 1575 | trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage); |
|
1509 | if (ps->levels[i].sclk < min_sclk) |
1576 | if (ps->levels[i].vddc_index < min_vce_voltage) |
Line 1510... | Line 1577... | ||
1510 | ps->levels[i].sclk = |
1577 | ps->levels[i].vddc_index = min_vce_voltage; |
Line 1729... | Line 1796... | ||
1729 | non_clock_info, |
1796 | non_clock_info, |
1730 | non_clock_info_array->ucEntrySize); |
1797 | non_clock_info_array->ucEntrySize); |
1731 | power_state_offset += 2 + power_state->v2.ucNumDPMLevels; |
1798 | power_state_offset += 2 + power_state->v2.ucNumDPMLevels; |
1732 | } |
1799 | } |
1733 | rdev->pm.dpm.num_ps = state_array->ucNumEntries; |
1800 | rdev->pm.dpm.num_ps = state_array->ucNumEntries; |
- | 1801 | ||
- | 1802 | /* fill in the vce power states */ |
|
- | 1803 | for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) { |
|
- | 1804 | u32 sclk; |
|
- | 1805 | clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; |
|
- | 1806 | clock_info = (union pplib_clock_info *) |
|
- | 1807 | &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize]; |
|
- | 1808 | sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); |
|
- | 1809 | sclk |= clock_info->sumo.ucEngineClockHigh << 16; |
|
- | 1810 | rdev->pm.dpm.vce_states[i].sclk = sclk; |
|
- | 1811 | rdev->pm.dpm.vce_states[i].mclk = 0; |
|
- | 1812 | } |
|
- | 1813 | ||
1734 | return 0; |
1814 | return 0; |
1735 | } |
1815 | } |
Line 1736... | Line 1816... | ||
1736 | 1816 | ||
1737 | union igp_info { |
1817 | union igp_info { |
Line 1910... | Line 1990... | ||
1910 | 1990 | ||
1911 | ret = r600_get_platform_caps(rdev); |
1991 | ret = r600_get_platform_caps(rdev); |
1912 | if (ret) |
1992 | if (ret) |
Line -... | Line 1993... | ||
- | 1993 | return ret; |
|
- | 1994 | ||
- | 1995 | ret = r600_parse_extended_power_table(rdev); |
|
- | 1996 | if (ret) |
|
1913 | return ret; |
1997 | return ret; |
1914 | 1998 | ||
1915 | ret = trinity_parse_power_table(rdev); |
1999 | ret = trinity_parse_power_table(rdev); |
Line 1916... | Line 2000... | ||
1916 | if (ret) |
2000 | if (ret) |
Line 1960... | Line 2044... | ||
1960 | current_index, pl->sclk, |
2044 | current_index, pl->sclk, |
1961 | trinity_convert_voltage_index_to_value(rdev, pl->vddc_index)); |
2045 | trinity_convert_voltage_index_to_value(rdev, pl->vddc_index)); |
1962 | } |
2046 | } |
1963 | } |
2047 | } |
Line -... | Line 2048... | ||
- | 2048 | ||
- | 2049 | u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev) |
|
- | 2050 | { |
|
- | 2051 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
|
- | 2052 | struct radeon_ps *rps = &pi->current_rps; |
|
- | 2053 | struct trinity_ps *ps = trinity_get_ps(rps); |
|
- | 2054 | struct trinity_pl *pl; |
|
- | 2055 | u32 current_index = |
|
- | 2056 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_MASK) >> |
|
- | 2057 | CURRENT_STATE_SHIFT; |
|
- | 2058 | ||
- | 2059 | if (current_index >= ps->num_levels) { |
|
- | 2060 | return 0; |
|
- | 2061 | } else { |
|
- | 2062 | pl = &ps->levels[current_index]; |
|
- | 2063 | return pl->sclk; |
|
- | 2064 | } |
|
- | 2065 | } |
|
- | 2066 | ||
- | 2067 | u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev) |
|
- | 2068 | { |
|
- | 2069 | struct trinity_power_info *pi = trinity_get_pi(rdev); |
|
- | 2070 | ||
- | 2071 | return pi->sys_info.bootup_uma_clk; |
|
- | 2072 | } |
|
1964 | 2073 | ||
1965 | void trinity_dpm_fini(struct radeon_device *rdev) |
2074 | void trinity_dpm_fini(struct radeon_device *rdev) |
1966 | { |
2075 | { |
Line 1967... | Line 2076... | ||
1967 | int i; |
2076 | int i; |
Line 1971... | Line 2080... | ||
1971 | for (i = 0; i < rdev->pm.dpm.num_ps; i++) { |
2080 | for (i = 0; i < rdev->pm.dpm.num_ps; i++) { |
1972 | kfree(rdev->pm.dpm.ps[i].ps_priv); |
2081 | kfree(rdev->pm.dpm.ps[i].ps_priv); |
1973 | } |
2082 | } |
1974 | kfree(rdev->pm.dpm.ps); |
2083 | kfree(rdev->pm.dpm.ps); |
1975 | kfree(rdev->pm.dpm.priv); |
2084 | kfree(rdev->pm.dpm.priv); |
- | 2085 | r600_free_extended_power_table(rdev); |
|
1976 | } |
2086 | } |
Line 1977... | Line 2087... | ||
1977 | 2087 | ||
1978 | u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low) |
2088 | u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low) |
1979 | { |
2089 | { |