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| Rev 6104 | Rev 6661 | ||
|---|---|---|---|
| Line 2924... | Line 2924... | ||
| 2924 | /* cards with dpm stability problems */ |
2924 | /* cards with dpm stability problems */ |
| 2925 | static struct si_dpm_quirk si_dpm_quirk_list[] = { |
2925 | static struct si_dpm_quirk si_dpm_quirk_list[] = { |
| 2926 | /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ |
2926 | /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ |
| 2927 | { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, |
2927 | { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, |
| 2928 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, |
2928 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, |
| - | 2929 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0x2015, 0, 120000 }, |
|
| 2929 | { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, |
2930 | { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, |
| 2930 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 }, |
2931 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 }, |
| 2931 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 }, |
2932 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 }, |
| - | 2933 | { PCI_VENDOR_ID_ATI, 0x6811, 0x148c, 0x2015, 0, 120000 }, |
|
| - | 2934 | { PCI_VENDOR_ID_ATI, 0x6810, 0x1682, 0x9275, 0, 120000 }, |
|
| 2932 | { 0, 0, 0, 0 }, |
2935 | { 0, 0, 0, 0 }, |
| 2933 | }; |
2936 | }; |
| Line 2934... | Line 2937... | ||
| 2934 | 2937 | ||
| 2935 | static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev, |
2938 | static u16 si_get_lower_of_leakage_and_vce_voltage(struct radeon_device *rdev, |
| Line 3006... | Line 3009... | ||
| 3006 | max_mclk = p->max_mclk; |
3009 | max_mclk = p->max_mclk; |
| 3007 | break; |
3010 | break; |
| 3008 | } |
3011 | } |
| 3009 | ++p; |
3012 | ++p; |
| 3010 | } |
3013 | } |
| - | 3014 | /* limit mclk on all R7 370 parts for stability */ |
|
| - | 3015 | if (rdev->pdev->device == 0x6811 && |
|
| - | 3016 | rdev->pdev->revision == 0x81) |
|
| - | 3017 | max_mclk = 120000; |
|
| - | 3018 | /* limit sclk/mclk on Jet parts for stability */ |
|
| - | 3019 | if (rdev->pdev->device == 0x6665 && |
|
| - | 3020 | rdev->pdev->revision == 0xc3) { |
|
| - | 3021 | max_sclk = 75000; |
|
| - | 3022 | max_mclk = 80000; |
|
| - | 3023 | } |
|
| Line 3011... | Line 3024... | ||
| 3011 | 3024 | ||
| 3012 | if (rps->vce_active) { |
3025 | if (rps->vce_active) { |
| 3013 | rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
3026 | rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
| 3014 | rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; |
3027 | rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; |
| Line 4097... | Line 4110... | ||
| 4097 | if (si_pi->vddc_phase_shed_control) { |
4110 | if (si_pi->vddc_phase_shed_control) { |
| 4098 | if (si_validate_phase_shedding_tables(rdev, &si_pi->vddc_phase_shed_table, |
4111 | if (si_validate_phase_shedding_tables(rdev, &si_pi->vddc_phase_shed_table, |
| 4099 | &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { |
4112 | &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { |
| 4100 | si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); |
4113 | si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); |
| Line 4101... | Line 4114... | ||
| 4101 | 4114 | ||
| 4102 | table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = |
4115 | table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] = |
| Line 4103... | Line 4116... | ||
| 4103 | cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); |
4116 | cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); |
| 4104 | 4117 | ||
| 4105 | si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, |
4118 | si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, |