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| Rev 5179 | Rev 5271 | ||
|---|---|---|---|
| Line 21... | Line 21... | ||
| 21 | * |
21 | * |
| 22 | */ |
22 | */ |
| Line 23... | Line 23... | ||
| 23 | 23 | ||
| 24 | #include "drmP.h" |
24 | #include "drmP.h" |
| - | 25 | #include "radeon.h" |
|
| 25 | #include "radeon.h" |
26 | #include "radeon_asic.h" |
| 26 | #include "sid.h" |
27 | #include "sid.h" |
| 27 | #include "r600_dpm.h" |
28 | #include "r600_dpm.h" |
| 28 | #include "si_dpm.h" |
29 | #include "si_dpm.h" |
| 29 | #include "atom.h" |
30 | #include "atom.h" |
| Line 3395... | Line 3396... | ||
| 3395 | 3396 | ||
| Line 3396... | Line 3397... | ||
| 3396 | si_pi->mc_reg_table_start = tmp; |
3397 | si_pi->mc_reg_table_start = tmp; |
| 3397 | 3398 | ||
| - | 3399 | ret = si_read_smc_sram_dword(rdev, |
|
| - | 3400 | SISLANDS_SMC_FIRMWARE_HEADER_LOCATION + |
|
| - | 3401 | SISLANDS_SMC_FIRMWARE_HEADER_fanTable, |
|
| - | 3402 | &tmp, si_pi->sram_end); |
|
| - | 3403 | if (ret) |
|
| - | 3404 | return ret; |
|
| - | 3405 | ||
| - | 3406 | si_pi->fan_table_start = tmp; |
|
| - | 3407 | ||
| 3398 | ret = si_read_smc_sram_dword(rdev, |
3408 | ret = si_read_smc_sram_dword(rdev, |
| 3399 | SISLANDS_SMC_FIRMWARE_HEADER_LOCATION + |
3409 | SISLANDS_SMC_FIRMWARE_HEADER_LOCATION + |
| 3400 | SISLANDS_SMC_FIRMWARE_HEADER_mcArbDramAutoRefreshTable, |
3410 | SISLANDS_SMC_FIRMWARE_HEADER_mcArbDramAutoRefreshTable, |
| 3401 | &tmp, si_pi->sram_end); |
3411 | &tmp, si_pi->sram_end); |
| Line 5814... | Line 5824... | ||
| 5814 | rv770_get_memory_type(rdev); |
5824 | rv770_get_memory_type(rdev); |
| 5815 | si_read_clock_registers(rdev); |
5825 | si_read_clock_registers(rdev); |
| 5816 | si_enable_acpi_power_management(rdev); |
5826 | si_enable_acpi_power_management(rdev); |
| 5817 | } |
5827 | } |
| Line -... | Line 5828... | ||
| - | 5828 | ||
| - | 5829 | static int si_thermal_enable_alert(struct radeon_device *rdev, |
|
| - | 5830 | bool enable) |
|
| - | 5831 | { |
|
| - | 5832 | u32 thermal_int = RREG32(CG_THERMAL_INT); |
|
| - | 5833 | ||
| - | 5834 | if (enable) { |
|
| - | 5835 | PPSMC_Result result; |
|
| - | 5836 | ||
| - | 5837 | thermal_int &= ~(THERM_INT_MASK_HIGH | THERM_INT_MASK_LOW); |
|
| - | 5838 | WREG32(CG_THERMAL_INT, thermal_int); |
|
| - | 5839 | rdev->irq.dpm_thermal = false; |
|
| - | 5840 | result = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); |
|
| - | 5841 | if (result != PPSMC_Result_OK) { |
|
| - | 5842 | DRM_DEBUG_KMS("Could not enable thermal interrupts.\n"); |
|
| - | 5843 | return -EINVAL; |
|
| - | 5844 | } |
|
| - | 5845 | } else { |
|
| - | 5846 | thermal_int |= THERM_INT_MASK_HIGH | THERM_INT_MASK_LOW; |
|
| - | 5847 | WREG32(CG_THERMAL_INT, thermal_int); |
|
| - | 5848 | rdev->irq.dpm_thermal = true; |
|
| - | 5849 | } |
|
| - | 5850 | ||
| - | 5851 | return 0; |
|
| - | 5852 | } |
|
| 5818 | 5853 | ||
| 5819 | static int si_set_thermal_temperature_range(struct radeon_device *rdev, |
5854 | static int si_thermal_set_temperature_range(struct radeon_device *rdev, |
| 5820 | int min_temp, int max_temp) |
5855 | int min_temp, int max_temp) |
| 5821 | { |
5856 | { |
| 5822 | int low_temp = 0 * 1000; |
5857 | int low_temp = 0 * 1000; |
| Line 5839... | Line 5874... | ||
| 5839 | rdev->pm.dpm.thermal.max_temp = high_temp; |
5874 | rdev->pm.dpm.thermal.max_temp = high_temp; |
| Line 5840... | Line 5875... | ||
| 5840 | 5875 | ||
| 5841 | return 0; |
5876 | return 0; |
| Line -... | Line 5877... | ||
| - | 5877 | } |
|
| - | 5878 | ||
| - | 5879 | static void si_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) |
|
| - | 5880 | { |
|
| - | 5881 | struct si_power_info *si_pi = si_get_pi(rdev); |
|
| - | 5882 | u32 tmp; |
|
| - | 5883 | ||
| - | 5884 | if (si_pi->fan_ctrl_is_in_default_mode) { |
|
| - | 5885 | tmp = (RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK) >> FDO_PWM_MODE_SHIFT; |
|
| - | 5886 | si_pi->fan_ctrl_default_mode = tmp; |
|
| - | 5887 | tmp = (RREG32(CG_FDO_CTRL2) & TMIN_MASK) >> TMIN_SHIFT; |
|
| - | 5888 | si_pi->t_min = tmp; |
|
| - | 5889 | si_pi->fan_ctrl_is_in_default_mode = false; |
|
| - | 5890 | } |
|
| - | 5891 | ||
| - | 5892 | tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK; |
|
| - | 5893 | tmp |= TMIN(0); |
|
| - | 5894 | WREG32(CG_FDO_CTRL2, tmp); |
|
| - | 5895 | ||
| - | 5896 | tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK; |
|
| - | 5897 | tmp |= FDO_PWM_MODE(mode); |
|
| - | 5898 | WREG32(CG_FDO_CTRL2, tmp); |
|
| - | 5899 | } |
|
| - | 5900 | ||
| - | 5901 | static int si_thermal_setup_fan_table(struct radeon_device *rdev) |
|
| - | 5902 | { |
|
| - | 5903 | struct si_power_info *si_pi = si_get_pi(rdev); |
|
| - | 5904 | PP_SIslands_FanTable fan_table = { FDO_MODE_HARDWARE }; |
|
| - | 5905 | u32 duty100; |
|
| - | 5906 | u32 t_diff1, t_diff2, pwm_diff1, pwm_diff2; |
|
| - | 5907 | u16 fdo_min, slope1, slope2; |
|
| - | 5908 | u32 reference_clock, tmp; |
|
| - | 5909 | int ret; |
|
| - | 5910 | u64 tmp64; |
|
| - | 5911 | ||
| - | 5912 | if (!si_pi->fan_table_start) { |
|
| - | 5913 | rdev->pm.dpm.fan.ucode_fan_control = false; |
|
| - | 5914 | return 0; |
|
| - | 5915 | } |
|
| - | 5916 | ||
| - | 5917 | duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT; |
|
| - | 5918 | ||
| - | 5919 | if (duty100 == 0) { |
|
| - | 5920 | rdev->pm.dpm.fan.ucode_fan_control = false; |
|
| - | 5921 | return 0; |
|
| - | 5922 | } |
|
| - | 5923 | ||
| - | 5924 | tmp64 = (u64)rdev->pm.dpm.fan.pwm_min * duty100; |
|
| - | 5925 | do_div(tmp64, 10000); |
|
| - | 5926 | fdo_min = (u16)tmp64; |
|
| - | 5927 | ||
| - | 5928 | t_diff1 = rdev->pm.dpm.fan.t_med - rdev->pm.dpm.fan.t_min; |
|
| - | 5929 | t_diff2 = rdev->pm.dpm.fan.t_high - rdev->pm.dpm.fan.t_med; |
|
| - | 5930 | ||
| - | 5931 | pwm_diff1 = rdev->pm.dpm.fan.pwm_med - rdev->pm.dpm.fan.pwm_min; |
|
| - | 5932 | pwm_diff2 = rdev->pm.dpm.fan.pwm_high - rdev->pm.dpm.fan.pwm_med; |
|
| - | 5933 | ||
| - | 5934 | slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100); |
|
| - | 5935 | slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100); |
|
| - | 5936 | ||
| - | 5937 | fan_table.slope1 = cpu_to_be16(slope1); |
|
| - | 5938 | fan_table.slope2 = cpu_to_be16(slope2); |
|
| - | 5939 | ||
| - | 5940 | fan_table.fdo_min = cpu_to_be16(fdo_min); |
|
| - | 5941 | ||
| - | 5942 | fan_table.hys_down = cpu_to_be16(rdev->pm.dpm.fan.t_hyst); |
|
| - | 5943 | ||
| - | 5944 | fan_table.hys_up = cpu_to_be16(1); |
|
| - | 5945 | ||
| - | 5946 | fan_table.hys_slope = cpu_to_be16(1); |
|
| - | 5947 | ||
| - | 5948 | fan_table.temp_resp_lim = cpu_to_be16(5); |
|
| - | 5949 | ||
| - | 5950 | reference_clock = radeon_get_xclk(rdev); |
|
| - | 5951 | ||
| - | 5952 | fan_table.refresh_period = cpu_to_be32((rdev->pm.dpm.fan.cycle_delay * |
|
| - | 5953 | reference_clock) / 1600); |
|
| - | 5954 | ||
| - | 5955 | fan_table.fdo_max = cpu_to_be16((u16)duty100); |
|
| - | 5956 | ||
| - | 5957 | tmp = (RREG32(CG_MULT_THERMAL_CTRL) & TEMP_SEL_MASK) >> TEMP_SEL_SHIFT; |
|
| - | 5958 | fan_table.temp_src = (uint8_t)tmp; |
|
| - | 5959 | ||
| - | 5960 | ret = si_copy_bytes_to_smc(rdev, |
|
| - | 5961 | si_pi->fan_table_start, |
|
| - | 5962 | (u8 *)(&fan_table), |
|
| - | 5963 | sizeof(fan_table), |
|
| - | 5964 | si_pi->sram_end); |
|
| - | 5965 | ||
| - | 5966 | if (ret) { |
|
| - | 5967 | DRM_ERROR("Failed to load fan table to the SMC."); |
|
| - | 5968 | rdev->pm.dpm.fan.ucode_fan_control = false; |
|
| - | 5969 | } |
|
| - | 5970 | ||
| - | 5971 | return 0; |
|
| - | 5972 | } |
|
| - | 5973 | ||
| - | 5974 | static int si_fan_ctrl_start_smc_fan_control(struct radeon_device *rdev) |
|
| - | 5975 | { |
|
| - | 5976 | PPSMC_Result ret; |
|
| - | 5977 | ||
| - | 5978 | ret = si_send_msg_to_smc(rdev, PPSMC_StartFanControl); |
|
| - | 5979 | if (ret == PPSMC_Result_OK) |
|
| - | 5980 | return 0; |
|
| - | 5981 | else |
|
| - | 5982 | return -EINVAL; |
|
| - | 5983 | } |
|
| - | 5984 | ||
| - | 5985 | static int si_fan_ctrl_stop_smc_fan_control(struct radeon_device *rdev) |
|
| - | 5986 | { |
|
| - | 5987 | PPSMC_Result ret; |
|
| - | 5988 | ||
| - | 5989 | ret = si_send_msg_to_smc(rdev, PPSMC_StopFanControl); |
|
| - | 5990 | if (ret == PPSMC_Result_OK) |
|
| - | 5991 | return 0; |
|
| - | 5992 | else |
|
| - | 5993 | return -EINVAL; |
|
| - | 5994 | } |
|
| - | 5995 | ||
| - | 5996 | #if 0 |
|
| - | 5997 | static int si_fan_ctrl_get_fan_speed_percent(struct radeon_device *rdev, |
|
| - | 5998 | u32 *speed) |
|
| - | 5999 | { |
|
| - | 6000 | u32 duty, duty100; |
|
| - | 6001 | u64 tmp64; |
|
| - | 6002 | ||
| - | 6003 | if (rdev->pm.no_fan) |
|
| - | 6004 | return -ENOENT; |
|
| - | 6005 | ||
| - | 6006 | duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT; |
|
| - | 6007 | duty = (RREG32(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT; |
|
| - | 6008 | ||
| - | 6009 | if (duty100 == 0) |
|
| - | 6010 | return -EINVAL; |
|
| - | 6011 | ||
| - | 6012 | tmp64 = (u64)duty * 100; |
|
| - | 6013 | do_div(tmp64, duty100); |
|
| - | 6014 | *speed = (u32)tmp64; |
|
| - | 6015 | ||
| - | 6016 | if (*speed > 100) |
|
| - | 6017 | *speed = 100; |
|
| - | 6018 | ||
| - | 6019 | return 0; |
|
| - | 6020 | } |
|
| - | 6021 | ||
| - | 6022 | static int si_fan_ctrl_set_fan_speed_percent(struct radeon_device *rdev, |
|
| - | 6023 | u32 speed) |
|
| - | 6024 | { |
|
| - | 6025 | u32 tmp; |
|
| - | 6026 | u32 duty, duty100; |
|
| - | 6027 | u64 tmp64; |
|
| - | 6028 | ||
| - | 6029 | if (rdev->pm.no_fan) |
|
| - | 6030 | return -ENOENT; |
|
| - | 6031 | ||
| - | 6032 | if (speed > 100) |
|
| - | 6033 | return -EINVAL; |
|
| - | 6034 | ||
| - | 6035 | if (rdev->pm.dpm.fan.ucode_fan_control) |
|
| - | 6036 | si_fan_ctrl_stop_smc_fan_control(rdev); |
|
| - | 6037 | ||
| - | 6038 | duty100 = (RREG32(CG_FDO_CTRL1) & FMAX_DUTY100_MASK) >> FMAX_DUTY100_SHIFT; |
|
| - | 6039 | ||
| - | 6040 | if (duty100 == 0) |
|
| - | 6041 | return -EINVAL; |
|
| - | 6042 | ||
| - | 6043 | tmp64 = (u64)speed * duty100; |
|
| - | 6044 | do_div(tmp64, 100); |
|
| - | 6045 | duty = (u32)tmp64; |
|
| - | 6046 | ||
| - | 6047 | tmp = RREG32(CG_FDO_CTRL0) & ~FDO_STATIC_DUTY_MASK; |
|
| - | 6048 | tmp |= FDO_STATIC_DUTY(duty); |
|
| - | 6049 | WREG32(CG_FDO_CTRL0, tmp); |
|
| - | 6050 | ||
| - | 6051 | si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); |
|
| - | 6052 | ||
| - | 6053 | return 0; |
|
| - | 6054 | } |
|
| - | 6055 | ||
| - | 6056 | static int si_fan_ctrl_get_fan_speed_rpm(struct radeon_device *rdev, |
|
| - | 6057 | u32 *speed) |
|
| - | 6058 | { |
|
| - | 6059 | u32 tach_period; |
|
| - | 6060 | u32 xclk = radeon_get_xclk(rdev); |
|
| - | 6061 | ||
| - | 6062 | if (rdev->pm.no_fan) |
|
| - | 6063 | return -ENOENT; |
|
| - | 6064 | ||
| - | 6065 | if (rdev->pm.fan_pulses_per_revolution == 0) |
|
| - | 6066 | return -ENOENT; |
|
| - | 6067 | ||
| - | 6068 | tach_period = (RREG32(CG_TACH_STATUS) & TACH_PERIOD_MASK) >> TACH_PERIOD_SHIFT; |
|
| - | 6069 | if (tach_period == 0) |
|
| - | 6070 | return -ENOENT; |
|
| - | 6071 | ||
| - | 6072 | *speed = 60 * xclk * 10000 / tach_period; |
|
| - | 6073 | ||
| - | 6074 | return 0; |
|
| - | 6075 | } |
|
| - | 6076 | ||
| - | 6077 | static int si_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, |
|
| - | 6078 | u32 speed) |
|
| - | 6079 | { |
|
| - | 6080 | u32 tach_period, tmp; |
|
| - | 6081 | u32 xclk = radeon_get_xclk(rdev); |
|
| - | 6082 | ||
| - | 6083 | if (rdev->pm.no_fan) |
|
| - | 6084 | return -ENOENT; |
|
| - | 6085 | ||
| - | 6086 | if (rdev->pm.fan_pulses_per_revolution == 0) |
|
| - | 6087 | return -ENOENT; |
|
| - | 6088 | ||
| - | 6089 | if ((speed < rdev->pm.fan_min_rpm) || |
|
| - | 6090 | (speed > rdev->pm.fan_max_rpm)) |
|
| - | 6091 | return -EINVAL; |
|
| - | 6092 | ||
| - | 6093 | if (rdev->pm.dpm.fan.ucode_fan_control) |
|
| - | 6094 | si_fan_ctrl_stop_smc_fan_control(rdev); |
|
| - | 6095 | ||
| - | 6096 | tach_period = 60 * xclk * 10000 / (8 * speed); |
|
| - | 6097 | tmp = RREG32(CG_TACH_CTRL) & ~TARGET_PERIOD_MASK; |
|
| - | 6098 | tmp |= TARGET_PERIOD(tach_period); |
|
| - | 6099 | WREG32(CG_TACH_CTRL, tmp); |
|
| - | 6100 | ||
| - | 6101 | si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM); |
|
| - | 6102 | ||
| - | 6103 | return 0; |
|
| - | 6104 | } |
|
| - | 6105 | #endif |
|
| - | 6106 | ||
| - | 6107 | static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev) |
|
| - | 6108 | { |
|
| - | 6109 | struct si_power_info *si_pi = si_get_pi(rdev); |
|
| - | 6110 | u32 tmp; |
|
| - | 6111 | ||
| - | 6112 | if (!si_pi->fan_ctrl_is_in_default_mode) { |
|
| - | 6113 | tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK; |
|
| - | 6114 | tmp |= FDO_PWM_MODE(si_pi->fan_ctrl_default_mode); |
|
| - | 6115 | WREG32(CG_FDO_CTRL2, tmp); |
|
| - | 6116 | ||
| - | 6117 | tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK; |
|
| - | 6118 | tmp |= TMIN(si_pi->t_min); |
|
| - | 6119 | WREG32(CG_FDO_CTRL2, tmp); |
|
| - | 6120 | si_pi->fan_ctrl_is_in_default_mode = true; |
|
| - | 6121 | } |
|
| - | 6122 | } |
|
| - | 6123 | ||
| - | 6124 | static void si_thermal_start_smc_fan_control(struct radeon_device *rdev) |
|
| - | 6125 | { |
|
| - | 6126 | if (rdev->pm.dpm.fan.ucode_fan_control) { |
|
| - | 6127 | si_fan_ctrl_start_smc_fan_control(rdev); |
|
| - | 6128 | si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC); |
|
| - | 6129 | } |
|
| - | 6130 | } |
|
| - | 6131 | ||
| - | 6132 | static void si_thermal_initialize(struct radeon_device *rdev) |
|
| - | 6133 | { |
|
| - | 6134 | u32 tmp; |
|
| - | 6135 | ||
| - | 6136 | if (rdev->pm.fan_pulses_per_revolution) { |
|
| - | 6137 | tmp = RREG32(CG_TACH_CTRL) & ~EDGE_PER_REV_MASK; |
|
| - | 6138 | tmp |= EDGE_PER_REV(rdev->pm.fan_pulses_per_revolution -1); |
|
| - | 6139 | WREG32(CG_TACH_CTRL, tmp); |
|
| - | 6140 | } |
|
| - | 6141 | ||
| - | 6142 | tmp = RREG32(CG_FDO_CTRL2) & ~TACH_PWM_RESP_RATE_MASK; |
|
| - | 6143 | tmp |= TACH_PWM_RESP_RATE(0x28); |
|
| - | 6144 | WREG32(CG_FDO_CTRL2, tmp); |
|
| - | 6145 | } |
|
| - | 6146 | ||
| - | 6147 | static int si_thermal_start_thermal_controller(struct radeon_device *rdev) |
|
| - | 6148 | { |
|
| - | 6149 | int ret; |
|
| - | 6150 | ||
| - | 6151 | si_thermal_initialize(rdev); |
|
| - | 6152 | ret = si_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); |
|
| - | 6153 | if (ret) |
|
| - | 6154 | return ret; |
|
| - | 6155 | ret = si_thermal_enable_alert(rdev, true); |
|
| - | 6156 | if (ret) |
|
| - | 6157 | return ret; |
|
| - | 6158 | if (rdev->pm.dpm.fan.ucode_fan_control) { |
|
| - | 6159 | ret = si_halt_smc(rdev); |
|
| - | 6160 | if (ret) |
|
| - | 6161 | return ret; |
|
| - | 6162 | ret = si_thermal_setup_fan_table(rdev); |
|
| - | 6163 | if (ret) |
|
| - | 6164 | return ret; |
|
| - | 6165 | ret = si_resume_smc(rdev); |
|
| - | 6166 | if (ret) |
|
| - | 6167 | return ret; |
|
| - | 6168 | si_thermal_start_smc_fan_control(rdev); |
|
| - | 6169 | } |
|
| - | 6170 | ||
| - | 6171 | return 0; |
|
| - | 6172 | } |
|
| - | 6173 | ||
| - | 6174 | static void si_thermal_stop_thermal_controller(struct radeon_device *rdev) |
|
| - | 6175 | { |
|
| - | 6176 | if (!rdev->pm.no_fan) { |
|
| - | 6177 | si_fan_ctrl_set_default_mode(rdev); |
|
| - | 6178 | si_fan_ctrl_stop_smc_fan_control(rdev); |
|
| - | 6179 | } |
|
| 5842 | } |
6180 | } |
| 5843 | 6181 | ||
| 5844 | int si_dpm_enable(struct radeon_device *rdev) |
6182 | int si_dpm_enable(struct radeon_device *rdev) |
| 5845 | { |
6183 | { |
| 5846 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
6184 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
| Line 5951... | Line 6289... | ||
| 5951 | si_enable_sclk_control(rdev, true); |
6289 | si_enable_sclk_control(rdev, true); |
| 5952 | si_start_dpm(rdev); |
6290 | si_start_dpm(rdev); |
| Line 5953... | Line 6291... | ||
| 5953 | 6291 | ||
| Line -... | Line 6292... | ||
| - | 6292 | si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); |
|
| - | 6293 | ||
| 5954 | si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true); |
6294 | si_thermal_start_thermal_controller(rdev); |
| Line 5955... | Line 6295... | ||
| 5955 | 6295 | ||
| 5956 | ni_update_current_ps(rdev, boot_ps); |
6296 | ni_update_current_ps(rdev, boot_ps); |
| Line 5957... | Line 6297... | ||
| 5957 | 6297 | ||
| 5958 | return 0; |
6298 | return 0; |
| 5959 | } |
6299 | } |
| Line 5960... | Line -... | ||
| 5960 | - | ||
| 5961 | int si_dpm_late_enable(struct radeon_device *rdev) |
6300 | |
| - | 6301 | static int si_set_temperature_range(struct radeon_device *rdev) |
|
| 5962 | { |
6302 | { |
| 5963 | int ret; |
- | |
| 5964 | 6303 | int ret; |
|
| - | 6304 | ||
| - | 6305 | ret = si_thermal_enable_alert(rdev, false); |
|
| - | 6306 | if (ret) |
|
| 5965 | if (rdev->irq.installed && |
6307 | return ret; |
| 5966 | r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { |
6308 | ret = si_thermal_set_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); |
| 5967 | PPSMC_Result result; |
- | |
| 5968 | - | ||
| 5969 | ret = si_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX); |
- | |
| Line 5970... | Line 6309... | ||
| 5970 | if (ret) |
6309 | if (ret) |
| 5971 | return ret; |
- | |
| 5972 | rdev->irq.dpm_thermal = true; |
6310 | return ret; |
| Line -... | Line 6311... | ||
| - | 6311 | ret = si_thermal_enable_alert(rdev, true); |
|
| - | 6312 | if (ret) |
|
| - | 6313 | return ret; |
|
| - | 6314 | ||
| - | 6315 | return ret; |
|
| - | 6316 | } |
|
| - | 6317 | ||
| - | 6318 | int si_dpm_late_enable(struct radeon_device *rdev) |
|
| 5973 | radeon_irq_set(rdev); |
6319 | { |
| 5974 | result = si_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); |
6320 | int ret; |
| Line 5975... | Line 6321... | ||
| 5975 | 6321 | ||
| 5976 | if (result != PPSMC_Result_OK) |
6322 | ret = si_set_temperature_range(rdev); |
| 5977 | DRM_DEBUG_KMS("Could not enable thermal interrupts.\n"); |
6323 | if (ret) |
| 5978 | } |
6324 | return ret; |
| Line 5979... | Line 6325... | ||
| 5979 | 6325 | ||
| 5980 | return 0; |
6326 | return ret; |
| - | 6327 | } |
|
| 5981 | } |
6328 | |
| 5982 | 6329 | void si_dpm_disable(struct radeon_device *rdev) |
|
| 5983 | void si_dpm_disable(struct radeon_device *rdev) |
6330 | { |
| 5984 | { |
6331 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
| 5985 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
6332 | struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; |
| Line 6523... | Line 6870... | ||
| 6523 | if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || |
6870 | if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || |
| 6524 | (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) |
6871 | (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) |
| 6525 | rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = |
6872 | rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = |
| 6526 | rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; |
6873 | rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; |
| Line -... | Line 6874... | ||
| - | 6874 | ||
| - | 6875 | si_pi->fan_ctrl_is_in_default_mode = true; |
|
| - | 6876 | rdev->pm.dpm.fan.ucode_fan_control = false; |
|
| 6527 | 6877 | ||
| 6528 | return 0; |
6878 | return 0; |
| Line 6529... | Line 6879... | ||
| 6529 | } |
6879 | } |
| 6530 | 6880 | ||