Rev 5078 | Rev 5271 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 5078 | Rev 5179 | ||
---|---|---|---|
Line 6253... | Line 6253... | ||
6253 | } |
6253 | } |
Line 6254... | Line 6254... | ||
6254 | 6254 | ||
6255 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && |
6255 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && |
6256 | index == 0) { |
6256 | index == 0) { |
6257 | /* XXX disable for A0 tahiti */ |
6257 | /* XXX disable for A0 tahiti */ |
6258 | si_pi->ulv.supported = true; |
6258 | si_pi->ulv.supported = false; |
6259 | si_pi->ulv.pl = *pl; |
6259 | si_pi->ulv.pl = *pl; |
6260 | si_pi->ulv.one_pcie_lane_in_ulv = false; |
6260 | si_pi->ulv.one_pcie_lane_in_ulv = false; |
6261 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; |
6261 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; |
6262 | si_pi->ulv.cg_ulv_parameter = SISLANDS_CGULVPARAMETER_DFLT; |
6262 | si_pi->ulv.cg_ulv_parameter = SISLANDS_CGULVPARAMETER_DFLT; |