Rev 5271 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 5271 | Rev 6104 | ||
|---|---|---|---|
| Line 191... | Line 191... | ||
| 191 | PPSMC_Result result; |
191 | PPSMC_Result result; |
| Line 192... | Line 192... | ||
| 192 | 192 | ||
| Line 193... | Line 193... | ||
| 193 | result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); |
193 | result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); |
| 194 | 194 | ||
| Line 195... | Line 195... | ||
| 195 | if (result != PPSMC_Result_OK) |
195 | if (result != PPSMC_Result_OK) |
| Line 196... | Line 196... | ||
| 196 | DRM_ERROR("Could not force DPM to low.\n"); |
196 | DRM_DEBUG("Could not force DPM to low.\n"); |
| Line 229... | Line 229... | ||
| 229 | { |
229 | { |
| 230 | return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ? |
230 | return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ? |
| 231 | MC_CG_SEQ_DRAMCONF_S0 : MC_CG_SEQ_DRAMCONF_S1; |
231 | MC_CG_SEQ_DRAMCONF_S0 : MC_CG_SEQ_DRAMCONF_S1; |
| 232 | } |
232 | } |
| Line -... | Line 233... | ||
| - | 233 | ||
| 233 | 234 | #if 0 |
|
| 234 | int rv770_read_smc_soft_register(struct radeon_device *rdev, |
235 | int rv770_read_smc_soft_register(struct radeon_device *rdev, |
| 235 | u16 reg_offset, u32 *value) |
236 | u16 reg_offset, u32 *value) |
| 236 | { |
237 | { |
| Line 237... | Line 238... | ||
| 237 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
238 | struct rv7xx_power_info *pi = rv770_get_pi(rdev); |
| 238 | 239 | ||
| 239 | return rv770_read_smc_sram_dword(rdev, |
240 | return rv770_read_smc_sram_dword(rdev, |
| 240 | pi->soft_regs_start + reg_offset, |
241 | pi->soft_regs_start + reg_offset, |
| - | 242 | value, pi->sram_end); |
|
| Line 241... | Line 243... | ||
| 241 | value, pi->sram_end); |
243 | } |
| 242 | } |
244 | #endif |
| 243 | 245 | ||
| 244 | int rv770_write_smc_soft_register(struct radeon_device *rdev, |
246 | int rv770_write_smc_soft_register(struct radeon_device *rdev, |
| Line 1414... | Line 1416... | ||
| 1414 | } |
1416 | } |
| Line 1415... | Line 1417... | ||
| 1415 | 1417 | ||
| 1416 | int rv770_set_sw_state(struct radeon_device *rdev) |
1418 | int rv770_set_sw_state(struct radeon_device *rdev) |
| 1417 | { |
1419 | { |
| 1418 | if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) |
1420 | if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) |
| 1419 | return -EINVAL; |
1421 | DRM_DEBUG("rv770_set_sw_state failed\n"); |
| 1420 | return 0; |
1422 | return 0; |
| Line 1421... | Line 1423... | ||
| 1421 | } |
1423 | } |
| 1422 | 1424 | ||
| Line 2073... | Line 2075... | ||
| 2073 | rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
2075 | rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
| Line 2074... | Line 2076... | ||
| 2074 | 2076 | ||
| 2075 | return 0; |
2077 | return 0; |
| Line -... | Line 2078... | ||
| - | 2078 | } |
|
| 2076 | } |
2079 | |
| 2077 | 2080 | #if 0 |
|
| 2078 | void rv770_dpm_reset_asic(struct radeon_device *rdev) |
2081 | void rv770_dpm_reset_asic(struct radeon_device *rdev) |
| 2079 | { |
2082 | { |
| Line 2085... | Line 2088... | ||
| 2085 | rv770_program_dcodt_before_state_switch(rdev, boot_ps, boot_ps); |
2088 | rv770_program_dcodt_before_state_switch(rdev, boot_ps, boot_ps); |
| 2086 | rv770_set_boot_state(rdev); |
2089 | rv770_set_boot_state(rdev); |
| 2087 | if (pi->dcodt) |
2090 | if (pi->dcodt) |
| 2088 | rv770_program_dcodt_after_state_switch(rdev, boot_ps, boot_ps); |
2091 | rv770_program_dcodt_after_state_switch(rdev, boot_ps, boot_ps); |
| 2089 | } |
2092 | } |
| - | 2093 | #endif |
|
| Line 2090... | Line 2094... | ||
| 2090 | 2094 | ||
| 2091 | void rv770_dpm_setup_asic(struct radeon_device *rdev) |
2095 | void rv770_dpm_setup_asic(struct radeon_device *rdev) |
| 2092 | { |
2096 | { |
| Line 2486... | Line 2490... | ||
| 2486 | current_index, pl->sclk, pl->mclk, pl->vddc); |
2490 | current_index, pl->sclk, pl->mclk, pl->vddc); |
| 2487 | } |
2491 | } |
| 2488 | } |
2492 | } |
| 2489 | } |
2493 | } |
| Line -... | Line 2494... | ||
| - | 2494 | ||
| - | 2495 | u32 rv770_dpm_get_current_sclk(struct radeon_device *rdev) |
|
| - | 2496 | { |
|
| - | 2497 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; |
|
| - | 2498 | struct rv7xx_ps *ps = rv770_get_ps(rps); |
|
| - | 2499 | struct rv7xx_pl *pl; |
|
| - | 2500 | u32 current_index = |
|
| - | 2501 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> |
|
| - | 2502 | CURRENT_PROFILE_INDEX_SHIFT; |
|
| - | 2503 | ||
| - | 2504 | if (current_index > 2) { |
|
| - | 2505 | return 0; |
|
| - | 2506 | } else { |
|
| - | 2507 | if (current_index == 0) |
|
| - | 2508 | pl = &ps->low; |
|
| - | 2509 | else if (current_index == 1) |
|
| - | 2510 | pl = &ps->medium; |
|
| - | 2511 | else /* current_index == 2 */ |
|
| - | 2512 | pl = &ps->high; |
|
| - | 2513 | return pl->sclk; |
|
| - | 2514 | } |
|
| - | 2515 | } |
|
| - | 2516 | ||
| - | 2517 | u32 rv770_dpm_get_current_mclk(struct radeon_device *rdev) |
|
| - | 2518 | { |
|
| - | 2519 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; |
|
| - | 2520 | struct rv7xx_ps *ps = rv770_get_ps(rps); |
|
| - | 2521 | struct rv7xx_pl *pl; |
|
| - | 2522 | u32 current_index = |
|
| - | 2523 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> |
|
| - | 2524 | CURRENT_PROFILE_INDEX_SHIFT; |
|
| - | 2525 | ||
| - | 2526 | if (current_index > 2) { |
|
| - | 2527 | return 0; |
|
| - | 2528 | } else { |
|
| - | 2529 | if (current_index == 0) |
|
| - | 2530 | pl = &ps->low; |
|
| - | 2531 | else if (current_index == 1) |
|
| - | 2532 | pl = &ps->medium; |
|
| - | 2533 | else /* current_index == 2 */ |
|
| - | 2534 | pl = &ps->high; |
|
| - | 2535 | return pl->mclk; |
|
| - | 2536 | } |
|
| - | 2537 | } |
|
| 2490 | 2538 | ||
| 2491 | void rv770_dpm_fini(struct radeon_device *rdev) |
2539 | void rv770_dpm_fini(struct radeon_device *rdev) |
| 2492 | { |
2540 | { |
| Line 2493... | Line 2541... | ||
| 2493 | int i; |
2541 | int i; |