WebSVN – Kolibri OS – Diff – /drivers/video/drm/radeon/rv515.c



			return r;
	}
	/* Enable IRQ */
//	rdev->irq.sw_int = true;
//	rs600_irq_set(rdev);
	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
	/* 1M ring buffer */
//	r = r100_cp_init(rdev, 1024 * 1024);
//	if (r) {
//		dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
//		return r;

			"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
			RREG32(R_000E40_RBBM_STATUS),
			RREG32(R_0007C0_CP_STAT));
	}
	/* check if cards are posted or not */
	if (radeon_boot_test_post_card(rdev) == false)
 
		return -EINVAL;
 
	/* Initialize clocks */
	radeon_get_clock_info(rdev->ddev);
	/* Initialize power management */
	radeon_pm_init(rdev);
	/* Get vram informations */

//       return r;
//	r = radeon_irq_kms_init(rdev);
//	if (r)
//		return r;
	/* Memory manager */
	r = radeon_bo_init(rdev);
	if (r)
		return r;
	r = rv370_pcie_gart_init(rdev);
	if (r)
		return r;

	else
		wm->num_line_pair.full = rfixed_const(1);

 
	b.full = rfixed_const(mode->crtc_hdisplay);
	c.full = rfixed_const(256);
	a.full = rfixed_div(b, c);
	request_fifo_depth.full = rfixed_mul(a, wm->num_line_pair);
	request_fifo_depth.full = rfixed_ceil(request_fifo_depth);
	if (a.full < rfixed_const(4)) {
		wm->lb_request_fifo_depth = 4;
	} else {
		wm->lb_request_fifo_depth = rfixed_trunc(request_fifo_depth);

	 *  width = viewport width in pixels
	 */
	a.full = rfixed_const(16);
	wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
	wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
	wm->priority_mark_max.full = rfixed_ceil(wm->priority_mark_max);

 
	/* Determine estimated width */
	estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
	estimated_width.full = rfixed_div(estimated_width, consumption_time);
	if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
		wm->priority_mark.full = wm->priority_mark_max.full;
	} else {
		a.full = rfixed_const(16);
		wm->priority_mark.full = rfixed_div(estimated_width, a);
		wm->priority_mark.full = rfixed_ceil(wm->priority_mark);
		wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
	}

}

Rev 1313	Rev 1403
Line 487...	Line 487...
487	return r;	487	return r;
488	}	488	}
489	/* Enable IRQ */	489	/* Enable IRQ */
490	// rdev->irq.sw_int = true;	490	// rdev->irq.sw_int = true;
491	// rs600_irq_set(rdev);	491	// rs600_irq_set(rdev);
-		492	rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
492	/* 1M ring buffer */	493	/* 1M ring buffer */
493	// r = r100_cp_init(rdev, 1024 * 1024);	494	// r = r100_cp_init(rdev, 1024 * 1024);
494	// if (r) {	495	// if (r) {
495	// dev_err(rdev->dev, "failled initializing CP (%d).\n", r);	496	// dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
496	// return r;	497	// return r;
Line 541...	Line 542...
541	"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",	542	"GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
542	RREG32(R_000E40_RBBM_STATUS),	543	RREG32(R_000E40_RBBM_STATUS),
543	RREG32(R_0007C0_CP_STAT));	544	RREG32(R_0007C0_CP_STAT));
544	}	545	}
545	/* check if cards are posted or not */	546	/* check if cards are posted or not */
546	if (!radeon_card_posted(rdev) && rdev->bios) {	547	if (radeon_boot_test_post_card(rdev) == false)
547	DRM_INFO("GPU not posted. posting now...\n");	-
548	atom_asic_init(rdev->mode_info.atom_context);	548	return -EINVAL;
549	}	-
550	/* Initialize clocks */	549	/* Initialize clocks */
551	radeon_get_clock_info(rdev->ddev);	550	radeon_get_clock_info(rdev->ddev);
552	/* Initialize power management */	551	/* Initialize power management */
553	radeon_pm_init(rdev);	552	radeon_pm_init(rdev);
554	/* Get vram informations */	553	/* Get vram informations */
Line 565...	Line 564...
565	// return r;	564	// return r;
566	// r = radeon_irq_kms_init(rdev);	565	// r = radeon_irq_kms_init(rdev);
567	// if (r)	566	// if (r)
568	// return r;	567	// return r;
569	/* Memory manager */	568	/* Memory manager */
570	r = radeon_object_init(rdev);	569	r = radeon_bo_init(rdev);
571	if (r)	570	if (r)
572	return r;	571	return r;
573	r = rv370_pcie_gart_init(rdev);	572	r = rv370_pcie_gart_init(rdev);
574	if (r)	573	if (r)
575	return r;	574	return r;
Line 854...	Line 853...
854	else	853	else
855	wm->num_line_pair.full = rfixed_const(1);	854	wm->num_line_pair.full = rfixed_const(1);
Line 856...	Line 855...
856		855
857	b.full = rfixed_const(mode->crtc_hdisplay);	856	b.full = rfixed_const(mode->crtc_hdisplay);
-		857	c.full = rfixed_const(256);
858	c.full = rfixed_const(256);	858	a.full = rfixed_div(b, c);
859	a.full = rfixed_mul(wm->num_line_pair, b);	859	request_fifo_depth.full = rfixed_mul(a, wm->num_line_pair);
860	request_fifo_depth.full = rfixed_div(a, c);	860	request_fifo_depth.full = rfixed_ceil(request_fifo_depth);
861	if (a.full < rfixed_const(4)) {	861	if (a.full < rfixed_const(4)) {
862	wm->lb_request_fifo_depth = 4;	862	wm->lb_request_fifo_depth = 4;
863	} else {	863	} else {
864	wm->lb_request_fifo_depth = rfixed_trunc(request_fifo_depth);	864	wm->lb_request_fifo_depth = rfixed_trunc(request_fifo_depth);
Line 957...	Line 957...
957	* width = viewport width in pixels	957	* width = viewport width in pixels
958	*/	958	*/
959	a.full = rfixed_const(16);	959	a.full = rfixed_const(16);
960	wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);	960	wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
961	wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);	961	wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
-		962	wm->priority_mark_max.full = rfixed_ceil(wm->priority_mark_max);
Line 962...	Line 963...
962		963
963	/* Determine estimated width */	964	/* Determine estimated width */
964	estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;	965	estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
965	estimated_width.full = rfixed_div(estimated_width, consumption_time);	966	estimated_width.full = rfixed_div(estimated_width, consumption_time);
966	if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {	967	if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
967	wm->priority_mark.full = rfixed_const(10);	968	wm->priority_mark.full = wm->priority_mark_max.full;
968	} else {	969	} else {
969	a.full = rfixed_const(16);	970	a.full = rfixed_const(16);
-		971	wm->priority_mark.full = rfixed_div(estimated_width, a);
970	wm->priority_mark.full = rfixed_div(estimated_width, a);	972	wm->priority_mark.full = rfixed_ceil(wm->priority_mark);
971	wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;	973	wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
972	}	974	}
Line 973...	Line 975...
973	}	975	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/radeon/rv515.c – Rev 1313 → 1403