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Rev 5271 Rev 6104
Line 999... Line 999...
999 
	else
 999 
	else
1000 
		seq_printf(m, "power level 1    sclk: %u vddc_index: %d\n",
 1000 
		seq_printf(m, "power level 1    sclk: %u vddc_index: %d\n",
1001 
			   ps->sclk_high, ps->max_voltage);
 1001 
			   ps->sclk_high, ps->max_voltage);
1002 
}
 1002 
}
Line -... Line 1003...
- 
 
 1003 
 
- 
 
 1004 
/* get the current sclk in 10 khz units */
- 
 
 1005 
u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev)
- 
 
 1006 
{
- 
 
 1007 
	u32 current_fb_div = RREG32(FVTHROT_STATUS_REG0) & CURRENT_FEEDBACK_DIV_MASK;
- 
 
 1008 
	u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
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 1009 
	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
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 1010 
	u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 +
- 
 
 1011 
		((func_cntl & SPLL_SW_LOLEN_MASK) >> SPLL_SW_LOLEN_SHIFT) + 1;
- 
 
 1012 
	u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /
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 1013 
		(post_div * ref_div);
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 1014 
 
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 1015 
	return sclk;
- 
 
 1016 
}
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 1017 
 
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 1018 
/* get the current mclk in 10 khz units */
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 1019 
u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev)
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 1020 
{
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 1021 
	struct igp_power_info *pi = rs780_get_pi(rdev);
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 1022 
 
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 1023 
	return pi->bootup_uma_clk;
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 1024 
}
1003 
 
 1025 
 
1004 
int rs780_dpm_force_performance_level(struct radeon_device *rdev,
 1026 
int rs780_dpm_force_performance_level(struct radeon_device *rdev,
1005 
				      enum radeon_dpm_forced_level level)
 1027 
				      enum radeon_dpm_forced_level level)
1006 
{
 1028 
{
1007 
	struct igp_power_info *pi = rs780_get_pi(rdev);
 1029 
	struct igp_power_info *pi = rs780_get_pi(rdev);